image sensor

Abstract

Embodiments of the present application provide an image sensor. The image sensor includes a photodetector in a semiconductor substrate. A floating node is located in the semiconductor substrate and is located adjacent to the photodetector. A transfer gate is located between the photodetector and the floating node. A deep trench isolation (DTI) structure extends into the semiconductor substrate from a backside of the semiconductor substrate. A shallow trench isolation (STI) structure extends into the semiconductor substrate from a frontside of the semiconductor substrate and is located above the DTI structure. The DTI structure extends from the backside to a first depth in the semiconductor substrate. The DTI structure extends from the backside into the STI structure to a second depth different from the first depth.

Description

Technical Field

[0001] This utility model relates to an image sensor. Background Technology

[0002] Complementary metal-oxide-semiconductor (CMOS) image sensors are widely used in modern electronic devices such as cameras, tablet computers, and smartphones. CMOS image sensors can be front-illuminated (FSI) or back-illuminated (BSI). A CMOS image sensor includes a photodetector and an isolation structure to isolate the photodetector from adjacent photodetectors. Utility Model Content

[0003] According to an embodiment of the present invention, an image sensor includes: a photodetector, a floating node, a transferred gate, a deep trench isolation (DTI) structure, and a shallow trench isolation (STI) structure. The photodetector is located in a semiconductor substrate. The floating node is located in the semiconductor substrate and adjacent to the photodetector. The transferred gate is located between the photodetector and the floating node. The deep trench isolation (DTI) structure extends from the back side of the semiconductor substrate into the semiconductor substrate. The shallow trench isolation (STI) structure extends from the front side of the semiconductor substrate into the semiconductor substrate and above the deep trench isolation structure. The deep trench isolation structure extends from the back side of the semiconductor substrate to a first depth, and wherein the DTI structure extends from the back side of the STI structure to a second depth, wherein the second depth is different from the first depth.

[0004] According to an embodiment of the present invention, an image sensor includes: a semiconductor substrate, a transfer gate, a deep trench isolation (DTI) structure, and a shallow trench isolation (STI) structure. The semiconductor substrate has a bulk region having a first doping type, a photodetector region having a second doping type different from the first doping type, and a floating region having the second doping type and extending from the front side of the semiconductor substrate to the back side. The transfer gate is along the front side of the semiconductor substrate, above the photodetector region and the floating region, and between the photodetector region and the floating region. A deep trench isolation (DTI) structure extends from the back side to the front side of the semiconductor substrate into the semiconductor substrate and surrounds the photodetector region. The DTI structure has a first upper surface extending from the back side of the semiconductor substrate along a first wall to a first depth, and a second upper surface extending from the back side of the semiconductor substrate along a point where the DTI structure intersects to a second depth, wherein the first wall and the second wall of the DTI structure intersect, and the second depth is different from the first depth. A shallow trench isolation (STI) structure extends from the front side to the back side of the semiconductor substrate into the semiconductor substrate and extends above the DTI structure at the point where the DTI structure intersects. The STI structure has a first lower surface located at a third depth from the back side of the semiconductor substrate, and a second lower surface on the second upper surface of the DTI structure. The third depth is less than the second depth, such that the lower portion of the STI structure vertically overlaps the first upper portion of the DTI structure.

[0005] To make the above features and advantages of the present utility model embodiments more apparent and understandable, specific embodiments are described below in conjunction with the accompanying drawings. Attached Figure Description

[0006] When read in conjunction with the accompanying drawings, the following detailed description provides the best understanding of the figures and embodiments of the present invention. It should be noted that, according to industry standard practice, the features are not drawn to scale. In fact, the dimensions of the various features can be arbitrarily increased or decreased for clarity of discussion.

[0007] Figure 1A , Figure 1B , Figure 1D , Figure 1E and Figure 1F Various cross-sectional views of some embodiments of the image sensor are shown, including a shallow trench isolation (STI) structure on a deep trench isolation (DTI) structure.

[0008] Figure 1CShow Figure 1B Enlarged cross-sectional views of some embodiments of the image sensor.

[0009] Figure 1G Show Figure 1A-1F Top view of some embodiments of the image sensor.

[0010] Figure 2A , Figure 2B , Figure 2D , Figure 2E and Figure 2F Show Figure 1A-1G Various cross-sectional views of some embodiments of the image sensor, which also includes isolation areas.

[0011] Figure 2C Show Figure 2B Enlarged cross-sectional views of some embodiments of the image sensor.

[0012] Figure 2G Show Figures 2A-2F Top view of some embodiments of the image sensor.

[0013] Figure 3A Show Figure 2A-2G A cross-sectional view of some embodiments of the image sensor, wherein the first STI structure has three lower surfaces at three different depths.

[0014] Figure 3B Show Figure 3A Top view of some embodiments of the image sensor.

[0015] Figure 4A and Figure 4B Show Figure 2A-2G Some embodiments of the image sensor also include a cross-sectional view of the pickup area.

[0016] Figure 4C Show Figure 4A and Figure 4B Top view of some embodiments of the image sensor.

[0017] Figure 5A and Figure 5B Show Figure 2A-2G A cross-sectional view of some embodiments of the image sensor, wherein the floating node is located at the intersection of one wall of the DTI structure and another wall of the DTI structure.

[0018] Figure 5C Show Figure 5A and Figure 5B Top view of some embodiments of the image sensor.

[0019] Figure 6A Show Figure 2A-2GCross-sectional views of some other embodiments of the image sensor also include a pickup area.

[0020] Figure 6B Show Figure 6A Top view of some embodiments of the image sensor.

[0021] Figure 7A and Figure 7B Show Figure 2A-2G Cross-sectional views of some embodiments of the image sensor, wherein the DTI structure is laterally spaced from the floating node.

[0022] Figure 7C Show Figure 7A and Figure 7B Top view of some embodiments of the image sensor.

[0023] Figure 8 and Figure 9 Show Figure 2A-2G The top view of some embodiments of the image sensor, wherein the pixels include more than one photodetector region.

[0024] Figure 10A , 10B 10C, 10D to Figure 16A , 16B Figures 16C and 16D show various views of some embodiments of a method for forming an image sensor including an STI structure on a DTI structure.

[0025] Figure 17 Flowcharts illustrating some embodiments of a method for forming an image sensor including an STI structure on a DTI structure. Detailed Implementation

[0026] The following disclosure provides numerous different embodiments or examples for implementing various features of the provided subject matter. Specific examples of components and arrangements are described below to simplify this disclosure. Of course, these are merely examples and are not intended to be limiting. For example, the following description may include embodiments where a first feature is formed above or on a second feature, wherein the first and second features are formed in direct contact, and may also include embodiments where an additional feature may be formed between the first and second features, such that the first and second features are not in direct contact. Furthermore, reference numerals and / or letters may be repeated in various examples of the present invention. Such repetition is for simplicity and clarity and does not, in itself, define the relationship between the various embodiments and / or architectures discussed.

[0027] Furthermore, for ease of description, this document uses spatially relative terms such as "below," "under," "down," "above," and "upper" to describe the relationship between one component or feature and another component, as shown in the figure. In addition to the orientations depicted in the figure, the spatially related terms are intended to cover different orientations of the device during use or operation. The device may be oriented in other ways (rotated 90 degrees or otherwise) and the spatially relative descriptors used herein will be interpreted accordingly.

[0028] The image sensor includes a photodetector within a semiconductor substrate. A floating node is located on the semiconductor substrate and adjacent to the photodetector. A transferred gate is located between the photodetector and the floating node. A deep trench isolation (DTI) structure extends from the back side of the semiconductor substrate to the substrate and surrounds the photodetector. The DTI structure extends directly below the floating node.

[0029] In some examples, to avoid damaging the floating node, the depth of the DTI structure (measured from the back side of the substrate to the front side) is reduced, such that the top surface of the DTI structure is spaced apart from the bottom of the floating node. An isolation region of the substrate extends from the front side of the substrate to the back side and reaches the top of the DTI structure, so that the DTI structure and the isolation region together electrically isolate the photodetector from adjacent photodetectors. Because the depth of the DTI structure is reduced (e.g., the distance between the top surface of the DTI structure and the front side of the substrate increases), the depth of the isolation region (measured from the front side of the substrate to the back side) is increased to ensure that the isolation region reaches the DTI structure. However, increasing the depth of the isolation region may lead to an increase in the width of the isolation region, which may reduce the full well capacity (FWC) of the photodetector.

[0030] In some cases, to address this challenge, the depth of the DTI structure is increased, in addition to the floating node. By increasing the depth of the DTI structure (measured from the back side), the depth of the isolation region (measured from the front side) can be reduced. Therefore, the width of the isolation region can be reduced, thus increasing the FWC of the photodetector. However, when the depth of the DTI structure increases, portions of the DTI structure can extend across the front side of the substrate. This can cause damage, thereby reducing the performance and / or reliability of the image sensor.

[0031] In various embodiments of this invention, the shallow trench isolation (STI) structure extends from the front side of the semiconductor substrate directly above the DTI structure to the semiconductor substrate, preventing the DTI structure from crossing the front side of the substrate. The DTI structure extends into the STI structure but does not cross the top of the STI structure. Therefore, damage can be reduced.

[0032] Figure 1A , Figure 1B , Figure 1D , Figure 1E and Figure 1FCross-sectional views 100a, 100b, 100d, 100e, and 100f are shown for some embodiments of an image sensor including shallow trench isolation (STI) structures 138, 140, 142, and 144 in a deep trench isolation (DTI) structure 120. Figure 1C Show Figure 1B Enlarged cross-sectional view 100c of some embodiments of the image sensor. Figure 1G Show Figure 1A , Figure 1B , Figure 1C , Figure 1D , Figure 1E and Figure 1F The image sensor is shown as a top view 100g in some embodiments. In some embodiments, the cross-sectional views 100a, 100b, 100d, 100e, and 100f may, for example, be along... Figure 1G Cut off lines A1-A1', B1-B1', C1-C1', D1-D1', and E1-E1'.

[0033] refer to Figure 1A-1G The image sensor includes pixels 102 along a semiconductor substrate 104. Pixel 102 includes a photodetector 106 in the semiconductor substrate 104. For example, a bulk region 108 of the substrate 104 having a first doping type (e.g., p-type or n-type) and a photodetector region 110 of the substrate 104 having a second doping type (e.g., n-type or p-type) form the photodetector 106, the second doping type being different from the first doping type. A floating node 112 (e.g., a floating diffusion region) is located in the substrate 104 and adjacent to the photodetector 106. The floating node 112 has the second doping type. A transfer gate 114 is located above the photodetector region 110 and the floating node 112 and between the photodetector region 110 and the floating node 112. A dielectric structure 116 including one or more dielectric layers is on the substrate 104. A plurality of conductive interconnects 118 are present within the dielectric structure 116. Some conductive interconnects 118 are coupled to the transfer gate 114, and some are coupled to the floating node 112.

[0034] A deep trench isolation (DTI) structure 120 extends from the back side 104b to the front side 104f of the substrate 104 into the substrate 104 (along direction 101z) and surrounds the photodetector 106. The DTI structure 120 includes a plurality of first walls (e.g., first wall 122 and second wall 124) that extend along a first direction (e.g., direction 101y) and are laterally spaced from each other. The DTI structure 120 includes a plurality of second walls (e.g., third wall 126 and fourth wall 128) that extend along a second direction transverse to the first direction (e.g., direction 101x) and are laterally spaced from each other. The first and second walls of the DTI structure 120 intersect at an intersection point. For example, the first wall 122 and the third wall 126 intersect at the first intersection point 130, the first wall 122 and the fourth wall 128 intersect at the second intersection point 132, the second wall 124 and the fourth wall 128 intersect at the third intersection point 134, and the second wall 124 and the third wall 126 intersect at the fourth intersection point 136.

[0035] Forming the DTI structure 120 includes etching from the back side 104b of the substrate 104 into the substrate 104 to form trenches in the substrate 104. The trenches have a plurality of first “channels” and a plurality of second “channels”. An isolation material is deposited in the first channel of the trench to form a first wall of the DTI structure 120. Isolation material is deposited in the second channels of the trench to form a second wall of the DTI structure 120. In some cases, the etching depth is greater at the intersections of the trench channels (e.g., at intersections 130, 132, 134, 136) because the etching extends along two lateral directions at these intersections (e.g., in the first direction (along 101y) and the second direction (along 101x)). Therefore, in some cases, the etching may extend deeper than desired at these intersections. For example, in some cases, the etching may extend through the front side 104f of the substrate 104 at these intersections, such as... Figure 1A , Figure 1B and Figure 1D As shown by the dashed line 158. Such excessive etching can damage the image sensor, which may reduce its performance and / or reliability.

[0036] Therefore, the image sensor includes shallow trench isolation (STI) structures (e.g., first STI structure 138, second STI structure 140, third STI structure 142, and fourth STI structure 144) at the intersections of the walls (e.g., at the first intersection 130, the second intersection 132, the third intersection 134, and the fourth intersection 136, respectively) to prevent etching from extending through the front side 104f of the substrate 104. The STI structures 138, 140, 142, and 144, located directly above the DTI structure 120 at the intersections of the walls of the DTI structure 120, extend from the front side 104f of the substrate 104 toward the back side 104b into the substrate 104 (along direction 101z). The etching rates of the STI structures 138, 140, 142, and 144 are substantially lower than the etching rate of the substrate 104. Therefore, the STI structures 138, 140, 142, and 144 slow down the etching at the intersections. For example, the etching (and therefore the DTI structure 120) extends to the bottom of the STI structures 138, 140, 142, and 144, but does not penetrate the top of the STI structures 138, 140, 142, and 144. Because the STI structures 138, 140, 142, and 144 slow down the etching at the intersections 130, 132, 134, and 136, the possibility of over-etching (and thus damage) at the intersections can be reduced. Furthermore, by including the STI structures above the intersections of the DTI structure 120 but not along the entire length of the wall of the DTI structure 120, electrical noise can be reduced.

[0037] Along the walls of the DTI structure 120 (between the intersections), the DTI structure 120 extends from the back side 104b of the substrate 104 to a first depth 146 at a distance from the back side 104b of the substrate 104. For example, along the first wall 122 (between the first intersection 130 and the second intersection 132), the DTI structure 120 has a first upper surface 120a at a first depth 146 at a distance from the back side 104b of the substrate 104. The first depth is approximately equal to the thickness of the substrate 104, such that the first upper surface 120a of the DTI structure 120 extends along the front side 104f of the substrate 104 (e.g., approximately flush). The DTI structure 120 isolates the pixel 102 from adjacent pixels along the walls of the DTI structure 120.

[0038] At the intersection of the walls of the DTI structure 120, the DTI structure 120 extends from the back side 104b of the substrate 104 to a second depth 148 at a distance from the back side 104b of the substrate 104. For example, at the first intersection 130, the DTI structure 120 has a second upper surface 120b at the second depth 148 at a distance from the back side 104b of the substrate 104. The second depth 148 is less than the first depth 146. Furthermore, at the intersection, the STI structure extends from the front side 104f of the substrate 104 to a third depth 150 at a distance from the back side 104b of the substrate 104. For example, at the first intersection 130, the first STI structure 138 has a first lower surface 138a at the third depth 150 at a distance from the back side 104b of the substrate 104. Furthermore, the first STI structure 138 has a second lower surface 138b on the second upper surface 120b of the DTI structure 120 (e.g., at the second depth 148). The third depth 150 is less than the second depth 148, causing the lower parts of the STI structures 138, 140, 142, and 144 to vertically overlap with the upper part of the DTI structure 120. Together, the DTI structure 120 and the STI structures 138, 140, 142, and 144 isolate pixel 102 from its neighboring pixels at the intersection.

[0039] The first lower surface 138a of the first STI structure 138 lies on the third upper surface 120c of the DTI structure 120. The DTI structure 120 has a first sidewall 120e that extends from the third upper surface 120c to the second upper surface 120b along the inner sidewall 138c of the first STI structure 138. The DTI structure 120 has a second sidewall 120f that extends from the third upper surface 120c to the first upper surface 120a along the outer sidewall 138d of the first STI structure 138.

[0040] The DTI structure 120 has a fourth upper surface 120d, which is directly below the floating node 112. The fourth upper surface 120d is at a fourth depth 152 from the back side 104b of the substrate 104. The fourth depth 152 is less than the third depth 150. The fourth upper surface 120d extends laterally beyond both sides of the floating node 112. The DTI structure 120 has a third sidewall 120g, which extends along the substrate 104 from the fourth upper surface 120d to the first upper surface 120a.

[0041] The floating node 112 is located directly above a wall (e.g., first wall 122) of the DTI structure 120. The floating node 112 is located between the transfer gate 114 and transfer gate 156 of an adjacent pixel (unlabeled) such that the two transfer gates 114, 156 can control the current through the floating node 112.

[0042] Figure 2A , Figure 2B , Figure 2D , Figure 2E and Figure 2F Show each Figure 1A-1G Cross-sectional views 200a, 200b, 200d, 200e, 200f of some embodiments of the image sensor, wherein the substrate 104 includes an isolation region 202 along the front side 104f. Figure 2C Show Figure 2B Enlarged cross-sectional view 200c of some embodiments of the image sensor. Figure 2G Show Figure 2A , Figure 2B , Figure 2C , Figure 2D , Figure 2E and Figure 2F Top view 200g of some embodiments of the image sensor. In some embodiments, the embodiments, cross-sectional views 200a, 200b, 200d, 200e, and 200f may, for example, pass through... Figure 2G Lines A2-A2', B2-B2', D2-D2', E2-2E2', and F2-F2'.

[0043] The isolation region 202 extends from the front side 104f of the substrate 104 to the back side 104b. The isolation region 202 is a doped region of the substrate having a first doping type.

[0044] In some embodiments, the DTI structure 120 is located below the bottom surface of the STI structures 138, 140, 142, and 144 along the walls of the DTI structure 120. For example, the first upper surface 120a of the DTI structure 120 is less than 150 from the back side 104b, such that the first upper surface 120a of the DTI structure 120 is below and spaced apart from the first lower surface 138a of the first STI structure 138. The first sidewall 120e of the DTI structure 120 extends from the first upper surface 120a to the second upper surface 120b along the inner sidewall 138c of the first STI structure 138. The substrate 104 (e.g., the isolation region 202 of the substrate 104) is located between the first lower surface 138a of the first STI structure 138 and the first upper surface 120a of the DTI structure 120.

[0045] The isolation region 202 is located directly above the DTI structure 120 and extends along the sidewall of the DTI structure 120. The isolation region is also present on the sidewall and lower surface of the STI structure (e.g., the outer sidewall 138d and the first lower surface 138a of the first STI structure 138). The isolation region 202 is... Figure 2G (And various other accompanying figures) are shown partially transparent so that the underlying DTI structure 120 can be seen.

[0046] The isolation region 202 extends from the back side 104b to a depth 212 in the substrate. Depth 212 is less than depth 204, such that the bottom portion of the isolation region 202 and the top portion of the DTI structure 120 vertically overlap along the walls of the DTI structure 120. Therefore, the DTI structure 120 and the isolation region 202 together isolate pixel 102 from adjacent pixels along the sides of pixel 102 (e.g., along the walls of the DTI structure 120). In some embodiments, depth 204 is greater than 2.5 micrometers, greater than 2.7 micrometers, or some other suitable value.

[0047] although Figure 2C The diagram shows a first lower surface 138a spaced below a first upper surface 120a of the first STI structure 138. However, in some other embodiments, the first lower surface of the DTI structure 120 (e.g., shown as dashed line 120ab) extends along the first lower surface 138a of the first STI structure 138. For example, the first upper surface of the DTI structure 120 (e.g., 120ab) is at approximately a depth of 150, such that the first lower surface 138a of the first STI structure 138 lies on the first upper surface (e.g., 120ab) of the DTI structure 120. A first sidewall 120e of the DTI structure 120 extends from the first upper surface (e.g., 120ab) along the inner sidewall 138c of the first STI structure 138 to the second upper surface 120b.

[0048] In some other embodiments, the first upper surface of the DTI structure 120 (e.g., shown by dashed line 120ac) is located above the first lower surface 138a of the first STI structure 138. For example, the first upper surface of the DTI structure 120 (e.g., 120ac) is located at a depth 206 from the back side 104b, the depth 206 being greater than depth 150 and less than depth 148, such that the first upper surface (e.g., 120ac) is above the first lower surface 138a of the first STI structure 138 and below the second upper surface 120b. In such an embodiment, the DTI structure 120 has a third upper surface 120c extending along the first lower surface 138a of the first STI structure 138. A second sidewall of the DTI structure 120 (e.g., shown by dashed line 120f) extends from the third upper surface 120c to the first upper surface (e.g., 120ac) along the outer sidewall 138d of the first STI structure 138.

[0049] In some other embodiments, the first upper surface of the DTI structure 120 (e.g., shown by dashed line 120ad) is at a similar depth to the second upper surface 120b of the DTI structure 120. For example, the first upper surface of the DTI structure 120 (e.g., 120ad) is at approximately a depth of 148, such that the first upper surface (e.g., 120ad) is approximately flush with the second upper surface 120b.

[0050] In some other embodiments, the first upper surface of the DTI structure 120 (e.g., shown by dashed line 120ae) is located above the second upper surface 120b of the DTI structure 120. For example, the first upper surface of the DTI structure 120 (e.g., 120ae) is located at a depth 208 from the back side 104b, the depth 208 being greater than the depth 148 and less than the thickness of the substrate, such that the first upper surface (e.g., 120ae) is above the second upper surface 120b and below the front side 104f of the substrate 104.

[0051] In some other embodiments, the first upper surface of the DTI structure 120 (e.g., shown by dashed line 120af) is located at the front side 104f of the substrate 104. For example, the first upper surface of the DTI structure 120 (e.g., 120af) is located at a depth 146 from the back side 104b, which is approximately equal to the thickness of the substrate 104, such that the first upper surface (e.g., 120af) is approximately flush with the front side 104f of the substrate 104. The DTI structure 120 covers the sidewalls 138c of the first STI structure 138 from the first lower surface 138a to the top surface 138e. In some embodiments, the depth 146 (and the thickness of the substrate 104) ranges from 2.8 micrometers to 3.2 micrometers, 2.9 micrometers to 3.1 micrometers, or some other suitable value.

[0052] In some other embodiments, the first upper surface of the DTI structure 120 (e.g., shown by dashed line 120ag) is located above the front side 104f of the substrate 104. For example, the first upper surface of the DTI structure 120 (e.g., 120ag) is located at a depth 210 from the back side 104b, which is greater than the thickness of the substrate 104, such that the first upper surface (e.g., 120ag) is above the front side 104f of the substrate 104.

[0053] Figure 3A Show Figure 2A-2G A cross-sectional view 300a of some embodiments of the image sensor, wherein the first STI structure 138 has three lower surfaces at three different depths from the back side 104b of the substrate 104. Figure 3B Show Figure 3A The image sensor is shown as a top view 300b of some embodiments. In some embodiments, the cross-sectional view 300a may be, for example, along... Figure 3B Cut off line A3-A3'.

[0054] The first upper surface 120a of the DTI structure 120 is located at a depth 302 on the back side 104b. The depth 302 is greater than the second depth 148, such that the first upper surface 120a is above the second upper surface 120b of the DTI structure 120. The first STI structure 138 has a third lower surface 138f at a depth 304 on the back side 104b. The depth 304 is less than the third depth 150, such that the third lower surface 138f of the first STI structure 138 is lower than the first lower surface 138a.

[0055] Figure 4A and Figure 4B They were displayed respectively Figure 2A-2G Cross-sectional views 400a, 400b of some embodiments of the image sensor, wherein the substrate 104 includes a pickup area 402 along the front side 104f of the substrate 104. Figure 4C Show Figure 4A and Figure 4B The image sensor is shown in top view 400c of some embodiments. In some cases, sectional views 400a and 400b may be, for example, along... Figure 4C Cut off lines A4-A4' and B4-B4'.

[0056] Pickup region 402 extends from the front side 104f of substrate 104 toward the back side 104b. Pickup region 402 is a doped region of substrate 104 having a first doping type. Pickup region 402 is disposed at the intersection of the walls of DTI structure 120. DTI structure 120 is perpendicularly spaced from pickup region 402. For example, DTI structure 120 has an upper surface 120h located directly below and spaced from pickup region 402. Upper surface 120h is located at a depth 404 from back side 104b of substrate 104. Depth 404 is less than depth 204. DTI structure 120 has a protrusion at the intersection, thus located directly below pickup region 402. The protrusion protrudes upward toward pickup region 402 and is formed by an upper surface 120i above upper surface 120h. Upper surface 120i is at a depth 406 from back side 104b. Depth 406 is greater than depth 404 but less than depth 204. In some embodiments, depth 404 is approximately equal to depth 152.

[0057] Figure 5A and Figure 5B Show each Figure 2A-2G Cross-sectional views 500a and 500b of some embodiments of the image sensor, wherein the floating node 112 is located at the intersection of one wall of the DTI structure 120 and another wall of the DTI structure 120. Figure 5C Show Figure 5A and Figure 5BThe image sensor is shown in top view 500c of some embodiments. In some embodiments, cross-sectional views 500a and 500b may, for example, be along... Figure 5C Cut off lines A5-A5' and B5-B5'.

[0058] The DTI structure 120 is perpendicularly spaced from the floating node 112. For example, the DTI structure 120 has a fourth upper surface 120d, located directly below and spaced from the floating node 112. The DTI structure 120 has a protrusion at an intersection (e.g., a first intersection 130), thus located directly below the floating node 112. The protrusion projects upward toward the floating node 112 and is formed by an upper surface 120j above the fourth upper surface 120d. The upper surface 120j is at a depth 502 from the back side 104b. The depth 502 is greater than the depth 152 and less than the depth 204.

[0059] Figure 6A Show Figure 2A-2G A cross-sectional view 600a of some embodiments of the image sensor, wherein both the floating node 112 and the pickup area 402 are located at the intersection of the walls of the DTI structure 120. Figure 6B Show Figure 6A The image sensor is shown as a top view 600b of some embodiments. In some embodiments, the cross-sectional view 600a may be, for example, along... Figure 6B Cut off line A6-A6'.

[0060] In some embodiments, the pickup area 402 and the floating node 112 are located at opposite (e.g., diagonal) intersections of the walls of the DTI structure 120. In some embodiments, depth 502 is approximately equal to depth 406.

[0061] Figure 7A and Figure 7B Show each Figure 2A-2G Cross-sectional views 700a, 700b of some embodiments of the image sensor, wherein the DTI structure 120 is laterally spaced from the floating node 112. Figure 7C Show Figure 7A and Figure 7B Top view 700c of some embodiments of the image sensor. In some embodiments, cross-sectional views 700a and 700b may, for example, be along... Figure 7C Cut off lines A7-A7' and B7-B7'.

[0062] The DTI structure 120 does not extend directly below the floating node 112. Instead, the bulk region 108 of the substrate 104 extends from the bottom of the floating node 112 to the back side 104b of the substrate 104. The sidewalls (not labeled) of the DTI structure 120 are laterally spaced from the sides of the floating node 112.

[0063] Figure 8 and Figure 9 Show each Figure 2A-2G Top views 800, 900 of some embodiments of the image sensor, wherein pixel 102 includes more than one photodetector region.

[0064] In some embodiments (e.g., such as) Figure 8 As shown, pixel 102 includes two photodetector regions. Block region 108 extends along an inter-pixel overflow path (e.g., shown by line 804) from one side of one photodetector region 110 to one side of another photodetector region 802. In some embodiments, pickup region 402 is located between photodetector regions 110 and 802.

[0065] In some other embodiments (e.g., such as) Figure 9 As shown, pixel 102 includes four photodetector regions. Block region 108 extends along the pixel path (e.g., shown by line 908) between the four photodetector regions 110, 902, 904, and 906.

[0066] Figure 10A , 10B 10C, 10D to Figure 16A , 16B Figures 16C and 16D show various views of some embodiments of a method for forming an image sensor including STI structures 138, 140, 142, and 144 on a DTI structure 120. Although Figure 10A , 10B 10C, 10D to Figure 16A , 16B 16C and 16D are descriptions of the methods, but it should be understood that... Figure 10A , 10B 10C, 10D to Figure 16A , 16B The structures disclosed in 16C and 16D are not limited to this method, but can be used independently of this method as structures. In some embodiments, the cross-sectional views 1000a, 1000b, and 1000c can, for example, be along... Figure 10D Lines A-A', B-B', and C-C', and sectional views 1100a, 1100b, and 1100c can be, for example, along... Figure 11D Cut off lines A-A', B-B', and C-C', and so on until... Figure 16A , 16B 16C, 16D.

[0067] Each as Figure 10A , 10BAs shown in cross-sectional views 1000a, 1000b, 1000c and top view 1000d of 10C and 10D, a pixel 102 including a photodetector 106 is formed along a substrate 104. For example, a photodetector region 110 is formed in the substrate 104, and a bulk region 108 of the substrate 104 surrounds the photodetector region 110. The bulk region 108 has a first doping type, and the photodetector region 110 has a second doping type different from the first doping type. A transfer gate 114 is formed above the substrate 104.

[0068] In some embodiments, the transfer gate 114 extends from the front side 104f to the back side 104b into the photodetector region 110. A floating node 112 (e.g., a floating diffusion region) is formed in the substrate 104 along the front side 104f. The floating node 112 has a second doping type.

[0069] In some embodiments, an isolation region 202 having a first doping type is formed in the substrate 104 along the front side 104f of the substrate. The isolation region 202 at least partially surrounds the photodetector region 110 along the front side 104f of the substrate 104.

[0070] In some embodiments, a first doped pickup region is provided (e.g., Figures 4A-4C The pickup area 402 is formed in the substrate 104 along the front side 104f.

[0071] In some embodiments, various doped regions are formed in the substrate 104 by ion implantation or some other suitable process. In some embodiments, a transfer gate 114 is formed on and in the substrate 104 by etching the substrate 104, depositing gate material on the substrate, and etching the gate material.

[0072] Each as Figure 11A , 11B As shown in cross-sectional views 1100a, 1100b, 1100c and top view 1100d of 11C and 11D, the front side 104f of the substrate 104 is etched to form an opening 1104 in the substrate 104 at the corner of the pixel 102. The etching extends from the back side 104b of the substrate 104 to a depth 150 in the isolation region 202. In some embodiments, a mask layer 1102 is formed on the substrate 104, and etching is performed according to the opening in the mask layer 1102. In some embodiments, the mask layer 1102 includes photoresist, hard mask material, or some other suitable material. In some embodiments, the etching includes a dry etching process (e.g., plasma etching, reactive ion etching, ion beam etching, etc.) or some other suitable process.

[0073] like Figure 12A , 12BCross-sectional views 1200a, 1200b, 1200c and top view 1200d, respectively, show STI structures 138, 140, 142, and 144 formed in opening 1104. STI structures 138, 140, 142, and 144 are formed by depositing a first dielectric material over front side 104f and within opening 1104, followed by a polishing or planarization process (e.g., chemical mechanical polishing / planarization (CMP), blanket etching of the first dielectric material, or some other suitable process) to remove the first dielectric material from front side 104f and define STI structures 138, 140, 142, and 144. In some embodiments, the first dielectric material comprises silicon dioxide, alumina, or some other suitable material and is deposited by chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), or some other suitable process.

[0074] like Figure 13A , 13B Cross-sectional views 1300a, 1300b, 1300c and top view 1300d, respectively, show a dielectric structure 116 comprising one or more dielectric layers formed over a substrate 104, and a plurality of conductive interconnects 118 formed within the dielectric structure 116. In some embodiments, the dielectric structure 116 is formed by depositing a plurality of dielectric layers on the front side 104f of the substrate 104. In some embodiments, the dielectric layers of the dielectric structure 116 comprise silicon dioxide, silicon nitride, silicon carbide, or some other suitable material, and are deposited using CVD, PVD, ALD, or some other suitable process. In some embodiments, the conductive interconnects 118 are formed by etching the dielectric layers of the dielectric structure 116 and depositing a conductive material over the etched dielectric layers. In some embodiments, the conductive interconnects comprise aluminum, tungsten, or some other suitable material, and are deposited using CVD, PVD, ALD, or some other suitable process.

[0075] like Figure 14A , 14BCross-sectional views 1400a, 1400b, 1400c and top view 1400d, respectively, show the etching of the back side 104b of substrate 104. The etching extends vertically into substrate 104 (e.g., along direction 101z). The etching extends laterally along a first direction (e.g., along direction 101y) to form a first “channel” of trench 1404. The etching also extends laterally along a second direction laterally to the first direction (e.g., along direction 101x) to form a second “channel” of trench 1404 in substrate 104. The etching extends from back side 104b to depth 1406 along the side of pixel 102 (e.g., along the channel of trench 1404) and to depth 1408 along the corner of pixel 102 (e.g., along the intersection of the channels of trench 1404).

[0076] In some embodiments, a mask layer 1402 is formed on the substrate 104, and etching is performed through openings in the mask layer 1402. In some embodiments, the mask layer 1402 comprises photoresist, a hard mask material, or some other suitable material. In some embodiments, the mask layer 1402 is positioned directly above the floating node 112 during etching, so that the substrate 104 directly above the floating node 112 is not etched. In some embodiments, etching comprises a dry etching process or some other suitable process.

[0077] The depth of trench 1404 is greater at the intersection of the trenches because etching is performed at these intersections in two lateral directions (e.g., along 101y and along 101x), rather than in one lateral direction of the trench (e.g., along 101y or along 101x, depending on the trench).

[0078] Each as Figure 15A , 15B As shown in cross-sectional views 1500a, 1500b, 1500c and top view 1500d of 15C, 15D, the back side 104b of substrate 104 is etched to extend trench 1404 into substrate 104 directly above floating node 112, and further into substrate 104 along channels and the intersection of channels 1404. Etching extends from back side 104b into STI structures 138, 140, 142, 144 of pixel 102 to depth 148 at corners (e.g., at the intersections of channels 1404). Along both sides of pixel 102 (e.g., along channels 1404), etching extends into isolation region 202 to at least depth 204. In some embodiments, etching extends along the sides of pixel 102 deeper than depth 204 (e.g., as shown in...). Figure 15B , 15C The dashed lines shown in the diagram, and as shown regarding Figure 2C (As explained).

[0079] Similarly, the depth of trench 1404 is greater at the intersections of the channels of trench 1404 because etching is performed in two lateral directions at these intersections (e.g., along 101y and along 101x), rather than in one lateral direction of the channel of trench 1404 (e.g., along 101y or along 101x, depending on the channel).

[0080] implement Figures 14A-14D and Figures 15A-15D The etching shown causes the channels of trench 1404 to intersect at STI structures 138, 140, 142, and 144. STI structures 138, 140, 142, and 144 prevent etching from extending to the front side 104f of substrate 104 at the intersection of the channels of trench 1404 (where over-etching might be more likely to occur). The etching rates of STI structures 138, 140, 142, and 144 are substantially lower than the etching rate of substrate 104. For example, the etching rates of STI structures 138, 140, 142, and 144 are less than half the etching rate of substrate 104, less than a quarter of the etching rate of substrate 104, or some other suitable rate. Therefore, STI structures 138, 140, 142, and 144 slow down the etching at the intersection of the channels of trench 1404, allowing etching to extend into the STI structure but not through the top of the STI structure. Because the STI structure slows down the etching rate at the intersections of the channels in trench 1404, the possibility of over-etching at these intersections can be reduced. Therefore, the likelihood of damage can be lowered.

[0081] In some embodiments, a mask layer 1502 is formed on a substrate 104, and etching is performed through openings in the mask layer 1502. In some embodiments, the mask layer 1502 includes photoresist, a hard mask material, or some other suitable material. In some embodiments, etching includes a dry etching process or some other suitable process.

[0082] Each as Figure 16A , 16B As shown in cross-sectional views 1600a, 1600b, 1600c and top view 1600d of 16C and 16D, a DTI structure 120 is formed in trench 1404. In some embodiments, the DTI structure 120 is formed by the following steps: A second dielectric is deposited over the back side 104b and in the trench 1404, and subsequently a polishing or planarization process is performed on the second dielectric to remove the second dielectric from over the back side 104b and further define the DTI structure 120. In some embodiments, the second dielectric comprises silicon dioxide, aluminum oxide, or some other suitable material and is deposited by a CVD process, a PVD process, an ALD process, or some other suitable process.

[0083] Figure 17 Flowcharts illustrating some embodiments of a method 1700 for forming an image sensor including an STI structure on a DTI structure are provided. While method 1700 is shown and described below as a series of actions or events, it should be understood that the order in which these actions or events are shown should not be construed as limiting. For example, some actions may occur in a different order and / or simultaneously with other actions or events besides those shown and / or described herein. Furthermore, not all actions shown require implementation of one or more aspects or embodiments described herein. Additionally, one or more actions described herein may be performed in one or more separate actions and / or stages.

[0084] At block 1702, a photodetector is formed in the semiconductor substrate. Figure 10A , 10B 10C and 10D respectively show various views 1000a, 1000b, 1000c and 1000d of an embodiment of corresponding block 1702.

[0085] At block 1704, the front side of the semiconductor substrate is etched to form an opening in the semiconductor substrate. Figure 11A , 11B 11C and 11D show various views 1100a, 1100b, 1100c and 1100d corresponding to some embodiments of block 1704, respectively.

[0086] At block 1706, a shallow ditch isolation structure is formed in the opening. Figure 12A , 12B 12C and 12D show various views 1200a, 1200b, 1200c and 1200d corresponding to some embodiments of block 1706, respectively.

[0087] At block 1708, the back side of the semiconductor substrate and the shallow trench isolation structure are etched to form a trench in the semiconductor substrate and the shallow trench isolation structure. Figure 14A , 14B 14C, 14D and Figure 15A , 15B Views 1400a, 1400b, 1400c, 1400d, 1500a, 1500b, 1500c, and 1500d, respectively, corresponding to block 1708. For example, the first etching followed by the second etching.

[0088] At block 1710, a deep ditch isolation structure is formed in the ditch. Figure 16A , 16B16C and 16D show various views 1600a, 1600b, 1600c and 1600d corresponding to some embodiments of block 1710, respectively.

[0089] Therefore, embodiments of the present invention relate to an image sensor and a method for forming such an image sensor, the image sensor including an STI structure located above the DTI structure at the intersection of the walls of the DTI structure, to prevent the DTI structure from extending through the front side of the substrate at the intersection.

[0090] Therefore, in some embodiments, this utility model relates to an image sensor including a photodetector in a semiconductor substrate. A floating node is located on the semiconductor substrate and adjacent to the photodetector. A transfer gate is located between the photodetector and the floating node. A deep trench isolation (DTI) structure extends from the back side of the semiconductor substrate to the semiconductor substrate. A shallow trench isolation (STI) structure extends from the front side of the semiconductor substrate to the semiconductor substrate and is located above the DTI structure. The DTI structure extends from the back side of the semiconductor substrate to a first depth. The DTI structure extends from the back side of the STI structure to a second depth, the first depth being different from the first depth.

[0091] In some embodiments, the DTI structure has an upper surface at the second depth, wherein the second depth is less than the thickness of the semiconductor substrate, and wherein the lower surface of the STI structure is on the upper surface of the DTI structure. In some embodiments, the DTI structure has an upper surface at the first depth, wherein the first depth is approximately equal to the thickness of the semiconductor substrate, and the upper surface extends along the front side of the semiconductor substrate adjacent to the STI structure. In some embodiments, the image sensor further includes: an isolation region in the semiconductor substrate and adjacent to the STI structure, the isolation region extending from the front side of the semiconductor substrate toward the back side of the semiconductor substrate and surrounding the photodetector, wherein the DTI structure extends from the back side to the isolation region to the first depth. In some embodiments, the DTI structure has an upper surface at the first depth, wherein the isolation region is between the upper surface and the front side of the semiconductor substrate, and wherein the isolation region extends along the upper surface of the DTI structure and below the upper surface, extending along a first sidewall and a second sidewall of the DTI structure. In some embodiments, the DTI structure is spaced apart from the floating node below the floating node, and wherein the DTI structure extends from the back side below the floating node to the semiconductor substrate to a third depth, the third depth being less than the first depth and the second depth. In some embodiments, the DTI structure has a protrusion that protrudes upward toward the floating node from the third depth below the floating node.

[0092] In other embodiments, this invention relates to an image sensor including a semiconductor substrate. A bulk region of the semiconductor substrate has a first doping type. A photodetector region of the semiconductor substrate has a second doping type different from the first doping type. A floating region of the semiconductor substrate has the second doping type and extends from the front side of the semiconductor substrate to the back side. A transfer gate is located along the front side of the semiconductor substrate. The transfer gate is situated above the photodetector region and the floating region and between the photodetector region and the floating region. A deep trench isolation (DTI) structure extends from the back side to the front side of the semiconductor substrate and surrounds the photodetector region. The DTI structure has a first upper surface at a first depth along a first wall of the DTI structure and at a first depth from the back side of the semiconductor substrate. The DTI structure has a second upper surface at a second depth along the intersection of the DTI structure from the back side of the semiconductor substrate, where the first wall and the second wall of the DTI structure intersect. The second depth is different from the first depth. A shallow trench isolation (STI) structure extends from the front side to the back side of the semiconductor substrate and extends above the DTI structure at the intersection of the DTI structure. The STI structure has a first lower surface at a third depth from the back side of the semiconductor substrate. The STI structure has a second lower surface on the second upper surface of the DTI structure. The third depth is smaller than the second depth, such that the lower part of the STI structure vertically overlaps with the first upper part of the DTI structure.

[0093] In some embodiments, the isolation region of the semiconductor substrate has the first doping type, the isolation region extending from the front side of the semiconductor substrate along the first wall of the DTI structure toward the back side of the semiconductor substrate to a fourth depth, the fourth depth being less than the first depth, such that the lower portion of the isolation region perpendicularly overlaps with the second upper portion of the DTI structure along the first wall of the DTI structure. In some embodiments, the first depth is less than the third depth, and the semiconductor substrate lies between the first upper surface of the DTI structure and the first lower surface of the STI structure. In some embodiments, the first depth is greater than the third depth and less than the second depth, such that the first upper surface of the DTI structure is above the first lower surface of the STI structure and below the second upper surface of the DTI structure, wherein the first lower surface of the STI structure lies on the third upper surface of the DTI structure. In some embodiments, the first depth is greater than the second depth and less than the thickness of the semiconductor substrate, such that the first upper surface of the DTI structure is higher than the second upper surface of the DTI structure and lower than the front side of the semiconductor substrate, wherein the first lower surface of the STI structure lies on the third upper surface of the DTI structure. In some embodiments, the first depth is approximately equal to the thickness of the semiconductor substrate, such that the first upper surface of the DTI structure extends along the front side of the semiconductor substrate, wherein the first lower surface of the STI structure is located on the third upper surface of the DTI structure. In some embodiments, the first depth is greater than the thickness of the semiconductor substrate, such that the first upper surface of the DTI structure is higher than the front side of the semiconductor substrate, wherein the first lower surface of the STI structure is located on the third upper surface of the DTI structure. In some embodiments, the STI structure has a third lower surface located at a fourth depth from the back side of the semiconductor substrate, the fourth depth being less than the second depth and the third depth, such that the third lower surface is lower than the first lower surface and the second lower surface of the STI structure.

[0094] The above summary of features and embodiments is intended to enable those skilled in the art to better understand the purpose of the embodiments of this utility model. Those skilled in the art should understand that they can readily use the embodiments of this utility model as a basis for designing or modifying other processes and structures to achieve the same purpose and / or the same advantages as the embodiments described herein. Those skilled in the art should also recognize that such equivalent constructions do not depart from the spirit and scope of the embodiments of this utility model, and that various changes, substitutions, and alterations can be made without departing from the spirit and scope of this disclosure.

[0095] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present utility model, and are not intended to limit them. Although the present utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the present utility model embodiments.

Claims

1. An image sensor, characterized in that, include: Photodetector, in a semiconductor substrate; A floating node is located in the semiconductor substrate and next to the photodetector; A transfer gate is located above and between the photodetector and the floating node; A deep trench isolation structure extends from the back side of the semiconductor substrate into the semiconductor substrate; as well as A shallow trench isolation structure extends from the front side of the semiconductor substrate into the semiconductor substrate and above the deep trench isolation structure. The deep trench isolation structure extends from the back side to the semiconductor substrate to a first depth, and the deep trench isolation structure extends from the back side to the shallow trench isolation structure to a second depth, wherein the second depth is different from the first depth.

2. The image sensor according to claim 1, characterized in that, The deep trench isolation structure has an upper surface at the second depth, wherein the second depth is less than the thickness of the semiconductor substrate, and wherein the lower surface of the shallow trench isolation structure is on the upper surface of the deep trench isolation structure.

3. The image sensor according to claim 1, characterized in that, The deep trench isolation structure has an upper surface at the first depth, and the first depth is equal to the thickness of the semiconductor substrate, and the upper surface extends along the front side of the semiconductor substrate adjacent to the shallow trench isolation structure.

4. The image sensor according to claim 1, characterized in that, Also includes: An isolation region, in the semiconductor substrate and adjacent to the shallow trench isolation structure, the isolation region extending from the front side of the semiconductor substrate toward the back side of the semiconductor substrate and surrounding the photodetector, wherein the deep trench isolation structure extends from the back side to the isolation region to the first depth, wherein the deep trench isolation structure has an upper surface at the first depth, and wherein the isolation region is between the upper surface and the front side of the semiconductor substrate, and wherein the isolation region extends along the upper surface of the deep trench isolation structure and below the upper surface, extending along the first sidewall and the second sidewall of the deep trench isolation structure.

5. The image sensor according to claim 1, characterized in that, The deep trench isolation structure is spaced apart from the floating node below the floating node, and the deep trench isolation structure extends from the back side below the floating node to the semiconductor substrate to a third depth, the third depth being less than the first depth and the second depth.

6. The image sensor according to claim 5, characterized in that, The deep trench isolation structure has a protrusion that protrudes upward from the third depth toward the floating node below the floating node.

7. An image sensor, characterized in that, include: A semiconductor substrate, wherein a bulk region of the semiconductor substrate has a first doping type, a photodetector region of the semiconductor substrate has a second doping type different from the first doping type, and a floating region of the semiconductor substrate has the second doping type and extends from the front side of the semiconductor substrate to the back side of the semiconductor substrate; A transfer gate, along the front side of the semiconductor substrate, the transfer gate being above the photodetector region and the floating region and between the photodetector region and the floating region; A deep trench isolation structure extends from the back side of the semiconductor substrate toward the front side into the semiconductor substrate and surrounds the photodetector region. The deep trench isolation structure has a first upper surface extending from the back side of the semiconductor substrate along a first wall of the deep trench isolation structure to a first depth, and a second upper surface extending from the back side of the semiconductor substrate along a point where the deep trench isolation structure intersects to a second depth, wherein the first wall and the second wall of the deep trench isolation structure intersect, and the second depth is different from the first depth. as well as A shallow trench isolation structure extends from the front side of the semiconductor substrate toward the back side into the semiconductor substrate and extends above the deep trench isolation structure at the intersection of the deep trench isolation structure. The shallow trench isolation structure has a first lower surface located at a third depth from the back side of the semiconductor substrate. The shallow trench isolation structure has a second lower surface located on the second upper surface of the deep trench isolation structure. The third depth is less than the second depth, such that the lower portion of the shallow trench isolation structure vertically overlaps with the first upper portion of the deep trench isolation structure.

8. The image sensor according to claim 7, characterized in that, The isolation region of the semiconductor substrate has the first doping type, and the isolation region extends from the front side of the semiconductor substrate along the first wall of the deep trench isolation structure to the back side of the semiconductor substrate to a fourth depth, the fourth depth being less than the first depth, such that the lower part of the isolation region vertically overlaps with the second upper part of the deep trench isolation structure along the first wall of the deep trench isolation structure.

9. The image sensor according to claim 8, characterized in that, The first depth is less than the third depth, and the semiconductor substrate is located between the first upper surface of the deep trench isolation structure and the first lower surface of the shallow trench isolation structure.

10. The image sensor according to claim 8, characterized in that, Wherein the first depth is greater than the third depth and less than the second depth, such that the first upper surface of the deep ditch isolation structure is above the first lower surface of the shallow ditch isolation structure and below the second upper surface of the deep ditch isolation structure, and wherein the first lower surface of the shallow ditch isolation structure is located on the third upper surface of the deep ditch isolation structure.

Images