An LED chip, a high-voltage LED chip
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- YANGZHOU CHANGELIGHT
- Filing Date
- 2025-06-23
- Publication Date
- 2026-06-26
Smart Images
Figure CN224419206U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of LED chips, and in particular to an LED chip and a high-voltage LED chip. Background Technology
[0002] Light-emitting diodes (LEDs) have advantages such as high efficiency, long lifespan, small size, and low power consumption, and are widely used in indoor and outdoor white light lighting, screen displays, backlights, and other fields. The function of an LED chip is to convert electrical energy into light energy. Specifically, it includes an epitaxial wafer and N-type and P-type electrodes respectively disposed on the epitaxial wafer. The epitaxial wafer includes a P-type semiconductor layer, an N-type semiconductor layer, and an active region located between the N-type and P-type semiconductor layers. When current flows through the LED chip, holes in the P-type semiconductor and electrons in the N-type semiconductor move towards the active region and recombine there, causing the LED chip to emit light.
[0003] As LEDs continue to expand in the display application market, especially in small-sized products (such as Mini-LEDs), tri-color LED chips are typically used, meaning LEDs that emit red, green, and blue light. However, the narrow beam angle of small-sized products (such as Mini-LEDs) limits their application, particularly noticeable with red LED chips. Green and blue Mini-LEDs typically have a beam angle of around 130 degrees, while conventional red LEDs have a beam angle of around 120 degrees. Clearly, the beam angle of red LEDs is smaller than that of green and blue LEDs. Therefore, when tri-color Mini-LED chips are used in a display product, the product will appear bluish when viewed from the side, resulting in poor display quality and failing to meet current high-quality display requirements.
[0004] To address these issues, existing technologies typically employ a method of back-depositing a DBR reflective film on the back side of the substrate after grinding. However, for thin wafers (especially small-sized LED chips with a thickness of <100µm) after grinding, wafer breakage is easily caused during the loading and unloading process of the back-depositing operation. Secondly, dirt on the back side after grinding can easily introduce foreign objects, affecting the actual light output effect of the back reflection. Furthermore, due to the accumulation of edge damage during grinding or back-depositing and the inability to perfectly match the thermal expansion coefficients of the DBR film and the substrate, back-side splitting can easily cause back chipping during subsequent hidden cutting operations, affecting the yield of chip fabrication.
[0005] In view of this, the inventor has specifically designed an LED chip and a high-voltage LED chip, which leads to this invention. Utility Model Content
[0006] The purpose of this invention is to provide an LED chip and a high-voltage LED chip to solve the technical problems of small light-emitting angle and low chip manufacturing yield in the prior art.
[0007] To achieve the above objectives, the technical solution adopted by this utility model is as follows:
[0008] An LED chip includes a substrate and a plurality of LED light-emitting units disposed on the surface of the substrate and spaced apart from each other by trenches. The LED chip includes:
[0009] A transparent bonding layer located between the LED light-emitting unit and the substrate;
[0010] A reflective layer is provided on one side surface of the transparent bonding layer;
[0011] The substrate includes a transparent substrate.
[0012] Preferably, the reflective layer is disposed on the surface of the transparent bonding layer opposite to the LED light-emitting unit.
[0013] Preferably, the reflective layer is disposed on the surface of the transparent bonding layer near the LED light-emitting unit.
[0014] Preferably, the LED light-emitting unit has a roughened surface on the side closest to the substrate.
[0015] Preferably, a first transparent oxide layer is provided on the roughened surface of the LED light-emitting unit.
[0016] Preferably, the transparent bonding layer is disposed between the first transparent oxide layer and the reflective layer.
[0017] Furthermore, the substrate has a roughened surface on the side near the LED light-emitting unit, and a second transparent oxide layer is provided between the substrate and the reflective layer.
[0018] Alternatively, the reflective layer may be disposed between the first transparent oxide layer and the transparent bonding layer.
[0019] Furthermore, the substrate has a roughened surface on the side near the LED light-emitting unit, and a second transparent oxide layer is provided between the substrate and the transparent bonding layer.
[0020] Preferably, the side of the first transparent oxide layer facing the reflective layer is a flat surface.
[0021] Preferably, the side of the second transparent oxide layer facing the reflective layer is a flat surface.
[0022] Preferably, the reflective layer comprises a DBR reflector.
[0023] Preferably, the transparent bonding layer includes a transparent insulating material layer, the first transparent oxide layer includes a transparent insulating material layer and / or a transparent conductive material layer, and the second transparent oxide layer includes a transparent insulating material layer.
[0024] Preferably, the transparent bonding layer, the first transparent oxide layer, and the second transparent oxide layer comprise silicon oxide layers.
[0025] Preferably, the LED light-emitting unit includes an epitaxial wafer, a first electrode, and a second electrode disposed above the substrate;
[0026] The epitaxial wafer includes a first type semiconductor layer, an active region, and a second type semiconductor layer stacked sequentially, wherein the active region is located between the first type semiconductor layer and the second type semiconductor layer; the first electrode is electrically connected to the first type semiconductor layer; and the second electrode is electrically connected to the second type semiconductor layer.
[0027] Preferably, an insulating layer is provided on the surface and sidewalls of the epitaxial wafer, and the insulating layer has a first opening and a second opening;
[0028] The first opening exposes at least a portion of the surface of the first electrode, and the second opening exposes at least a portion of the surface of the second electrode.
[0029] Preferably, if the LED chip is a flip-chip LED chip, then the insulating layer includes a passivation layer and a reflector stacked sequentially.
[0030] Preferably, the LED chip is a red flip-chip LED, and the substrate includes a sapphire substrate.
[0031] This utility model also provides a high-voltage LED chip, wherein the high-voltage LED chip electrically interconnects the electrodes of adjacent LED light-emitting units as described above through a bridging electrode, and maintains one LED light-emitting unit with its first electrode exposed and the other LED light-emitting unit with its second electrode exposed; wherein the bridging electrode connects two adjacent LED units.
[0032] Preferably, the high-voltage LED chip is a high-voltage flip-chip LED chip, and the high-voltage flip-chip LED chip further includes an insulating reflector disposed on the surface of each light-emitting unit facing away from the substrate.
[0033] As can be seen from the above technical solution, the LED chip provided by this utility model includes: a transparent bonding layer located between the LED light-emitting unit and the substrate; a reflective layer provided on one side surface of the transparent bonding layer; wherein the substrate includes a transparent substrate. Based on this, by adjusting the position of the reflective layer, the reflective layer is deposited on the surface of the transparent bonding layer (instead of being directly deposited on the back of the substrate), eliminating the need for back-plating of the reflective layer on the substrate. This improves the LED light-emitting angle while avoiding foreign matter contamination introduced by substrate grinding and reducing the probability of breakage due to an excessively thin substrate. Simultaneously, the transparent bonding layer, located between the LED unit and the substrate, acts as an intermediate buffer layer, enhancing the overall structural strength of the thin film (substrate side) and reducing the risk of back breakage during subsequent hidden cutting operations.
[0034] Secondly, the reflective layer is disposed on the side of the transparent bonding layer away from the LED light-emitting unit (i.e., the reflective layer is close to the substrate); while achieving the above-mentioned beneficial effects, the reflective layer can directly reflect the downward-propagating light to the light-emitting surface, reducing the light loss on the substrate side.
[0035] Alternatively, the reflective layer can be disposed on the transparent bonding layer (i.e., the reflective layer is close to the epitaxial film of the light-emitting unit); while achieving the above-mentioned beneficial effects, the reflective layer preferentially reflects the transverse light generated by the active region to improve the light extraction efficiency.
[0036] Next, by setting a roughened surface on the side of the LED light-emitting unit near the substrate, the surface roughening disrupts total internal reflection, increases the light scattering path, and improves the light extraction efficiency.
[0037] Furthermore, by configuring a first transparent oxide layer on the roughened surface of the LED light-emitting unit, and further, by making the side of the first transparent oxide layer facing the reflective layer flat, the uneven structure of the roughened surface of the LED light-emitting unit is covered by the flattened transparent oxide layer, providing a smooth interface for the reflective layer (DBR) and reducing light scattering loss. Simultaneously, during subsequent hidden cutting operations, the first transparent oxide layer acts as a buffer, further reducing the risk of cracking at the interface of the near-light-emitting unit epitaxial wafer.
[0038] Finally, by setting the substrate to have a roughened surface on the side near the LED light-emitting unit, a second transparent oxide layer is provided between the substrate and the transparent bonding layer; furthermore, the side of the second transparent oxide layer facing the reflective layer is flat. The synergy of the patterned substrate, the second transparent oxide layer with a flat surface, and the reflective layer (DBR) disposed on the substrate surface further enhances the effect of increasing the light-emitting angle of the LED chip.
[0039] This invention also provides a high-voltage LED chip, which electrically interconnects the electrodes of adjacent LED light-emitting units as described above through a bridging electrode, while maintaining one LED light-emitting unit with its first electrode exposed and another LED light-emitting unit with its second electrode exposed; wherein the bridging electrode connects two adjacent LED units. It possesses the beneficial effects of the aforementioned LED chip. Attached Figure Description
[0040] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.
[0041] Figure 1 This is a cross-sectional structural diagram of the LED chip provided in Embodiment 1 of this utility model;
[0042] Figure 2 This is a flowchart of the LED chip fabrication method provided in Embodiment 2 of this utility model;
[0043] Figure 3 This is a cross-sectional structural diagram of the LED chip provided in Embodiment 3 of this utility model;
[0044] Figure 4 This is a cross-sectional structural diagram of the LED chip provided in Embodiment 4 of this utility model;
[0045] Figure 5 This is a cross-sectional structural diagram of the LED chip provided in Embodiment 5 of this utility model;
[0046] Figure 6 This is a cross-sectional structural diagram of the high-voltage LED chip provided in Embodiment 6 of this utility model;
[0047] Explanation of symbols in the diagram:
[0048] 1. Growth substrate;
[0049] 2. Type I semiconductor layer;
[0050] 3. Active region;
[0051] 4. Type II semiconductor layer;
[0052] 5. Second electrode;
[0053] 6. First electrode;
[0054] 7. Insulation layer;
[0055] 8. First pad;
[0056] 9. Second pad;
[0057] 11. Substrate;
[0058] 12. Reflective layer;
[0059] 13. Transparent bonding layer;
[0060] 14. First transparent oxide layer;
[0061] 15. Second transparent oxide layer;
[0062] 16. Bridging electrode;
[0063] 17. Insulating reflector. Detailed Implementation
[0064] To make the content of this utility model clearer, the following description, in conjunction with the accompanying drawings, further illustrates the present utility model. This utility model is not limited to this specific embodiment. All other embodiments obtained by those skilled in the art based on the embodiments of this utility model without inventive effort are within the scope of protection of this utility model.
[0065] An LED chip includes a substrate and a plurality of LED light-emitting units disposed on the surface of the substrate and spaced apart from each other by trenches. The LED chip includes:
[0066] A transparent bonding layer located between the LED light-emitting unit and the substrate;
[0067] A reflective layer is provided on one side surface of the transparent bonding layer;
[0068] The substrate includes a transparent substrate.
[0069] Preferably, the reflective layer is disposed on the surface of the transparent bonding layer opposite to the LED light-emitting unit.
[0070] Preferably, the reflective layer is disposed on the surface of the transparent bonding layer near the LED light-emitting unit.
[0071] Preferably, the LED light-emitting unit has a roughened surface on the side closest to the substrate.
[0072] Preferably, a first transparent oxide layer is provided on the roughened surface of the LED light-emitting unit.
[0073] Preferably, the transparent bonding layer is disposed between the first transparent oxide layer and the reflective layer.
[0074] Furthermore, the substrate has a roughened surface on the side near the LED light-emitting unit, and a second transparent oxide layer is provided between the substrate and the reflective layer.
[0075] Alternatively, the reflective layer may be disposed between the first transparent oxide layer and the transparent bonding layer.
[0076] Furthermore, the substrate has a roughened surface on the side near the LED light-emitting unit, and a second transparent oxide layer is provided between the substrate and the transparent bonding layer.
[0077] Preferably, the side of the first transparent oxide layer facing the reflective layer is a flat surface.
[0078] Preferably, the side of the second transparent oxide layer facing the reflective layer is a flat surface.
[0079] Preferably, the reflective layer comprises a DBR reflector.
[0080] Preferably, the transparent bonding layer includes a transparent insulating material layer, the first transparent oxide layer includes a transparent insulating material layer and / or a transparent conductive material layer, and the second transparent oxide layer includes a transparent insulating material layer.
[0081] Preferably, the transparent bonding layer, the first transparent oxide layer, and the second transparent oxide layer comprise silicon oxide layers.
[0082] Preferably, the LED light-emitting unit includes an epitaxial wafer, a first electrode, and a second electrode disposed above the substrate;
[0083] The epitaxial wafer includes a first type semiconductor layer, an active region, and a second type semiconductor layer, wherein the active region is located between the first type semiconductor layer and the second type semiconductor layer; the first electrode is electrically connected to the first type semiconductor layer; and the second electrode is electrically connected to the second type semiconductor layer.
[0084] Preferably, an insulating layer is provided on the surface and sidewalls of the epitaxial wafer, and the insulating layer has a first opening and a second opening;
[0085] The first opening exposes at least a portion of the surface of the first electrode, and the second opening exposes at least a portion of the surface of the second electrode.
[0086] Preferably, if the LED chip is a flip-chip LED chip, then the insulating layer includes a passivation layer and a reflector stacked sequentially.
[0087] Preferably, the flip-chip is a red flip-chip, and the substrate includes a sapphire substrate.
[0088] This utility model also provides a high-voltage LED chip, wherein the high-voltage LED chip electrically interconnects the electrodes of adjacent LED light-emitting units as described above through bridging electrodes, and maintains one LED light-emitting unit with its first electrode exposed and another LED light-emitting unit with its second electrode exposed; wherein, an isolation layer is provided in the trench, and the bridging electrodes connect two adjacent LED units by being stacked on the isolation layer.
[0089] Preferably, the high-voltage LED chip is a high-voltage flip-chip LED chip, and the high-voltage flip-chip LED chip further includes an insulating reflector disposed on the surface of each light-emitting unit facing away from the substrate.
[0090] As can be seen from the above technical solution, the LED chip provided by this utility model includes: a transparent bonding layer located between the LED light-emitting unit and the substrate; a reflective layer provided on one side surface of the transparent bonding layer; wherein the substrate includes a transparent substrate. Based on this, by adjusting the position of the reflective layer, the reflective layer is deposited on the surface of the transparent bonding layer (instead of being directly deposited on the back of the substrate), eliminating the need for back-plating of the reflective layer on the substrate. This improves the LED light-emitting angle while avoiding foreign matter contamination introduced by substrate grinding and reducing the probability of breakage due to an excessively thin substrate. Simultaneously, the transparent bonding layer, located between the LED unit and the substrate, acts as an intermediate buffer layer, enhancing the overall structural strength of the thin film (substrate side) and reducing the risk of back breakage during subsequent hidden cutting operations.
[0091] Secondly, the reflective layer is disposed on the side of the transparent bonding layer away from the LED light-emitting unit (i.e., the reflective layer is close to the substrate); while achieving the above-mentioned beneficial effects, the reflective layer can directly reflect the downward-propagating light to the light-emitting surface, reducing the light loss on the substrate side.
[0092] Alternatively, the reflective layer can be disposed on the transparent bonding layer (i.e., the reflective layer is close to the epitaxial film of the light-emitting unit); while achieving the above-mentioned beneficial effects, the reflective layer preferentially reflects the transverse light generated by the active region to improve the light extraction efficiency.
[0093] Next, by setting a roughened surface on the side of the LED light-emitting unit near the substrate, the surface roughening disrupts total internal reflection, increases the light scattering path, and improves the light extraction efficiency.
[0094] Furthermore, by configuring a first transparent oxide layer on the roughened surface of the LED light-emitting unit, and further, by making the side of the first transparent oxide layer facing the reflective layer flat, the uneven structure of the roughened surface of the LED light-emitting unit is covered by the flattened transparent oxide layer, providing a smooth interface for the reflective layer (DBR) and reducing light scattering loss. Simultaneously, during subsequent hidden cutting operations, the first transparent oxide layer acts as a buffer, further reducing the risk of cracking at the interface of the near-light-emitting unit epitaxial wafer.
[0095] Finally, by setting the substrate to have a roughened surface on the side near the LED light-emitting unit, a second transparent oxide layer is provided between the substrate and the transparent bonding layer; furthermore, the side of the second transparent oxide layer facing the reflective layer is flat. The synergy of the patterned substrate, the second transparent oxide layer with a flat surface, and the reflective layer (DBR) disposed on the substrate surface further enhances the effect of increasing the light-emitting angle of the LED chip.
[0096] This invention also provides a high-voltage LED chip, which electrically interconnects the electrodes of adjacent LED light-emitting units as described above through a bridging electrode, while maintaining one LED light-emitting unit with its first electrode exposed and another LED light-emitting unit with its second electrode exposed; wherein the bridging electrode connects two adjacent LED units. It possesses the beneficial effects of the aforementioned LED chip.
[0097] Example 1
[0098] Please see Figure 1 This is a cross-sectional structural diagram of the LED chip provided in Embodiment 1. This embodiment provides an LED chip, including a substrate 11 and a plurality of LED light-emitting units disposed on the surface of the substrate 11 and spaced apart from each other by trenches. The LED chip includes:
[0099] A transparent bonding layer 13 is located between the LED light-emitting unit and the substrate 11;
[0100] A reflective layer 12 is disposed on the surface of the transparent bonding layer 13 facing away from the LED light-emitting unit;
[0101] The substrate 11 includes a transparent substrate 11.
[0102] It should be noted that, in order to highlight the technical features of this application, only one light-emitting unit is shown in the embodiment figure. In actual product applications, it may include tens of thousands of light-emitting units, depending on the application of the LED chip product. This application does not limit this.
[0103] Based on the above implementation scheme, the reflective layer 12 is deposited on the lower surface of the transparent bonding layer 13 (instead of being directly deposited on the back side of the substrate 11), eliminating the need for back-plating the reflective layer 12 on the substrate 11. This improves the LED emission angle while avoiding foreign matter contamination introduced by grinding the substrate 11 and reducing the probability of breakage due to the excessive thinness of the substrate 11. Simultaneously, the transparent bonding layer 13, located between the LED unit and the substrate 11, acts as an intermediate buffer layer, enhancing the overall structural strength of the thin film (substrate side) and reducing the risk of back breakage during subsequent hidden cutting operations.
[0104] Secondly, the reflective layer 12 is disposed on the side surface of the transparent bonding layer 13 away from the LED light-emitting unit (i.e., the reflective layer 12 is close to the substrate 11). While achieving the above-mentioned beneficial effects, the reflective layer 12 can directly reflect the downward propagating light to the light-emitting surface, reducing the light loss on the substrate 11 side.
[0105] Optionally, the LED light-emitting unit has a roughened surface on the side near the substrate 11. This roughening of the LED light-emitting unit surface can disrupt total internal reflection, increase the light scattering path, and improve light extraction efficiency. Specifically, in this embodiment of the invention, the roughened surface of the LED light-emitting unit can be a surface that has undergone roughening treatment, or it can be a surface that has undergone patterning treatment.
[0106] Preferably, the roughened surface of the LED light-emitting unit has a random morphology, such as a randomly roughened structure, and the roughness of the randomly roughened structure is 0.1 to 1 micrometer.
[0107] Optionally, a first transparent oxide layer 14 is provided on the roughened surface of the LED light-emitting unit. Further, the side of the first transparent oxide layer 14 facing the reflective layer 12 is a flat surface. This flattening of the first transparent oxide layer 14 covers the uneven structure of the roughened surface of the LED light-emitting unit, providing a smooth interface for the reflective layer 12 (DBR) and reducing light scattering loss. Simultaneously, during subsequent hidden cutting operations, the first transparent oxide layer 14 acts as a buffer, further reducing the risk of cracking at the interface of the near-light-emitting unit epitaxial wafer.
[0108] Preferably, the first transparent oxide layer 14 is planarized to have a flat surface on the side facing the reflective layer 12 through CMP planarization. It should be noted that CMP planarization refers to a planarization process achieved through alternating chemical and mechanical stripping.
[0109] Optionally, the transparent bonding layer 13 is disposed between the first transparent oxide layer 14 and the reflective layer 12.
[0110] Optionally, the transparent bonding layer 13 is a transparent insulating material layer, and the first transparent oxide layer 14 includes either a transparent insulating material layer or a transparent conductive material layer. When the first transparent oxide layer 14 is a transparent insulating material layer, the high bonding strength of the transparent insulating material can be utilized to stabilize the epitaxial wafer and the substrate 11. When a transparent conductive material layer is used as the first transparent oxide layer 14 (such as ITO), its refractive index is relatively low, which can reduce the reflection of light emitted from the semiconductor epitaxial wafer at the interface between the epitaxial wafer and the first transparent oxide layer 14, thereby improving the luminous brightness. At the same time, as a transparent bonding layer 13, the transparent conductive material layer, in contact with the semiconductor layer, can act as a current spreading layer, improving the current spreading effect and enhancing the uniformity of current distribution. The specific material application is selected depending on the situation, and this embodiment does not impose any restrictions on it.
[0111] Optionally, the substrate 11 includes a sapphire substrate 11.
[0112] Optionally, the reflective layer 12 includes a DBR reflector, wherein the DBR reflector comprises M sets of material layer pairs formed by alternating stacks of material layers with a different refractive index, where 2 ≤ a ≤ 6; the a different refractive index material layers are selected from SiO2, SiON, etc. x SiN x Al2O3, MgF2, TiO, TiO2, Ti3O5, Ti2O3, Ta2O5, or ZrO2; the M value ranges from 2 to 50, including the endpoint value.
[0113] Preferably, the transparent bonding layer 13 and the first transparent oxide layer 14 include a silicon oxide layer (refractive index of about 1.5), and the transparent substrate 11 is made of sapphire substrate 11 (refractive index of about 1.7). Both have good light transmittance and good adhesion at the interface, and the refractive index of the silicon oxide layer is lower than that of the semiconductor stack, which is beneficial for light to be output from the semiconductor stack and improves the light extraction efficiency.
[0114] Meanwhile, the DBR reflector includes alternating stacked SiO2 and TiO2 layers, which can match the material system of transparent bonding layer 13 and first transparent oxide layer 14 (silicon oxide layer), further ensuring that the refractive index of the material below the light-emitting unit is lower than the refractive index, light transmittance and interface adhesion of the semiconductor stack, thereby ensuring the stability of the chip light while facilitating output from the semiconductor stack and improving light extraction efficiency.
[0115] Optionally, the LED light-emitting unit includes an epitaxial wafer, a first electrode 6, and a second electrode 5 disposed above the substrate 11;
[0116] The epitaxial wafer includes a first type semiconductor layer 2, an active region 3, and a second type semiconductor layer 4 stacked sequentially, wherein the active region 3 is located between the first type semiconductor layer 2 and the second type semiconductor layer 4; the first electrode 6 is electrically connected to the first type semiconductor layer 2; and the second electrode 5 is electrically connected to the second type semiconductor layer 4.
[0117] The first type semiconductor layer 2 and the second type semiconductor layer 4 have different conductivity types, electrical properties, polarities, or depending on the doped elements, to provide at least electrons or holes; an active region 3 is formed between the first type semiconductor layer 2 and the second type semiconductor layer 4, and the active region 3 can convert electrical energy into light energy. The emitted light wavelength can be adjusted by changing the physical and chemical composition of one or more layers of the semiconductor stack.
[0118] Furthermore, the LED chip also includes a first pad 8 for external contact and connection of the first electrode 6, and a second pad 9 for external contact and connection of the second electrode 5.
[0119] Specifically, the first type semiconductor layer 2 can be composed of a III-V or II-VI compound semiconductor, and can be doped with a first dopant. The first type semiconductor layer 2 can be made of a material with the chemical formula In. X1 Al Y1 Ga 1-X1-Y1 The semiconductor layer 2 is composed of N (0≤X1≤1, 0≤Y1≤1, 0≤X1+Y1≤1) semiconductor materials, such as GaN, AlGaN, InGaN, InAlGaN, etc., or materials selected from AlGaAs, GaP, GaAs, GaAsP, and AlGaInP. Additionally, the first dopant can be an n-type dopant, such as Si, Ge, Sn, Se, and Te. When the first dopant is an n-type dopant, the first type semiconductor layer 2 doped with the first dopant is an n-type semiconductor layer. In this embodiment, it is preferable that the first type semiconductor layer 2 is an n-type semiconductor doped with an n-type dopant.
[0120] The active region 3 is disposed between the first type semiconductor layer 2 and the second type semiconductor layer 4. The active region 3 provides light radiation by facilitating electron-hole recombination. Different materials can be selected depending on the emission wavelength. The active region 3 can be a periodic structure with a single quantum well or multiple quantum wells. The active region 3 includes a well layer and a barrier layer, wherein the barrier layer has a larger band gap than the well layer. By adjusting the composition ratio of the semiconductor materials in the active region 3, it is desired to radiate light of different wavelengths.
[0121] The second type semiconductor layer 4 can be composed of group III-V or group II-VI compound semiconductors. The second type semiconductor layer 4 can be composed of materials with the chemical formula In. X1 Al Y1 Ga 1-X1-Y1The semiconductor layer 4 is composed of N (0≤X1≤1, 0≤Y1≤1, 0≤X1+Y1≤1), such as GaN, AlGaN, InGaN, InAlGaN, etc., or materials selected from AlGaAs, GaP, GaAs, GaAsP, and AlGaInP. The second-type semiconductor layer 4 may be doped with a second dopant. When the second dopant is a p-type dopant, such as Mg, Zn, Ca, Sr, and Ba, the second-type semiconductor layer 4 doped with the second dopant is a p-type semiconductor layer. In this embodiment, it is preferable that the second-type semiconductor layer 4 is a p-type semiconductor doped with a p-type dopant.
[0122] Optionally, an insulating layer 7 is provided on the surface and sidewalls of the epitaxial wafer, and the insulating layer 7 has a first opening and a second opening;
[0123] The first opening exposes at least a portion of the surface of the first electrode 6, and the second opening exposes at least a portion of the surface of the second electrode 5.
[0124] Optionally, if the LED chip is a flip-chip LED chip, then the insulating layer 7 includes a passivation layer and a reflector stacked sequentially.
[0125] The reflector can be a DBR reflector directly disposed on the surface of the epitaxial wafer, or it can be a metal reflector that is insulated from the epitaxial wafer by a passivation layer; the specific material application is selected as appropriate, and this embodiment does not limit it.
[0126] The passivation layer includes, but is not limited to, a silicon oxide passivation layer.
[0127] Optionally, the LED chip is a red flip-chip LED. The red flip-chip is adapted to the sapphire substrate 11 and, together with the reflector (DBR), transparent bonding layer 13, roughened surface epitaxial wafer, and first / second transparent oxide layer 15, can efficiently reflect red light, making up for the shortcomings of low luminous efficiency and small emission angle of red LEDs.
[0128] Example 2
[0129] This embodiment provides a method for fabricating an LED chip, specifically for fabricating the red flip-chip LED described in Embodiment 1. Please refer to [link to previous documentation]. Figure 2 The provided flowchart illustrates a method for fabricating an LED chip, which includes the following steps:
[0130] S01, Provide a growth substrate 1;
[0131] It should be noted that the type of substrate in the LED chip of this embodiment is not limited. For example, the substrate can be, but is not limited to, a GaAs substrate.
[0132] S02. Growing an epitaxial wafer, the epitaxial wafer includes a second type semiconductor layer 4, an active region 3 and a first type semiconductor layer 4 grown in sequence, wherein the active region 3 is located between the first type semiconductor layer 2 and the second type semiconductor layer 4;
[0133] The second type semiconductor layer 4 can be composed of a group III-V or group II-VI compound semiconductor and can be doped with a second dopant. Specifically, the second type semiconductor layer 4 can be selected from materials such as AlGaAs, GaP, GaAs, GaAsP, and AlGaInP. Alternatively, the second dopant can be an n-type dopant, such as Si, Ge, Sn, Se, and Te. When the second dopant is an n-type dopant, the second type semiconductor layer 4 doped with the second dopant is an n-type semiconductor layer. In this embodiment, it is preferable that the second type semiconductor layer 4 is an n-type semiconductor doped with an n-type dopant.
[0134] The active region 3 is disposed between the first type semiconductor layer 2 and the second type semiconductor layer 4. The active region 3 provides light radiation by facilitating electron-hole recombination. Different materials can be selected depending on the emission wavelength. The active region 3 can be a periodic structure with a single quantum well or multiple quantum wells. The active region 3 includes a well layer and a barrier layer, wherein the barrier layer has a larger band gap than the well layer. By adjusting the composition ratio of the semiconductor materials in the active region 3, it is desired to radiate light of different wavelengths.
[0135] The second type semiconductor layer 2 can be composed of a group III-V or group II-VI compound semiconductor and can be doped with a first dopant. Specifically, the first type semiconductor layer 2 can be selected from materials such as AlGaAs, GaP, GaAs, GaAsP, and AlGaInP. When the first dopant is a p-type dopant, such as Mg, Zn, Ca, Sr, and Ba, the first type semiconductor layer 2 doped with the first dopant is a p-type semiconductor layer. In this embodiment, it is preferred that the first type semiconductor layer 2 is a p-type semiconductor doped with a p-type dopant.
[0136] Preferably, in order to better achieve lateral current expansion and ohmic contact, a p-GaP window layer with p-type dopant is further provided on the surface of the first type semiconductor layer 2.
[0137] S03. Roughen the epitaxial wafer to give it a roughened surface;
[0138] Specifically, after cleaning the surface of the epitaxial wafer sequentially with acetone, isopropanol, and deionized water and then drying it, in order to enhance the adhesion of the material film, this embodiment uses a Gap roughening solution to roughen the p-GaP window layer to give it a roughened surface.
[0139] Preferably, the roughened surface of the p-GaP window layer has a random morphology, such as a randomly roughened structure with a roughness of 0.1 to 1 micrometer.
[0140] S04, A first transparent oxide layer 14 is grown on the roughened surface;
[0141] Specifically, a first transparent oxide layer 14 is grown on the roughened surface of the p-GaP window layer; the first transparent oxide layer 14 includes a transparent insulating material layer or a transparent conductive material layer. When the first transparent oxide layer 14 is a transparent insulating material layer, the high bonding strength of the transparent insulating material can be utilized to stabilize the epitaxial wafer and the substrate 11; when a transparent conductive material layer is used as the first transparent oxide layer 14 (such as ITO), its refractive index is relatively low, which can reduce the reflection of light emitted from the semiconductor epitaxial wafer at the interface between the epitaxial wafer and the first transparent oxide layer 14, thereby improving the luminous brightness; at the same time, the transparent conductive material layer, as a transparent bonding layer 13, contacts the semiconductor layer and can act as a current spreading layer, improving the current spreading effect and enhancing the uniformity of current distribution. The specific material application is selected according to the situation, and this embodiment does not limit it.
[0142] Furthermore, the side of the first transparent oxide layer 14 facing the reflective layer 12 is a flat surface; thereby, by flattening the uneven structure of the roughened surface of the LED light-emitting unit covered by the first transparent oxide layer 14, a smooth interface is provided for subsequent material layer growth.
[0143] Preferably, the first transparent oxide layer 14 is planarized to have a flat surface on the side facing the reflective layer 12 through CMP planarization. It should be noted that CMP planarization refers to a planarization process achieved through alternating chemical and mechanical stripping.
[0144] Specifically, in this embodiment, in order to balance the material consistency of each film layer, the first transparent oxide layer 14 is made of silicon oxide (SiOx) and is obtained through the following process:
[0145] A silicon oxide film is deposited on the surface of the roughened p-GaP window layer using a vapor deposition machine or a PECVD machine. The deposition temperature is 200-350℃, thereby obtaining a silicon oxide film with a thickness of 1-5μm. The first transparent oxide layer 14 is then flattened by a CMP planarization process (which refers to planarization achieved through alternating chemical and mechanical film removal).
[0146] S05. A substrate 11 is provided, wherein the substrate 11 includes a transparent substrate 11;
[0147] In one embodiment of this application, the substrate 11 includes a sapphire substrate 11.
[0148] S06. A reflective layer 12 is provided on the surface of the substrate 11;
[0149] Optionally, the reflective layer 12 includes a DBR reflector, wherein the DBR reflector comprises M sets of material layer pairs formed by alternating stacks of material layers with a different refractive index, where 2 ≤ a ≤ 6; the a different refractive index material layers are selected from SiO2, SiON, etc. x SiN x The materials used are Al2O3, MgF2, TiO, TiO2, Ti3O5, Ti2O3, Ta2O5, or ZrO2; the value of M ranges from 2 to 50, including the endpoints. The specific materials, M, and a are selected depending on the circumstances, and this embodiment does not impose any restrictions on them.
[0150] In one embodiment of this application, the DBR reflector comprises alternating stacked SiO2 layers and TiO2 layers. Preferably, to better handle the interface between different functional layers, the surface of the DBR reflector is a SiO2 layer.
[0151] S07. A transparent bonding layer 13 is provided on the side surface of the substrate 11 where the reflective layer 12 is located, and the substrate 11 is bonded to the surface of the first transparent oxide layer 14 of the epitaxial wafer through the transparent bonding layer 13.
[0152] Preferably, the transparent bonding layer 13 includes a transparent insulating material layer; further, in one embodiment of this application, the material of the transparent bonding layer 13 is the same as the material of the first transparent oxide layer 14, both being silicon oxide (SiOx).
[0153] Specifically, the process includes immersing the epitaxial wafer obtained in step S05 and the substrate 11 obtained in step S06 in a mixed solution containing ammonia and hydrogen peroxide to activate the surface of the silicon oxide film; after immersion, the two are bonded together through a transparent bonding layer 13 to achieve bonding between the substrate 11 and the epitaxial wafer.
[0154] S08. Remove the growth substrate 1 to expose the first type semiconductor layer 2;
[0155] S09. The epitaxial wafer is formed into a plurality of sub-epitaxial units spaced apart by trenches through an etching process;
[0156] S10. On the surface of the first type semiconductor layer 2 of the epitaxial unit, a portion of the first type semiconductor layer 2 and the active region 3 are removed by an etching process to expose the second type semiconductor layer. A first electrode 6 and a second electrode 5 are then formed on the exposed second type semiconductor layer and the first semiconductor layer 2, respectively.
[0157] Optionally, the surface and sidewalls of the epitaxial wafer are provided with an insulating layer 7, and the insulating layer 7 has a first opening and a second opening;
[0158] The first opening exposes at least a portion of the surface of the first electrode 6, and the second opening exposes at least a portion of the surface of the second electrode 5.
[0159] Preferably, the insulating layer 7 includes a passivation layer and a reflector stacked sequentially.
[0160] The reflector can be a DBR reflector directly disposed on the surface of the epitaxial wafer, or it can be a metal reflector that is insulated from the epitaxial wafer by a passivation layer; the specific material application is selected as appropriate, and this embodiment does not limit it.
[0161] The passivation layer includes, but is not limited to, a silicon oxide passivation layer.
[0162] S11. A single LED light-emitting element is formed by cutting along the groove using a cutting process.
[0163] Example 3
[0164] Please see Figure 3 This is a cross-sectional structural diagram of the LED chip provided in Embodiment 3. In the LED chip technology solution of Embodiment 1, when light is output from the interface of the reflector (DBR) to the transparent substrate 11, light confinement is likely to occur. That is, when light reaches the interface between sapphire and air from inside the substrate 11 (sapphire), the refractive index of air is lower than that of sapphire, causing light to be easily reflected back and forth inside the transparent substrate 11.
[0165] Therefore, based on Embodiment 1, this embodiment further proposes a design where the substrate 11 has a roughened surface on the side near the LED light-emitting unit, and a second transparent oxide layer 15 is provided between the substrate 11 and the reflective layer 12. By utilizing the uneven structure of the substrate 11, the direction of light emission changes when it reaches the interface between the second transparent oxide layer 15 and the substrate 11, increasing the probability of light emanating from the sidewall of the transparent substrate 11, thereby increasing light output efficiency and improving brightness. Specifically, in this embodiment, the roughened surface of the substrate 11 can be a roughened surface or a patterned surface.
[0166] Preferably, the second transparent oxide layer 15 comprises a transparent insulating material layer or a transparent conductive material layer. Furthermore, considering that the refractive index of the material beneath the light-emitting unit is lower than that of the semiconductor stack, as well as light transmittance and interface adhesion, the second transparent oxide layer 15 comprises a silicon oxide layer when the transparent bonding layer 13, the first transparent oxide layer 14 comprise a silicon oxide layer, and the substrate 11 comprises a sapphire substrate 11.
[0167] Preferably, the side of the second transparent oxide layer 15 facing the reflective layer 12 is flat. This planarizes the uneven structure of the substrate 11 covered by the second transparent oxide layer 15, providing a smooth interface for the reflective layer 12 (DBR) and reducing light scattering loss. Simultaneously, during subsequent hidden cutting operations, the second transparent oxide layer 15 acts as a buffer, further reducing the risk of cracking at the interface of the near-light-emitting unit epitaxial wafer.
[0168] Preferably, the second transparent oxide layer 15 is planarized on the side facing the reflective layer 12 by CMP planarization. It should be noted that CMP planarization refers to planarization achieved through an alternating process of chemical and mechanical stripping.
[0169] It should be noted that, in order to highlight the technical features of this application, only one light-emitting unit is shown in the embodiment figure. In actual product applications, it may include tens of thousands of light-emitting units, depending on the application of the LED chip product. This application does not limit this.
[0170] Example 4
[0171] Please see Figure 4 This is a cross-sectional structural diagram of the LED chip provided in Embodiment 4. This embodiment provides another LED chip, including a substrate 11 and a plurality of LED light-emitting units disposed on the surface of the substrate 11 and spaced apart from each other by trenches. The LED chip includes:
[0172] A transparent bonding layer 13 is located between the LED light-emitting unit and the substrate 11;
[0173] A reflective layer 12 is disposed on the surface of the transparent bonding layer 13 near the LED light-emitting unit.
[0174] The substrate 11 includes a transparent substrate 11.
[0175] It should be noted that, in order to highlight the technical features of this application, only one light-emitting unit is shown in the embodiment figure. In actual product applications, it may include tens of thousands of light-emitting units, depending on the application of the LED chip product. This application does not limit this.
[0176] Based on the above implementation scheme, the reflective layer 12 is deposited on the upper surface of the transparent bonding layer 13 (instead of being directly deposited on the back side of the substrate 11), eliminating the need for back-plating the reflective layer 12 on the substrate 11. This improves the LED emission angle while avoiding foreign matter contamination introduced by grinding the substrate 11 and reducing the probability of breakage due to the excessive thinness of the substrate 11. Simultaneously, the transparent bonding layer 13, located between the LED unit and the substrate 11, acts as an intermediate buffer layer, enhancing the overall structural strength of the thin film (substrate side) and reducing the risk of back breakage during subsequent hidden cutting operations.
[0177] Secondly, the reflective layer 12 is disposed on the transparent bonding layer 13 (i.e., the reflective layer 12 is close to the epitaxial film of the light-emitting unit); while achieving the above-mentioned beneficial effects, the reflective layer 12 preferentially reflects the transverse light generated by the active region 3 to improve the light extraction efficiency.
[0178] Optionally, the LED light-emitting unit has a roughened surface on the side near the substrate 11. This roughening disrupts total internal reflection, increases the light scattering path, and improves light extraction efficiency. Specifically, in this embodiment, the roughened surface of the LED light-emitting unit can be a roughened surface or a patterned surface. In one embodiment of this application, preferably, the roughened surface of the LED light-emitting unit has a random morphology, such as a randomly roughened structure, with a roughness of 0.1 to 1 micrometer.
[0179] Optionally, a first transparent oxide layer 14 is provided on the roughened surface of the LED light-emitting unit. Further, the side of the first transparent oxide layer 14 facing the reflective layer 12 is a flat surface. This flattening of the transparent oxide layer covers the uneven structure of the roughened surface of the LED light-emitting unit, providing a smooth interface for the reflective layer 12 (DBR) and reducing light scattering loss. Simultaneously, during subsequent hidden cutting operations, the first transparent oxide layer 14 acts as a buffer, further reducing the risk of cracking at the interface of the near-light-emitting unit epitaxial wafer.
[0180] Preferably, the first transparent oxide layer 14 is planarized to have a flat surface on the side facing the reflective layer 12 through CMP planarization. It should be noted that CMP planarization refers to a planarization process achieved through alternating chemical and mechanical stripping.
[0181] Optionally, the reflective layer 12 is disposed between the first transparent oxide layer 14 and the transparent bonding layer 13.
[0182] Optionally, the transparent bonding layer 13 is a transparent insulating material layer, and the first transparent oxide layer 14 includes either a transparent insulating material layer or a transparent conductive material layer. When the first transparent oxide layer 14 is a transparent insulating material layer, the high bonding strength of the transparent insulating material can be utilized to stabilize the epitaxial wafer and the substrate 11. When a transparent conductive material layer is used as the first transparent oxide layer 14 (such as ITO), its refractive index is relatively low, which can reduce the reflection of light emitted from the semiconductor epitaxial wafer at the interface between the epitaxial wafer and the first transparent oxide layer 14, thereby improving the luminous brightness. At the same time, as a transparent bonding layer 13, the transparent conductive material layer, in contact with the semiconductor layer, can act as a current spreading layer, improving the current spreading effect and enhancing the uniformity of current distribution. The specific material application is selected depending on the situation, and this embodiment does not impose any restrictions on it.
[0183] Optionally, the substrate 11 includes a sapphire substrate 11.
[0184] Optionally, the reflective layer 12 includes a DBR reflector, wherein the DBR reflector comprises M sets of material layer pairs formed by alternating stacks of material layers with a different refractive index, where 2 ≤ a ≤ 6; the a different refractive index material layers are selected from SiO2, SiON, etc. x SiN x Al2O3, MgF2, TiO, TiO2, Ti3O5, Ti2O3, Ta2O5, or ZrO2; the M value ranges from 2 to 50, including the endpoint value.
[0185] Preferably, the transparent bonding layer 13 and the first transparent oxide layer 14 include a silicon oxide layer (refractive index of about 1.5), and the transparent substrate 11 is made of sapphire substrate 11 (refractive index of about 1.7). Both have good light transmittance and good adhesion at the interface, and the refractive index of the silicon oxide layer is lower than that of the semiconductor stack, which is beneficial for light to be output from the semiconductor stack and improves the light extraction efficiency.
[0186] Meanwhile, the DBR reflector includes alternating stacked SiO2 and TiO2 layers, which can match the material system of transparent bonding layer 13 and first transparent oxide layer 14 (silicon oxide layer), further ensuring that the refractive index of the material below the light-emitting unit is lower than the refractive index, light transmittance and interface adhesion of the semiconductor stack, thereby ensuring the stability of the chip light while facilitating output from the semiconductor stack and improving light extraction efficiency.
[0187] However, since the refractive index of the transparent bonding layer 13 is lower than that of the transparent substrate 11 (sapphire substrate 11), light is easily trapped when it passes from the transparent bonding layer 13 and the interface to the transparent substrate 11. When light passes from inside the sapphire substrate 11 to the interface between sapphire and air, the refractive index of air is lower than that of sapphire, causing light to be easily reflected back and forth inside the transparent substrate 11.
[0188] Therefore, this invention also proposes a design where the substrate 11 has a roughened surface on the side near the LED light-emitting unit, and a second transparent oxide layer 15 is provided between the substrate 11 and the transparent bonding layer 13. By utilizing the uneven structure of the substrate 11, the direction of light emission changes when it reaches the interface between the second transparent oxide layer 15 and the substrate 11, increasing the probability of light emanating from the sidewall of the transparent substrate 11, thereby increasing light output efficiency and improving brightness. Specifically, in this embodiment of the invention, the roughened surface of the substrate 11 can be a roughened surface or a patterned surface.
[0189] Preferably, the second transparent oxide layer 15 comprises a transparent insulating material layer or a transparent conductive material layer. Furthermore, considering that the refractive index of the material beneath the light-emitting unit is lower than that of the semiconductor stack, as well as light transmittance and interface adhesion, the second transparent oxide layer 15 comprises a silicon oxide layer when the transparent bonding layer 13, the first transparent oxide layer 14 comprise a silicon oxide layer, and the substrate 11 comprises a sapphire substrate 11.
[0190] Preferably, the side of the second transparent oxide layer 15 facing the reflective layer 12 is flat. This planarizes the uneven structure of the substrate 11 covered by the second transparent oxide layer 15, providing a smooth interface for the reflective layer 12 (DBR) and reducing light scattering loss. Simultaneously, during subsequent hidden cutting operations, the second transparent oxide layer 15 acts as a buffer, further reducing the risk of cracking at the interface of the near-light-emitting unit epitaxial wafer.
[0191] Preferably, the second transparent oxide layer 15 is planarized on the side facing the reflective layer 12 by CMP planarization. It should be noted that CMP planarization refers to planarization achieved through an alternating process of chemical and mechanical stripping.
[0192] Optionally, the LED light-emitting unit includes an epitaxial wafer, a first electrode 6, and a second electrode 5 disposed above the substrate 11;
[0193] The epitaxial wafer includes a second type semiconductor layer, an active region 3, and a first type semiconductor layer 2 stacked sequentially. The active region 3 is located between the first type semiconductor layer 2 and the second type semiconductor layer. The first electrode 6 is electrically connected to the first type semiconductor layer 2. The second electrode 5 is electrically connected to the second type semiconductor layer.
[0194] Furthermore, the LED chip also includes a first pad for external contact and connection to the first electrode 6, and a second pad for external contact and connection to the second electrode 5, not shown in this figure, but can be found in the reference section. Figure 1 .
[0195] The first type semiconductor layer 2 and the second type semiconductor layer have different conductivity types, electrical properties, polarities, or depending on the doped elements, to provide at least electrons or holes; the active region 3 is formed between the first type semiconductor layer 2 and the second type semiconductor layer, and the active region 3 can convert electrical energy into light energy. The emitted light wavelength can be adjusted by changing the physical and chemical composition of one or more layers of the semiconductor stack.
[0196] Specifically, the first type semiconductor layer 2 can be composed of a III-V or II-VI compound semiconductor, and can be doped with a first dopant. The first type semiconductor layer 2 can be made of a material with the chemical formula In. X1 Al Y1 Ga 1-X1-Y1 The semiconductor layer 2 is composed of N (0≤X1≤1, 0≤Y1≤1, 0≤X1+Y1≤1) semiconductor materials, such as GaN, AlGaN, InGaN, InAlGaN, etc., or materials selected from AlGaAs, GaP, GaAs, GaAsP, and AlGaInP. Additionally, the first dopant can be an n-type dopant, such as Si, Ge, Sn, Se, and Te. When the first dopant is an n-type dopant, the first type semiconductor layer 2 doped with the first dopant is an n-type semiconductor layer. In this embodiment, it is preferable that the first type semiconductor layer 2 is an n-type semiconductor doped with an n-type dopant.
[0197] The active region 3 is disposed between the first type semiconductor layer 2 and the second type semiconductor layer. The active region 3 provides light radiation by facilitating electron-hole recombination. Different materials can be selected depending on the emission wavelength. The active region 3 can be a periodic structure with a single quantum well or multiple quantum wells. The active region 3 includes a well layer and a barrier layer, wherein the barrier layer has a larger band gap than the well layer. By adjusting the composition ratio of the semiconductor materials in the active region 3, it is desired to radiate light of different wavelengths.
[0198] The second type of semiconductor layer can be composed of group III-V or group II-VI compound semiconductors. The second type of semiconductor layer can also be composed of materials with the chemical formula In. X1 Al Y1 Ga1-X1-Y1 The semiconductor layer is composed of N (0≤X1≤1, 0≤Y1≤1, 0≤X1+Y1≤1), such as GaN, AlGaN, InGaN, InAlGaN, etc., or materials selected from AlGaAs, GaP, GaAs, GaAsP, and AlGaInP. The second-type semiconductor layer may be doped with a second dopant. When the second dopant is a p-type dopant, such as Mg, Zn, Ca, Sr, and Ba, the second-type semiconductor layer doped with the second dopant is a p-type semiconductor layer. In this embodiment, it is preferable that the second-type semiconductor layer is a p-type semiconductor doped with a p-type dopant.
[0199] Optionally, an insulating layer 7 is provided on the surface and sidewalls of the epitaxial wafer, and the insulating layer 7 has a first opening and a second opening;
[0200] The first opening exposes at least a portion of the surface of the first electrode 6, and the second opening exposes at least a portion of the surface of the second electrode 5.
[0201] Optionally, if the LED chip is a flip-chip LED chip, then the insulating layer 7 includes a passivation layer and a reflector stacked sequentially.
[0202] The reflector can be a DBR reflector directly disposed on the surface of the epitaxial wafer, or it can be a metal reflector insulated from the epitaxial wafer by an insulating material layer; the specific material used is selected depending on the circumstances, and this embodiment does not impose any restrictions on it.
[0203] The passivation layer includes, but is not limited to, a silicon oxide passivation layer.
[0204] Optionally, the LED chip is a red flip-chip LED. The red flip-chip is adapted to the sapphire substrate 11 and, together with the reflector (DBR), transparent bonding layer 13, roughened surface epitaxial wafer, and first / second transparent oxide layer 15, can efficiently reflect red light, making up for the shortcomings of low luminous efficiency and small emission angle of red LEDs.
[0205] Example 5
[0206] Please see Figure 5 This is a cross-sectional structural diagram of the LED chip provided in Embodiment 5. In the LED chip technical solution of Embodiment 3, when light is output from the interface of the transparent bonding layer 13 to the transparent substrate 11, light confinement is likely to occur. That is, when light reaches the interface between sapphire and air from inside the substrate 11 (sapphire), the refractive index of air is lower than that of sapphire, causing light to be easily reflected back and forth inside the transparent substrate 11.
[0207] Therefore, based on Embodiment 4, this embodiment further proposes a design where the substrate 11 has a roughened surface on the side near the LED light-emitting unit, and a second transparent oxide layer 15 is provided between the substrate 11 and the transparent bonding layer 13. By utilizing the uneven structure of the substrate 11, the direction of light emission can be changed when it reaches the interface between the second transparent oxide layer 15 and the substrate 11, increasing the probability of light emanating from the sidewall of the transparent substrate 11, thereby increasing light output efficiency and improving brightness. Specifically, in this embodiment, the roughened surface of the substrate 11 can be a roughened surface or a patterned surface.
[0208] Preferably, the second transparent oxide layer 15 comprises a transparent insulating material layer or a transparent conductive material layer. Furthermore, considering that the refractive index of the material beneath the light-emitting unit is lower than that of the semiconductor stack, as well as light transmittance and interface adhesion, the second transparent oxide layer 15 comprises a silicon oxide layer when the transparent bonding layer 13, the first transparent oxide layer 14 comprise a silicon oxide layer, and the substrate 11 comprises a sapphire substrate 11.
[0209] Preferably, the side of the second transparent oxide layer 15 facing the reflective layer 12 is flat. This planarizes the uneven structure of the substrate 11 covered by the second transparent oxide layer 15, providing a smooth interface for the transparent bonding layer 13 and reducing light scattering loss. Simultaneously, during subsequent hidden cutting operations, the second transparent oxide layer 15 acts as a buffer, further reducing the risk of cracking at the interface of the near-light-emitting unit epitaxial wafer.
[0210] Preferably, CMP planarization treatment makes the side of the second transparent oxide layer 15 facing the transparent bonding layer 13 a flat surface. It should be noted that the CMP planarization process refers to planarization achieved through an alternating process of chemical and mechanical film removal.
[0211] It should be noted that, in order to highlight the technical features of this application, only one light-emitting unit is shown in the embodiment figure. In actual product applications, it may include tens of thousands of light-emitting units, depending on the application of the LED chip product. This application does not limit this.
[0212] Example 6
[0213] This utility model also provides a high-voltage LED chip, which electrically interconnects the electrodes of adjacent LED light-emitting units of the LED chip described in any one of embodiments 1 to 4 through a bridging electrode, while maintaining one LED light-emitting unit with its first electrode 6 exposed and another LED light-emitting unit with its second electrode 5 exposed; wherein, the bridging electrode connects two adjacent LED units (specifically, the bridging electrode can connect two adjacent LED units by being stacked on the passivation layer). Its specific structure, performance, and advantages can be referred to the foregoing content, and will not be elaborated further here.
[0214] Preferably, the high-voltage LED chip is a high-voltage flip-chip LED chip, and the high-voltage flip-chip LED chip further includes an insulating reflector 17 disposed on the surface of each of the light-emitting units facing away from the substrate 11. The insulating reflector 17 can cover each of the light-emitting units and expose the first electrode 6 and the second electrode 5.
[0215] Furthermore, the high-voltage LED chip also includes a first pad 8 for external contact and connection of the exposed first electrode 6, and a second pad 9 for external contact and connection of the exposed second electrode 5.
[0216] in, Figure 6 A high-voltage application scheme based on the flip-chip LED corresponding to Embodiment 1 is provided. Specifically, the electrodes of three adjacent LED light-emitting units are electrically interconnected to achieve a 9V high-voltage LED chip, while keeping the first electrode 6 of the first LED light-emitting unit exposed and the second electrode 5 of the third LED light-emitting unit exposed; wherein, the bridging electrode 16 connects two adjacent LED units (specifically, the bridging electrode 16 can connect two adjacent LED units by being stacked on the insulating layer 7). Preferably, an insulating reflector 17 is also included on the surface of each light-emitting unit facing away from the substrate 11. It should be noted that this embodiment does not limit the number of electrically interconnected LED light-emitting units, and can be adapted to the required voltage and the voltage of a single LED chip. For example, if a 6V high-voltage LED chip is required, two LED chips can be internally integrated and connected in series. Depending on the technical requirements of the specific product, this application does not limit this.
[0217] The device provided in this embodiment of the present invention has the same implementation principle and technical effects as the aforementioned method embodiment. For the sake of brevity, any parts not mentioned in the device embodiment can be referred to the corresponding content in the aforementioned method embodiment. Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can all be referred to the corresponding processes in the aforementioned method embodiments, and will not be repeated here.
[0218] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.
[0219] It should also be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that an article or apparatus comprising a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such an article or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the article or apparatus that includes the aforementioned element.
[0220] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. An LED chip, comprising a substrate and a plurality of LED light-emitting units disposed on the surface of the substrate and spaced apart from each other by trenches, characterized in that, The LED chip includes: A transparent bonding layer located between the LED light-emitting unit and the substrate; A reflective layer is provided on one side surface of the transparent bonding layer; The substrate includes a transparent substrate.
2. The LED chip according to claim 1, characterized in that, The reflective layer is disposed on the surface of the transparent bonding layer opposite to the LED light-emitting unit.
3. The LED chip according to claim 1, characterized in that, The reflective layer is disposed on the surface of the transparent bonding layer near the LED light-emitting unit.
4. The LED chip according to claim 1, characterized in that, The LED light-emitting unit has a roughened surface on the side closest to the substrate.
5. The LED chip according to claim 4, characterized in that, A first transparent oxide layer is provided on the roughened surface of the LED light-emitting unit.
6. The LED chip according to claim 5, characterized in that, The transparent bonding layer is disposed between the first transparent oxide layer and the reflective layer.
7. The LED chip according to claim 6, characterized in that, The substrate has a roughened surface on the side near the LED light-emitting unit, and a second transparent oxide layer is provided between the substrate and the reflective layer.
8. The LED chip according to claim 5, characterized in that, The reflective layer is disposed between the first transparent oxide layer and the transparent bonding layer.
9. The LED chip according to claim 8, characterized in that, The substrate has a roughened surface on the side near the LED light-emitting unit, and a second transparent oxide layer is provided between the substrate and the transparent bonding layer.
10. The LED chip according to claim 5, characterized in that, The side of the first transparent oxide layer facing the reflective layer is a flat surface.
11. The LED chip according to claim 7, characterized in that, The second transparent oxide layer has a flat surface on the side facing the reflective layer.
12. The LED chip according to claim 1, characterized in that, The reflective layer includes a DBR reflector.
13. The LED chip according to claim 9, characterized in that, The transparent bonding layer includes a transparent insulating material layer, the first transparent oxide layer includes a transparent insulating material layer and / or a transparent conductive material layer, and the second transparent oxide layer includes a transparent insulating material layer.
14. The LED chip according to claim 13, characterized in that, The transparent bonding layer, the first transparent oxide layer, and the second transparent oxide layer include silicon oxide layers.
15. The LED chip according to claim 1, characterized in that, The LED light-emitting unit includes an epitaxial wafer, a first electrode, and a second electrode disposed above the substrate; The epitaxial wafer includes a second type semiconductor layer, an active region, and a first type semiconductor layer stacked sequentially, wherein the active region is located between the first type semiconductor layer and the second type semiconductor layer; the first electrode is electrically connected to the first type semiconductor layer; and the second electrode is electrically connected to the second type semiconductor layer.
16. The LED chip according to claim 15, characterized in that, An insulating layer is provided on the surface and sidewalls of the epitaxial wafer, and the insulating layer has a first opening and a second opening; The first opening exposes at least a portion of the surface of the first electrode, and the second opening exposes at least a portion of the surface of the second electrode.
17. The LED chip according to claim 16, characterized in that, If the LED chip is a flip-chip LED chip, then the insulating layer includes a passivation layer and a reflector stacked sequentially.
18. The LED chip according to claim 17, characterized in that, The LED chip is a red flip-chip LED, and the substrate includes a sapphire substrate.
19. A high-voltage LED chip, characterized in that, The high-voltage LED chip electrically interconnects the electrodes of adjacent LED light-emitting units according to any one of claims 1 to 18 through a bridging electrode, and maintains one LED light-emitting unit with its first electrode exposed and another LED light-emitting unit with its second electrode exposed; wherein the bridging electrode connects two adjacent LED units.
20. The high-voltage LED chip according to claim 19, characterized in that, If the high-voltage LED chip is a high-voltage flip-chip LED chip, then the high-voltage flip-chip LED chip also includes an insulating reflector disposed on the surface of each light-emitting unit facing away from the substrate.