Over / under voltage protection circuit and photovoltaic inverter
By designing an over- and under-voltage protection circuit that synchronously realizes over- and under-voltage detection and protection through hardware circuitry, the problem of complex existing topologies is solved, and the safety and reliability of power electronic systems are improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- SOLAR POWER NETWORK TECHNOLOGY (ZHEJIANG) CO LTD
- Filing Date
- 2025-06-26
- Publication Date
- 2026-06-30
Smart Images
Figure CN224438547U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of electronic circuit technology, specifically to an over / under voltage protection circuit and a photovoltaic inverter. Background Technology
[0002] Over / under voltage protection circuits are key safety modules in power electronic systems. They are used to monitor the power bus voltage and disconnect the connection to the load, such as a chip (IC), when the voltage is abnormal, causing the chip to lose power and stop working, thereby achieving protection and preventing damage.
[0003] However, the topology of over-voltage and under-voltage protection circuits that simultaneously implement over-voltage and under-voltage protection is too complex. Therefore, it is necessary to provide an over-voltage and under-voltage protection circuit with a simpler topology. Utility Model Content
[0004] This application provides an over / under voltage protection circuit and a photovoltaic inverter to alleviate the technical problem of overly complex over / under voltage protection topologies.
[0005] In a first aspect, this application provides an over / under voltage protection circuit, which includes a sampling module, an over / under voltage detection module, and an over / under voltage protection module. The sampling module is configured to sample the real-time voltage of the bus to obtain a sampled voltage. The over / under voltage detection module is connected to the sampling module and is configured to generate an over / under voltage protection signal based on the comparison result of the sampled voltage with an overvoltage threshold and an undervoltage threshold. The over / under voltage protection module is connected to the over / under voltage detection module and is configured to control the on / off state between the bus and the chip based on the over / under voltage protection signal.
[0006] Optionally, the sampling module includes a first resistor and a second resistor. The first end of the first resistor is connected to the busbar; the first end of the second resistor is connected to the second end of the first resistor and the over / under voltage detection module; and the second end of the second resistor is connected to the grounding terminal.
[0007] Optionally, the over / under voltage detection module includes an overvoltage comparator and an undervoltage comparator. The first input terminal of the overvoltage comparator is connected to an overvoltage threshold, the second input terminal of the overvoltage comparator is connected to a sampling voltage, and the output terminal of the overvoltage comparator is connected to the over / under voltage protection module. The first input terminal of the undervoltage comparator is connected to the second input terminal of the overvoltage comparator, the second input terminal of the undervoltage comparator is connected to an undervoltage threshold, and the output terminal of the undervoltage comparator is connected to the output terminal of the overvoltage comparator and the over / under voltage protection module.
[0008] Optionally, the over / under voltage protection module includes a drive unit and a switch unit. The drive unit is connected to the over / under voltage detection module and is configured to generate a drive signal based on the over / under voltage protection signal. The switch unit is connected to the drive unit and is configured to control the on / off state between the bus and the chip based on the drive signal.
[0009] Optionally, the driving unit includes a third resistor, a fourth resistor, a first capacitor, and a first transistor. The first end of the third resistor is connected to the over / under voltage detection module; the first end of the fourth resistor is connected to the second end of the third resistor, and the second end of the fourth resistor is connected to the ground terminal; the first end of the first capacitor is connected to the first end of the fourth resistor, and the second end of the first capacitor is connected to the second end of the fourth resistor; the base of the first transistor is connected to the second end of the third resistor, the first end of the fourth resistor, and the first end of the first capacitor; the emitter of the first transistor is connected to the ground terminal; and the collector of the first transistor is connected to the switching unit.
[0010] Optionally, the switching unit includes a fifth resistor, a sixth resistor, a seventh resistor, and a second transistor. The first terminal of the fifth resistor is connected to the collector of the first transistor; the first terminal of the sixth resistor is connected to the second terminal of the fifth resistor; the first terminal of the seventh resistor is connected to the second terminals of the fifth resistor and the first terminal of the sixth resistor; the base of the second transistor is connected to the second terminal of the seventh resistor; the emitter of the second transistor is connected to the second terminal of the sixth resistor and the busbar; and the collector of the second transistor is connected to the chip.
[0011] Optionally, the channel type of the second transistor is different from that of the first transistor.
[0012] Secondly, this application provides a photovoltaic inverter that includes the over / under voltage protection circuit described above.
[0013] Optionally, the photovoltaic inverter also includes an auxiliary power supply, the input of which is connected to the photovoltaic system and the output of which is connected to the bus.
[0014] Optionally, the photovoltaic inverter also includes a chip, which includes at least one of a control circuit, a drive circuit, and a protection circuit.
[0015] The over / under voltage protection circuit and photovoltaic inverter provided in this application can synchronously realize over / under voltage detection by detecting the same sampled voltage through the over / under voltage detection module, and synchronously realize over / under voltage protection through a single over / under voltage protection module. Compared with over / under voltage protection, which requires separate sampling of real-time voltage and separate execution of over / under voltage protection actions, this reduces the number of sampling modules and over / under voltage protection modules used, thereby simplifying the topology. Compared with realizing over / under voltage protection through software judgment, realizing over / under voltage protection through hardware circuit has a faster response speed. Attached Figure Description
[0016] The technical solution and other beneficial effects of this application will become apparent from the following detailed description of specific embodiments in conjunction with the accompanying drawings.
[0017] Figure 1 This is a schematic block diagram of the over / under voltage protection circuit provided in an embodiment of this application.
[0018] Figure 2 The circuit diagrams of the sampling module and the over / under voltage detection module provided in the embodiments of this application are shown.
[0019] Figure 3 The circuit diagram of the over / under voltage protection module provided in the embodiments of this application is shown.
[0020] Figure 4 This is a schematic diagram of the first waveform of the over / under voltage protection circuit provided in the embodiments of this application.
[0021] Figure 5 This is a second waveform diagram of the over / under voltage protection circuit provided in the embodiments of this application.
[0022] Figure 6 This is a third waveform diagram of the over / under voltage protection circuit provided in the embodiments of this application.
[0023] Figure 7 This is a schematic diagram of the first structure of a photovoltaic inverter provided in an embodiment of this application.
[0024] Figure 8 This is a schematic diagram of a second structure of a photovoltaic inverter provided in an embodiment of this application. Detailed Implementation
[0025] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.
[0026] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Features thus defined as "first" or "second" may explicitly or implicitly include one or more of the stated features. In the description of this invention, "a plurality of" means two or more unless otherwise explicitly specified.
[0027] The auxiliary power supply of a photovoltaic inverter provides a stable power supply to the control circuit, drive circuit, protection circuit, and other loads to ensure the safe and reliable operation of the inverter. The auxiliary power supply typically uses an isolated DC-DC or AC-DC power circuit. Due to the large fluctuations in the input voltage of the photovoltaic system, the auxiliary power supply may face abnormal fluctuations in the input voltage.
[0028] Because some auxiliary power supplies (chips) do not integrate overvoltage and undervoltage protection functions, the current auxiliary power supplies may experience voltage fluctuations, noise, and difficulty in starting when switching between high and low input voltages, or when operating under light load or no load, which affects the reliability of photovoltaic inverters.
[0029] Therefore, to prevent abnormal drops in the auxiliary power supply's output voltage when the input voltage decreases, and to avoid undervoltage malfunctions caused by power loss or abnormal operation of the control and drive circuits, which could lead to system malfunction or damage to power devices; and to prevent abnormal increases in input or output voltage, ensuring the auxiliary power supply's output voltage does not exceed the maximum allowable value of the control and drive circuits and cause permanent damage, it is essential to improve the reliability and tolerance of the auxiliary power supply under drastic input voltage fluctuations and ensure long-term stable system operation. Therefore, the auxiliary power supply of a photovoltaic inverter must be designed with undervoltage and overvoltage protection circuits.
[0030] This embodiment provides an over / under voltage protection circuit 100, such as... Figure 1 As shown, the over / under voltage protection circuit 100 includes a sampling module 10, an over / under voltage detection module 20, and an over / under voltage protection module 30. The sampling module 10 is configured to sample the real-time voltage VCC of the bus BUS to obtain a sampled voltage V_BUS. The over / under voltage detection module 20 is connected to the sampling module 10 and is configured to generate an over / under voltage protection signal VCC_ON based on the comparison result between the sampled voltage V_BUS and the overvoltage threshold OVP_REF and the undervoltage threshold UVLO_REF. The over / under voltage protection module 30 is connected to the over / under voltage detection module 20 and is configured to control the on / off state between the bus BUS and the chip 200 based on the over / under voltage protection signal VCC_ON.
[0031] It is understood that the over / under voltage protection circuit 100 provided in this embodiment can synchronously realize over / under voltage detection by detecting the same sampled voltage V_BUS through the over / under voltage detection module 20, and synchronously realize over / under voltage protection through an over / under voltage protection module 30. Compared with over / under voltage protection, which requires sampling the real-time voltage VCC and executing over / under voltage protection actions separately, the number of sampling modules 10 and over / under voltage protection modules 30 is reduced, thereby simplifying the topology. Compared with realizing over / under voltage protection through software judgment, realizing over / under voltage protection through hardware circuit has a faster response speed.
[0032] In some embodiments, such as Figure 2 As shown, the sampling module 10 includes a first resistor R1 and a second resistor R2. The first end of the first resistor R1 is connected to the bus BUS; the first end of the second resistor R2 is connected to the second end of the first resistor R1 and the over / under voltage detection module 20, and the second end of the second resistor R2 is connected to the ground terminal GND.
[0033] It should be noted that in this embodiment, the voltage is divided by connecting the first resistor R1 and the second resistor R2 in series. The high voltage on the bus BUS can be stepped down to a low voltage signal suitable for processing by the over / under voltage detection module 20, thereby realizing effective sampling of the high voltage on the bus BUS.
[0034] In other embodiments, the sampling module 10 can also effectively sample the high voltage on the bus BUS using a Hall voltage sensor or a capacitive voltage divider. The capacitive voltage divider utilizes the voltage division effect of two series capacitors to obtain the sampling voltage V_BUS from the connection point.
[0035] In some embodiments, such as Figure 2 As shown, the over / under voltage detection module 20 includes an overvoltage comparator OP1 and an undervoltage comparator OP2. The first input terminal of the overvoltage comparator OP1 is connected to the overvoltage threshold OVP_REF, and the second input terminal of the overvoltage comparator OP1 is connected to the sampling voltage V_BUS. The output terminal of the overvoltage comparator OP1 is connected to the over / under voltage protection module 30. The first input terminal of the undervoltage comparator OP2 is connected to the second input terminal of the overvoltage comparator OP1, and the second input terminal of the undervoltage comparator OP2 is connected to the undervoltage threshold UVLO_REF. The output terminal of the undervoltage comparator OP2 is connected to the output terminal of the overvoltage comparator OP1 and the over / under voltage protection module 30.
[0036] It should be noted that the overvoltage comparator OP1 and the undervoltage comparator OP2 determine whether the high voltage on the bus BUS is within the normal operating range by comparing the sampled voltage V_BUS with the set overvoltage threshold OVP_REF and undervoltage threshold UVLO_REF in real time.
[0037] If the sampled voltage V_BUS exceeds the overvoltage threshold OVP_REF or falls below the undervoltage threshold UVLO_REF, the overvoltage comparator OP1 and the undervoltage comparator OP2 immediately output the corresponding overvoltage / undervoltage protection signal VCC_ON to trigger the overvoltage / undervoltage protection module 30 to perform protection action. If the sampled voltage V_BUS is less than or equal to the overvoltage threshold OVP_REF and greater than or equal to the undervoltage threshold UVLO_REF, the overvoltage comparator OP1 and the undervoltage comparator OP2 immediately output the overvoltage / undervoltage protection signal VCC_ON, and the overvoltage / undervoltage protection module 30 maintains its current state and does not perform protection action.
[0038] In other embodiments, the over-voltage and under-voltage detection module 20 can also achieve over-voltage and under-voltage detection through over-voltage operational amplifiers and under-voltage operational amplifiers.
[0039] In some embodiments, such as Figure 3As shown, the over / under voltage protection module 30 includes a drive unit 31 and a switch unit 32. The drive unit 31 is connected to the over / under voltage detection module 20 and is configured to generate a drive signal based on the over / under voltage protection signal VCC_ON. The switch unit 32 is connected to the drive unit 31 and is configured to control the on / off state between the bus BUS and the chip 200 based on the drive signal.
[0040] It should be noted that the on / off state includes either the on state or the off state. When a protection action is performed, the on / off state switches to the off state, and power supply to chip 200 stops. When the real-time voltage VCC of the bus is within the normal range, the on / off state remains on.
[0041] In some embodiments, such as Figure 3 As shown, the driving unit 31 includes a third resistor R3, a fourth resistor R4, a first capacitor C1, and a first transistor Q1. The first end of the third resistor R3 is connected to the over / under voltage detection module 20; the first end of the fourth resistor R4 is connected to the second end of the third resistor R3, and the second end of the fourth resistor R4 is connected to the ground terminal GND; the first end of the first capacitor C1 is connected to the first end of the fourth resistor R4, and the second end of the first capacitor C1 is connected to the second end of the fourth resistor R4; the base of the first transistor Q1 is connected to the second end of the third resistor R3, the first end of the fourth resistor R4, and the first end of the first capacitor C1; the emitter of the first transistor Q1 is connected to the ground terminal GND; and the collector of the first transistor Q1 is connected to the switching unit 32.
[0042] It should be noted that the first transistor Q1 is an NPN bipolar junction transistor (BJT). The third resistor R3 can convert the over / under voltage protection signal VCC_ON into a current suitable for driving the base of the first transistor Q1, protecting the base of the first transistor Q1 from damage by excessive current.
[0043] When the over / undervoltage protection signal VCC_ON is low (or floating / high impedance), the fourth resistor R4 provides a defined low level to the base of the transistor, ensuring reliable turn-off. Without the fourth resistor R4, the floating base potential of the first transistor Q1 could easily lead to false turn-on. The fourth resistor R4, together with the third resistor R3, also determines the magnitude of the base current of the first transistor Q1.
[0044] The first capacitor C1 filters out high-frequency noise glitches from the over / under voltage protection signal VCC_ON, preventing brief interference pulses from causing the first transistor Q1 to unexpectedly turn on or off, thus improving the circuit's anti-interference capability. When the over / under voltage protection signal VCC_ON transitions from low to high, the capacitor is momentarily short-circuited (similar to low impedance), allowing a larger instantaneous current to flow into the base, accelerating the transistor's saturation turn-on time. When the over / under voltage protection signal VCC_ON transitions from high to low, the charge stored in the capacitor is rapidly discharged through the fourth resistor R4, accelerating the transistor's turn-off.
[0045] Under normal conditions (no action required): The over / under voltage detection module 20 outputs an invalid level (such as a high level) over / under voltage protection signal VCC_ON. At this time, the base voltage of the first transistor Q1 is pulled high through the third resistor R3, the first capacitor C1 filters interference and helps to accelerate the conduction of the first transistor Q1, and its collector is forced to a low level.
[0046] When overvoltage or undervoltage occurs: the overvoltage / undervoltage detection module 20 outputs an effective level (such as low level) overvoltage / undervoltage protection signal VCC_ON, the first transistor Q1 is turned off, its collector is in a high-impedance state, and is forcibly pulled high to a high level.
[0047] In some embodiments, such as Figure 3 As shown, the switching unit 32 includes a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, and a second transistor Q2. The first end of the fifth resistor R5 is connected to the collector of the first transistor Q1; the first end of the sixth resistor R6 is connected to the second end of the fifth resistor R5; the first end of the seventh resistor R7 is connected to the second ends of the fifth resistor R5 and the first end of the sixth resistor R6; the base of the second transistor Q2 is connected to the second end of the seventh resistor R7; the emitter of the second transistor Q2 is connected to the second end of the sixth resistor R6 and the bus BUS; and the collector of the second transistor Q2 is connected to the chip 200.
[0048] It should be noted that the second transistor Q2 is a PNP bipolar junction transistor (BJT). Under normal conditions (no operation required): the first transistor Q1 is turned on, and its collector is at a low level. This low level is created through resistor R5 at the first terminal of resistor R6 and resistor R7, turning on the second transistor Q2. The bus BUS then provides normal power to chip 200.
[0049] When overvoltage or undervoltage occurs: the first transistor Q1 is turned off, and the collector of the first transistor Q1 is pulled to a high level due to high resistance. A high level is formed through the fifth resistor R5 at the first end of the sixth resistor R6 and the first end of the seventh resistor R7. The second transistor Q2 is turned off, and the bus stops supplying power to the chip 200, thus realizing the protection function.
[0050] In some embodiments, the channel type of the second transistor Q2 is different from that of the first transistor Q1. It should be noted that in other embodiments, the first transistor Q1 is a PNP bipolar transistor and the second transistor Q2 is an NPN bipolar transistor; alternatively, the first transistor Q1 and the second transistor Q2 may also be field-effect transistors (MOS) with corresponding channel types.
[0051] In summary, the working principle of the over / under voltage protection circuit 100 described above is as follows:
[0052] The appropriate sampling voltage V_BUS is determined by selecting suitable resistance values based on the voltage divider principle of resistors in series. Specifically, the resistance values of the first resistor R1, the second resistor R2, and the sampling voltage V_BUS can be determined using the following formulas 1-1 and 1-2:
[0053]
[0054] Wherein, BUSOVP is the overvoltage threshold on the bus, exemplarily set to 990V; V_BUSOVP is the overvoltage threshold of the sampled voltage V_BUS. BUSUVLO is the undervoltage threshold on the bus, exemplarily set to 80V; V_BUSUVLO is the undervoltage threshold of the sampled voltage V_BUS. R1 represents the resistance value of the first resistor R1, and R2 represents the resistance value of the second resistor R2.
[0055] Calculations using Formulas 1-1 and 1-2 show that the resistance of the first resistor R1 is 3060KΩ, the resistance of the second resistor R2 is 11.5KΩ, V_BUSOVP is 3.7V, and V_BUSUVLO is 0.3V.
[0056] The sampled voltage V_BUS is compared in real time with the set reference voltages (undervoltage threshold UVLO_REF and overvoltage threshold OVP_REF) to determine whether the real-time voltage VCC of the bus BUS is within the normal operating range.
[0057] like Figure 4 As shown, if the sampled voltage V_BUS is less than or equal to the undervoltage threshold UVLO_REF, the overvoltage / undervoltage detection module 20 immediately outputs a low-level overvoltage / undervoltage protection signal VCC_ON. The first transistor Q1 is turned off or disconnected, and the base potential of the second transistor Q2 is pulled up to a high level. However, the base potential of the second transistor Q2 is close to the potential of the bus BUS, causing the second transistor Q2 to be turned off and unable to provide the output voltage VCC_AUX to the chip 200. The flyback chip in the auxiliary power supply 310 stops working, thus realizing the undervoltage protection function.
[0058] like Figure 5As shown, if the sampled voltage V_BUS is greater than or equal to the overvoltage threshold OVP_REF, the overvoltage and undervoltage detection module 20 immediately outputs a low-level overvoltage and undervoltage protection signal VCC_ON. The first transistor Q1 is turned off or disconnected, and the base potential of the second transistor Q2 is pulled up to a high level. However, the base potential of the second transistor Q2 is close to the potential of the bus BUS, causing the second transistor Q2 to be turned off and unable to provide the output voltage VCC_AUX to the chip 200. The flyback chip in the auxiliary power supply 310 stops working, thus realizing the overvoltage protection function.
[0059] like Figure 6 As shown, if the sampled voltage V_BUS is greater than the undervoltage threshold UVLO_REF and less than the overvoltage threshold OVP_REF, the overvoltage / undervoltage detection module 20 immediately outputs a high-level overvoltage / undervoltage protection signal VCC_ON. The first transistor Q1 enters the saturation conduction state, pulling down the base potential of the second transistor Q2. The real-time voltage VCC of the bus BUS is significantly higher than the base potential of the second transistor Q2, so the second transistor Q2 also enters the saturation conduction state, normally providing the output voltage VCC_AUX to the chip 200, and the flyback chip works normally.
[0060] In some embodiments, such as Figure 7 As shown, this embodiment also provides a photovoltaic inverter 300, which includes the over / under voltage protection circuit 100 described above.
[0061] It is understood that since the photovoltaic inverter 300 provided in this embodiment includes the over / under voltage protection circuit 100 mentioned above, it can also detect the same sampling voltage V_BUS through the over / under voltage detection module 20 and realize over / under voltage detection synchronously, and realize over / under voltage protection synchronously through an over / under voltage protection module 30. Compared with over / under voltage protection, which requires sampling the real-time voltage VCC separately and executing over / under voltage protection actions separately, the number of sampling modules 10 and over / under voltage protection modules 30 is reduced, thereby simplifying the topology. Compared with realizing over / under voltage protection through software judgment, realizing over / under voltage protection through hardware circuit has a faster response speed.
[0062] In some embodiments, such as Figure 8 As shown, the photovoltaic inverter 300 also includes an auxiliary power supply 310, the input of which is connected to the photovoltaic system and the output of which is connected to the bus.
[0063] It should be noted that the photovoltaic system provides input voltage to the auxiliary power supply 310, and the auxiliary power supply 310 provides real-time voltage VCC to the bus BUS.
[0064] In some embodiments, such as Figure 8As shown, the photovoltaic inverter 300 also includes a chip 200, which includes at least one of a control circuit 210, a drive circuit 220, and a protection circuit 230.
[0065] It should be noted that at least one of the control circuit 210, drive circuit 220 and protection circuit 230 is connected to the over- and under-voltage protection circuit 100 to provide an output voltage, VCC_AUX, for at least one of the control circuit 210, drive circuit 220 and protection circuit 230, ensuring safe power supply under normal conditions.
[0066] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.
[0067] The over / under voltage protection circuit 100 and the photovoltaic inverter 300 provided in the embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the technical solutions and core ideas of this application. Those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.
Claims
1. An over / under voltage protection circuit, characterized in that, The over / under voltage protection circuit includes: The sampling module is configured to sample the real-time voltage of the bus to obtain the sampled voltage; An over / under voltage detection module, connected to the sampling module, is configured to generate an over / under voltage protection signal based on the comparison result between the sampled voltage and the overvoltage threshold and the undervoltage threshold. An over / under voltage protection module, connected to the over / under voltage detection module, is configured to control the on / off state between the bus and the chip based on the over / under voltage protection signal.
2. The over / under voltage protection circuit according to claim 1, characterized in that, The sampling module includes: A first resistor, the first end of which is connected to the busbar; The second resistor has its first end connected to the second end of the first resistor and the over / under voltage detection module, and its second end connected to the ground terminal.
3. The over / under voltage protection circuit according to claim 1, characterized in that, The over / under voltage detection module includes: An overvoltage comparator is provided, wherein the first input terminal of the overvoltage comparator is connected to the overvoltage threshold, the second input terminal of the overvoltage comparator is connected to the sampled voltage, and the output terminal of the overvoltage comparator is connected to the overvoltage and undervoltage protection module. An undervoltage comparator is provided, wherein the first input terminal of the undervoltage comparator is connected to the second input terminal of the overvoltage comparator, the second input terminal of the undervoltage comparator is connected to the undervoltage threshold, and the output terminal of the undervoltage comparator is connected to the output terminal of the overvoltage comparator and the over / undervoltage protection module.
4. The over / under voltage protection circuit according to any one of claims 1-3, characterized in that, The over / under voltage protection module includes: The drive unit, connected to the over / under voltage detection module, is configured to generate a drive signal based on the over / under voltage protection signal; A switching unit, connected to the driving unit, is configured to control the on / off state between the bus and the chip according to the driving signal.
5. The over / under voltage protection circuit according to claim 4, characterized in that, The driving unit includes: The third resistor, the first end of which is connected to the over / under voltage detection module; The fourth resistor has its first end connected to the second end of the third resistor, and its second end connected to the ground terminal. A first capacitor, the first terminal of which is connected to the first terminal of the fourth resistor, and the second terminal of which is connected to the second terminal of the fourth resistor; The first transistor has its base connected to the second terminal of the third resistor, the first terminal of the fourth resistor, and the first terminal of the first capacitor. The emitter of the first transistor is connected to the ground terminal, and the collector of the first transistor is connected to the switching unit.
6. The over / under voltage protection circuit according to claim 5, characterized in that, The switching unit includes: The fifth resistor, the first end of which is connected to the collector of the first transistor; The sixth resistor, the first end of which is connected to the second end of the fifth resistor; The seventh resistor, the first end of which is connected to the second end of the fifth resistor and the first end of the sixth resistor; The base of the second transistor is connected to the second end of the seventh resistor, the emitter of the second transistor is connected to the second end of the sixth resistor and the bus, and the collector of the second transistor is connected to the chip.
7. The over / under voltage protection circuit according to claim 6, characterized in that, The channel type of the second transistor is different from that of the first transistor.
8. A photovoltaic inverter, characterized in that, The photovoltaic inverter includes an over / under voltage protection circuit as described in any one of claims 1-7.
9. The photovoltaic inverter according to claim 8, characterized in that, The photovoltaic inverter also includes an auxiliary power supply, the input of which is connected to the photovoltaic system and the output of which is connected to the bus.
10. The photovoltaic inverter according to claim 9, characterized in that, The photovoltaic inverter also includes the chip, which includes at least one of a control circuit, a drive circuit, and a protection circuit.