A power management circuit and a meteorological data acquisition terminal

Abstract

This utility model belongs to the technical field of meteorological detection equipment, and its purpose is to provide a power management circuit and a meteorological data acquisition terminal. The technical solution adopted is as follows: a power management circuit and a meteorological data acquisition terminal, including a main control circuit, a buck-boost drive circuit, a boost circuit, and a buck circuit; the controlled terminal of the buck-boost drive circuit is electrically connected to the main control circuit, and the output terminal of the buck-boost drive circuit is electrically connected to the controlled terminals of the boost circuit and the buck circuit; the buck-boost drive circuit adopts a half-bridge drive circuit; the power input terminals of the boost circuit and the buck circuit are both electrically connected to a power supply, the boost circuit is used to boost the voltage of the power supply, and the buck circuit is used to step down the voltage of the power supply. This utility model can reduce drive losses and improve voltage conversion efficiency.

Description

Technical Field

[0001] This utility model belongs to the technical field of meteorological detection equipment, specifically relating to a power management circuit and a meteorological data acquisition terminal. Background Technology

[0002] Meteorological data acquisition terminals are typically deployed in complex environments such as the field to continuously monitor meteorological parameters such as temperature, humidity, air pressure, and wind speed over long periods. Because they are powered by solar cells, the voltage input to the meteorological data acquisition terminal is susceptible to environmental factors such as changes in sunlight and temperature fluctuations, exhibiting a large fluctuation range. Since the various sensors and communication modules within the terminal require different stable voltages, the power management circuit needs to possess efficient buck-boost capabilities across a wide input range.

[0003] In traditional power management solutions, buck-boost drive circuits typically employ a combination of discrete switching transistors and freewheeling diodes. However, due to the high conduction losses of diodes, drive circuits often use RC delay or simple logic chip control, resulting in insufficient switching timing accuracy, low freewheeling efficiency, and slow dynamic response. This makes it difficult to meet the rapid voltage regulation requirements of weather terminals when input voltage changes abruptly or load transients occur. Utility Model Content

[0004] In order to at least partially solve the above-mentioned technical problems, this utility model provides a power management circuit and a meteorological data acquisition terminal.

[0005] To achieve the above objectives, the present invention adopts the following technical solution:

[0006] In a first aspect, this utility model discloses a power management circuit, including a main control circuit, a buck-boost drive circuit, a boost circuit, and a buck circuit; the controlled terminal of the buck-boost drive circuit is electrically connected to the main control circuit, and the output terminal of the buck-boost drive circuit is electrically connected to the controlled terminals of the boost circuit and the buck circuit; the buck-boost drive circuit adopts a half-bridge drive circuit; the power input terminals of the boost circuit and the buck circuit are both electrically connected to a power supply, the boost circuit is used to boost the voltage of the power supply, and the buck circuit is used to step down the voltage of the power supply.

[0007] In one possible design, the main control circuit uses an N32G430C8L7 microcontroller and its peripheral circuits.

[0008] In one possible design, the buck circuit includes a first input filter module, a first charge / discharge control module, a first inductor, and a first output filter module, which are sequentially connected to a power supply. The first charge / discharge control module includes a first N-type MOSFET and a second N-type MOSFET. The drain of the first N-type MOSFET is electrically connected to the output of the first input filter module. The source of the first N-type MOSFET is electrically connected to the drain of the second N-type MOSFET and the input of the first inductor. The gate of the first N-type MOSFET is electrically connected to one end of a first resistor and the anode of a first diode. The junction of the other end of the first resistor and the cathode of the first diode serves as the high-level controlled terminal of the buck circuit and is electrically connected to the output of the buck-boost drive circuit. The gate of the second N-type MOSFET is electrically connected to one end of a second resistor and the anode of a second diode. The junction of the other end of the second resistor and the cathode of the second diode serves as the low-level controlled terminal of the buck circuit and is electrically connected to the output of the buck-boost drive circuit. The source of the second N-type MOSFET is grounded through a third resistor.

[0009] In one possible design, the boost circuit includes a second input filter module, a second inductor, a second charge / discharge control module, and a second output filter module, which are sequentially connected to the power supply. The second charge / discharge control module includes a third N-type MOSFET and a fourth N-type MOSFET. The drain of the third N-type MOSFET is electrically connected to the input terminal of the second output filter module. The source of the third N-type MOSFET is electrically connected to the output terminal of the second inductor and the drain of the fourth N-type MOSFET. The gate of the third N-type MOSFET is electrically connected to one end of a fourth resistor and the anode of a third diode. The junction of the other end of the fourth resistor and the cathode of the third diode serves as the high-level controlled terminal of the boost circuit and is electrically connected to the output terminal of the buck-boost drive circuit. The gate of the fourth N-type MOSFET is electrically connected to one end of a fifth resistor and the anode of a fourth diode. The junction of the other end of the fifth resistor and the cathode of the fourth diode serves as the low-level controlled terminal of the boost circuit and is electrically connected to the output terminal of the buck-boost drive circuit. The source of the fourth N-type MOSFET is grounded through a sixth resistor.

[0010] In one possible design, the buck-boost drive circuit includes a boost drive circuit and a buck drive circuit; the buck drive circuit includes an EG2104 type first half-bridge driver chip, a first capacitor, a second capacitor, and a fifth diode. Pins 2 and 3 of the first half-bridge driver chip are electrically connected to the main control circuit as the controlled terminals of the buck drive circuit. Pin 1 of the first half-bridge driver chip is electrically connected to the power supply and the anode of the fifth diode. Pin 1 of the first half-bridge driver chip is also grounded through the first capacitor. The cathode of the fifth diode is electrically connected to pin 8 of the first half-bridge driver chip. The cathode of the fifth diode is also electrically connected to pin 6 of the first half-bridge driver chip through the second capacitor. Pins 5 and 7 of the first half-bridge driver chip are electrically connected to the controlled terminals of the buck drive circuit as the output terminals of the buck drive circuit.

[0011] The boost drive circuit includes an EG2104 type second half-bridge driver chip, a third capacitor, a fourth capacitor, and a sixth diode. Pins 2 and 3 of the second half-bridge driver chip are electrically connected to the main control circuit as the controlled terminals of the boost drive circuit. Pin 1 of the second half-bridge driver chip is electrically connected to the power supply and the anode of the sixth diode. Pin 1 of the second half-bridge driver chip is also grounded through the third capacitor. The cathode of the sixth diode is electrically connected to pin 8 of the second half-bridge driver chip. The cathode of the sixth diode is also electrically connected to pin 6 of the second half-bridge driver chip through the fourth capacitor. Pins 5 and 7 of the second half-bridge driver chip are electrically connected to the controlled terminals of the boost drive circuit as the output terminals of the boost circuit.

[0012] In one possible design, the power management circuit further includes a boost current monitoring circuit and a buck current monitoring circuit. The acquisition terminals of the boost current monitoring circuit and the buck current monitoring circuit are electrically connected to the current detection terminals of the boost circuit and the buck circuit, respectively. The detection signal output terminals of the boost current monitoring circuit and the buck current monitoring circuit are both electrically connected to the main control circuit.

[0013] In one possible design, the power management circuit further includes a short-circuit monitoring circuit, which includes a first operational amplifier and a second operational amplifier. The non-inverting input of the first operational amplifier is connected to the detection signal output of the buck current monitoring circuit through a seventh resistor. The non-inverting input of the first operational amplifier is also grounded through a fifth capacitor. The inverting input of the first operational amplifier is electrically connected to the first reference voltage signal pin of the main control circuit through an eighth resistor. The inverting input of the first operational amplifier is also grounded through a sixth capacitor. The output of the first operational amplifier is connected to the cathode of a seventh diode. The inverting input of the second operational amplifier is connected to the detection signal output of the boost current monitoring circuit through a ninth resistor. The inverting input of the second operational amplifier is also grounded through a seventh capacitor. The non-inverting input of the second operational amplifier is electrically connected to the second reference voltage signal pin of the main control circuit through a tenth resistor. The non-inverting input of the second operational amplifier is also grounded through an eighth capacitor. The output of the second operational amplifier is connected to the cathode of an eighth diode. The anodes of both the seventh and eighth diodes are electrically connected to the external trigger pin of the main control circuit.

[0014] In one possible design, the power management circuit further includes a main voltage monitoring circuit, a boost voltage monitoring circuit, and a buck voltage monitoring circuit. The acquisition terminals of the main voltage monitoring circuit, the boost voltage monitoring circuit, and the buck voltage monitoring circuit are respectively connected to the power supply, the power output terminals of the boost circuit, and the power output terminals of the buck circuit. The detection signal output terminals of the main voltage monitoring circuit, the boost voltage monitoring circuit, and the buck voltage monitoring circuit are all electrically connected to the main control circuit.

[0015] Secondly, this utility model discloses a meteorological data acquisition terminal, including a power management circuit as described in any of the above claims.

[0016] The beneficial effects of this invention are mainly reflected in its ability to reduce drive losses and improve voltage conversion efficiency. Specifically, this invention uses a half-bridge drive circuit to replace the traditional switching transistor and diode structure in the buck-boost drive circuit. During implementation, the main control circuit dynamically adjusts the PWM signal of the buck-boost drive circuit, thereby directly controlling the conduction and cutoff of the MOSFETs in the boost circuit and buck circuit, achieving high-efficiency energy conversion. Combined with the low conduction loss characteristics of the half-bridge drive circuit, it significantly improves conversion efficiency and has a fast response speed. It is especially suitable for meteorological data acquisition equipment that is sensitive to power consumption and size requirements, and has the value for widespread application. Attached Figure Description

[0017] Figure 1 This is the circuit schematic diagram of the main control circuit in Example 1;

[0018] Figure 2 This is the circuit diagram of the step-down circuit in Example 1;

[0019] Figure 3 This is the circuit diagram of the boost circuit in Example 1;

[0020] Figure 4 This is the circuit schematic of the buck drive circuit in Example 1;

[0021] Figure 5 This is the circuit schematic of the boost drive circuit in Example 1;

[0022] Figure 6 This is the circuit diagram of the step-down current monitoring circuit in Example 1;

[0023] Figure 7 This is the circuit schematic of the boost current monitoring circuit in Example 1;

[0024] Figure 8 This is the circuit diagram of the short-circuit monitoring circuit in Example 1;

[0025] Figure 9 This is the circuit diagram of the main voltage monitoring circuit in Example 1;

[0026] Figure 10 This is the circuit diagram of the step-down voltage monitoring circuit in Example 1;

[0027] Figure 11 This is the circuit diagram of the boost voltage monitoring circuit in Example 1. Detailed Implementation

[0028] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the present utility model will be briefly introduced below in conjunction with the accompanying drawings and descriptions of the embodiments or the prior art. Obviously, the following description of the structure of the accompanying drawings is only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. It should be noted that the description of these embodiments is used to help understand this utility model, but does not constitute a limitation on this utility model.

[0029] It should be understood that although the terms first, second, etc., may be used herein to describe various units, these units should not be limited by these terms. These terms are only used to distinguish one unit from another. For example, the first unit may be referred to as the second unit, and similarly, the second unit may be referred to as the first unit, without departing from the scope of the exemplary embodiments of this utility model.

[0030] Example 1:

[0031] This embodiment provides a power management circuit, including a main control circuit, a buck-boost drive circuit, a boost circuit, and a buck circuit. The controlled terminal of the buck-boost drive circuit is electrically connected to the main control circuit, and the output terminal of the buck-boost drive circuit is electrically connected to the controlled terminals of the boost circuit and the buck circuit. The buck-boost drive circuit adopts a half-bridge drive circuit. The power input terminals of the boost circuit and the buck circuit are both electrically connected to a power supply. The boost circuit is used to boost the voltage of the power supply, and the buck circuit is used to step down the voltage of the power supply.

[0032] This embodiment reduces drive losses and improves voltage conversion efficiency. Specifically, this embodiment uses a half-bridge drive circuit to replace the traditional switching transistor and diode structure in the buck-boost drive circuit. During implementation, the main control circuit dynamically adjusts the PWM signal of the buck-boost drive circuit, thereby directly controlling the on / off state of the MOSFETs in the boost and buck circuits to achieve high-efficiency energy conversion. Combined with the low conduction loss characteristics of the half-bridge drive circuit, it significantly improves conversion efficiency and has a fast response speed. It is particularly suitable for meteorological data acquisition equipment that is sensitive to power consumption and size requirements, and has the value for widespread application.

[0033] like Figure 1 As shown, the main control circuit uses the N32G430C8L7 microcontroller U6 and its peripheral circuits. It should be noted that the N32G430C8L7 microcontroller U6, equipped with a high-performance ARM Cortex-M4 core (with a main frequency of up to 128MHz), can quickly process real-time voltage / current monitoring data, achieving high-precision PWM dynamic adjustment (such as duty cycle control of buck-boost circuits), ensuring high stability of the power output; it has a built-in 12-bit high-speed ADC and multiple analog comparators, which can directly acquire feedback signals such as VO1_FB / VO2_FB, eliminating the need for an external ADC chip, simplifying circuit design and reducing costs; combined with its hardware-level PWM braking function, it can cut off abnormal outputs in microseconds, which is more reliable than software protection; at the same time, its wide operating voltage range (1.8~5.5V) and low power consumption characteristics make it suitable for battery- or solar-powered meteorological terminals, significantly improving system energy efficiency and environmental adaptability.

[0034] like Figure 2As shown, the step-down circuit includes a first input filter module, a first charge / discharge control module, a first inductor L1, and a first output filter module, which are sequentially connected to the power supply. The first charge / discharge control module includes a first N-type MOSFET Q1 and a second N-type MOSFET Q2. The drain of the first N-type MOSFET Q1 is electrically connected to the output terminal of the first input filter module. The source of the first N-type MOSFET Q1 is electrically connected to the drain of the second N-type MOSFET Q2 and the input terminal of the first inductor L1, respectively. The gate of the first N-type MOSFET Q1 is electrically connected to a first resistor R2. One end of the first resistor R2 is connected to the anode of the first diode D1, and the other end of the first resistor R2 is connected to the cathode of the first diode D1. The junction point after these connections serves as the high-level controlled terminal of the buck circuit and is electrically connected to the output terminal of the buck-boost drive circuit. The gate of the second N-type MOSFET Q2 is connected to one end of the second resistor R4 and the anode of the second diode D2. The junction point after these connections serves as the low-level controlled terminal of the buck circuit and is electrically connected to the output terminal of the buck-boost drive circuit. The source of the second N-type MOSFET Q2 is grounded through the third resistor R5.

[0035] It should be noted that during implementation, the buck-boost drive circuit can control the on / off state of the first N-type MOSFET Q1 and the second N-type MOSFET Q2 to achieve charging and discharging control of the first inductor L1. The first inductor L1 can realize the magnetic energy conversion and transfer of input electrical energy to load-side electrical energy.

[0036] Specifically, during implementation, when the output voltage of the buck circuit's output terminal VO1 is lower than the set value, the main control circuit controls the first N-type MOSFET Q1 to turn on and the second N-type MOSFET Q2 to turn off through the buck-boost drive circuit. At this time, the power supply is used to charge the first inductor L1. When the output voltage of the buck circuit's output terminal VO1 reaches or exceeds the set value, the main control circuit controls the first N-type MOSFET Q1 to turn off and the second N-type MOSFET Q2 to turn on through the buck-boost drive circuit. This accelerates the decay of the freewheeling current of the first inductor L1 and increases the reverse current, thereby reducing the output voltage of the buck circuit's output terminal VO1. This process is repeated to dynamically stabilize the output voltage of the buck circuit's output terminal VO1 at the set value.

[0037] like Figure 3As shown, the boost circuit includes a second input filter module, a second inductor L2, a second charge / discharge control module, and a second output filter module, which are sequentially connected to the power supply. The second charge / discharge control module includes a third N-type MOSFET Q3 and a fourth N-type MOSFET Q4. The drain of the third N-type MOSFET Q3 is electrically connected to the input terminal of the second output filter module. The source of the third N-type MOSFET Q3 is electrically connected to the output terminal of the second inductor L2 and the drain of the fourth N-type MOSFET Q4, respectively. The gate of the third N-type MOSFET Q3 is electrically connected to one end of a fourth resistor R9. The junction of the anode of the third diode D3 and the cathode of the fourth resistor R9, and the junction of the other end of the fourth resistor R9 and the cathode of the third diode D3, serves as the high-level controlled terminal of the boost circuit and is electrically connected to the output terminal of the boost-boost drive circuit. The gate of the fourth N-type MOS transistor Q4 is electrically connected to one end of the fifth resistor R10 and the anode of the fourth diode D4. The junction of the other end of the fifth resistor R10 and the cathode of the fourth diode D4 serves as the low-level controlled terminal of the boost circuit and is electrically connected to the output terminal of the boost-boost drive circuit. The source of the fourth N-type MOS transistor Q4 is grounded through the sixth resistor R11.

[0038] It should be noted that during implementation, the buck-boost drive circuit can control the on / off state of the third N-type MOSFET Q3 and the fourth N-type MOSFET Q4 to achieve charging and discharging control of the second inductor L2. The second inductor L2 can realize the magnetic energy conversion and transfer of input electrical energy to load-side electrical energy.

[0039] Specifically, during implementation, when the output voltage VO2 of the boost circuit is lower than the set value, the main control circuit controls the third N-type MOSFET Q3 to turn off and the fourth N-type MOSFET Q4 to turn on through the buck-boost drive circuit. At this time, the power supply charges the second inductor L2. After storing a certain amount of magnetic field energy on the second inductor L2, the main control circuit controls the third N-type MOSFET Q3 to turn on and the fourth N-type MOSFET Q4 to turn off through the buck-boost drive circuit. The voltage output from the output terminal VO2 of the boost circuit is charged by the freewheeling current on the second inductor L2, thus boosting the output voltage VO2 of the boost circuit. When the output voltage VO2 of the boost circuit reaches or exceeds the set value, the third N-type MOSFET Q3 and the fourth N-type MOSFET Q4 are turned off. This process is repeated until the output voltage VO2 of the boost circuit is dynamically stabilized at the set value.

[0040] In this embodiment, the first input filtering module, the first output filtering module, the second input filtering module, and the second output filtering module all employ multiple capacitors connected in parallel. The first input filtering module and the second input filtering module are used to filter out ripple and noise in the power supply to provide a stable DC input to the boost circuit and the buck circuit. The first output filtering module and the second output filtering module are used to smooth the output voltage of the boost circuit and the buck circuit, suppress ripple, and stabilize the output voltage of the boost circuit and the buck circuit, respectively.

[0041] In this embodiment, the boost / buck drive circuit includes a boost drive circuit and a buck drive circuit; such as Figure 4 As shown, the buck driver circuit includes an EG2104 type first half-bridge driver chip U3, a first capacitor C31, a second capacitor C32, and a fifth diode D5. Pins 2 and 3 of the first half-bridge driver chip U3 are electrically connected to the main control circuit as the controlled terminals of the buck driver circuit. Pin 1 of the first half-bridge driver chip U3 is electrically connected to the power supply and the anode of the fifth diode D5. Pin 1 of the first half-bridge driver chip U3 is also grounded through the first capacitor C31. The cathode of the fifth diode D5 is electrically connected to pin 8 of the first half-bridge driver chip U3. The cathode of the fifth diode D5 is also electrically connected to pin 6 of the first half-bridge driver chip U3 through the second capacitor C32. Pins 5 and 7 of the first half-bridge driver chip U3 are electrically connected to the controlled terminals of the buck driver circuit as the output terminals of the buck driver circuit.

[0042] like Figure 5 As shown, the boost drive circuit includes an EG2104 type second half-bridge driver chip U4, a third capacitor C33, a fourth capacitor C34, and a sixth diode D6. Pins 2 and 3 of the second half-bridge driver chip U4 are electrically connected to the main control circuit as the controlled terminals of the boost drive circuit. Pin 1 of the second half-bridge driver chip U4 is electrically connected to the power supply and the anode of the sixth diode D6. Pin 1 of the second half-bridge driver chip U4 is also grounded through the third capacitor C33. The cathode of the sixth diode D6 is electrically connected to pin 8 of the second half-bridge driver chip U4. The cathode of the sixth diode D6 is also electrically connected to pin 6 of the second half-bridge driver chip U4 through the fourth capacitor C34. Pins 5 and 7 of the second half-bridge driver chip U4 are electrically connected to the controlled terminals of the boost circuit as the output terminals of the boost drive circuit.

[0043] Specifically, in this embodiment, the high-level controlled terminal HO1 and the low-level controlled terminal LO1 of the buck circuit are used as drive signals for the buck drive circuit in the buck-boost drive circuit, so that the buck drive circuit can control the on / off state of the first N-type MOSFET Q1 and the second N-type MOSFET Q2. Similarly, the high-level controlled terminal HO2 and the low-level controlled terminal LO2 of the boost circuit are used as drive signals for the boost drive circuit in the buck-boost drive circuit, so that the boost drive circuit can control the on / off state of the third N-type MOSFET Q3 and the fourth N-type MOSFET Q4.

[0044] It should be noted that meteorological data acquisition terminals need to operate continuously for extended periods. If the power supply circuit lacks real-time monitoring and rapid protection mechanisms, it may cause equipment shutdown or data loss in the event of abnormal conditions such as voltage fluctuations, current overload, or short circuits, affecting the continuity of meteorological monitoring. Therefore, this embodiment further makes the following improvements:

[0045] The power management circuit further includes a boost current monitoring circuit and a buck current monitoring circuit. The acquisition terminals of the boost current monitoring circuit and the buck current monitoring circuit are electrically connected to the current detection terminals of the boost circuit and the buck circuit, respectively. The detection signal output terminals of the boost current monitoring circuit and the buck current monitoring circuit are both electrically connected to the main control circuit. Specifically, in this embodiment, as... Figure 6 and Figure 7 As shown, both the boost current monitoring circuit and the buck current monitoring circuit use the INA199A1DCKR type current sensing amplifier and its peripheral circuits. This type of current sensing amplifier is often used for overcurrent protection, precision current measurement or closed-loop feedback circuits, and can realize real-time current monitoring of boost circuits and voltage circuits.

[0046] To address electromagnetic interference in the field, such as lightning and temperature changes, traditional power management circuits typically employ isolated half-bridge drive designs, such as optocouplers or transformer isolation, to improve interference immunity. However, such solutions suffer from problems such as circuit complexity, large size, and high power loss, making it difficult to meet the miniaturization and low power consumption requirements of meteorological data acquisition terminals. Therefore, this embodiment further makes the following improvements:

[0047] like Figure 8As shown, the power management circuit also includes a short-circuit monitoring circuit, which includes a first operational amplifier U9A and a second operational amplifier U9B. The non-inverting input of the first operational amplifier U9A is connected to the detection signal output of the buck current monitoring circuit through a seventh resistor R31. The non-inverting input of the first operational amplifier U9A is also grounded through a fifth capacitor C43. The inverting input of the first operational amplifier U9A is electrically connected to the first reference voltage signal pin of the main control circuit (pin 46 of the microcontroller U6) through an eighth resistor R30. The inverting input of the first operational amplifier U9A is also grounded through a sixth capacitor C42. The output of the first operational amplifier U9A is connected to the cathode of a seventh diode D8. The inverting input of the second operational amplifier U9B is connected to the detection signal output of the boost current monitoring circuit through the ninth resistor R32. The inverting input of the second operational amplifier U9B is also grounded through the seventh capacitor C49. The non-inverting input of the second operational amplifier U9B is electrically connected to the second reference voltage signal pin of the main control circuit (pin 45 of the microcontroller U6) through the tenth resistor R33. The non-inverting input of the second operational amplifier U9B is also grounded through the eighth capacitor C50. The output of the second operational amplifier U9B is connected to the cathode of the eighth diode D9. The anodes of the seventh diode D8 and the eighth diode D9 are both electrically connected to the external trigger pin of the main control circuit (pin 25 of the microcontroller U6).

[0048] Specifically, in this embodiment, the first operational amplifier U9A is used to compare the voltage output by the buck current monitoring circuit with the first reference voltage output by the main control circuit. The output terminal of the first operational amplifier U9A is connected to the external trigger pin of the main control circuit through the seventh diode D8. The second operational amplifier U9B is similarly connected. Thus, the main control circuit can respond to special events of excessive current in real time, thereby protecting the power management system.

[0049] It should be noted that, based on the configuration of the short-circuit monitoring circuit, this embodiment can still ensure anti-interference capability in a non-isolated architecture, while reducing the circuit size and adapting to compact applications of meteorological data acquisition terminals.

[0050] In this embodiment, the power management circuit further includes a main voltage monitoring circuit, a boost voltage monitoring circuit, and a buck voltage monitoring circuit. The acquisition terminals of the main voltage monitoring circuit, the boost voltage monitoring circuit, and the buck voltage monitoring circuit are respectively connected to the power supply, the power output terminals of the boost circuit, and the power output terminals of the buck circuit. The detection signal output terminals of the main voltage monitoring circuit, the boost voltage monitoring circuit, and the buck voltage monitoring circuit are all electrically connected to the main control circuit. Specifically, in this embodiment, the circuit schematics of the main voltage monitoring circuit, the buck voltage monitoring circuit, and the boost voltage monitoring circuit are shown in the following diagrams. Figures 9 to 11 As shown, the main voltage monitoring circuit includes an eleventh resistor R12 and a twelfth resistor R16. One end of the eleventh resistor R12 serves as the acquisition terminal of the main voltage monitoring circuit and is electrically connected to the power supply. The other end of the eleventh resistor R12 is grounded through the twelfth resistor R16. The junction of the eleventh resistor R12 and the twelfth resistor R16 serves as the detection signal output terminal of the main voltage monitoring circuit and is electrically connected to the main control circuit. The boost voltage monitoring circuit and the buck voltage monitoring circuit adopt the same circuit structure as the main voltage monitoring circuit to realize the main control circuit's voltage monitoring of the power supply, the boost circuit, and the buck circuit.

[0051] It should be noted that this embodiment, by integrating real-time voltage / current monitoring functions, can ensure the stable operation of the meteorological data acquisition terminal in complex power supply environments.

[0052] Example 2:

[0053] This embodiment provides a meteorological data acquisition terminal, including a power management circuit as described in any one of Embodiment 1.

[0054] Finally, it should be noted that the above description is merely a preferred embodiment of this utility model and is not intended to limit the scope of protection of this utility model. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this utility model should be included within the scope of protection of this utility model.

Claims

1. A power management circuit, characterized in that: It includes a main control circuit, a buck-boost drive circuit, a boost circuit, and a buck circuit; the controlled terminal of the buck-boost drive circuit is electrically connected to the main control circuit, and the output terminal of the buck-boost drive circuit is electrically connected to the controlled terminals of the boost circuit and the buck circuit; the buck-boost drive circuit adopts a half-bridge drive circuit; the power supply input terminals of the boost circuit and the buck circuit are both electrically connected to a power supply, the boost circuit is used to boost the voltage of the power supply, and the buck circuit is used to step down the voltage of the power supply.

2. The power management circuit according to claim 1, characterized in that: The main control circuit uses an N32G430C8L7 microcontroller (U6) and its peripheral circuits.

3. The power management circuit according to claim 1, characterized in that: The step-down circuit includes a first input filter module, a first charge / discharge control module, a first inductor (L1), and a first output filter module, all sequentially connected to the power supply. The first charge / discharge control module includes a first N-type MOSFET (Q1) and a second N-type MOSFET (Q2). The drain of the first N-type MOSFET (Q1) is electrically connected to the output terminal of the first input filter module. The source of the first N-type MOSFET (Q1) is electrically connected to the drain of the second N-type MOSFET (Q2) and the input terminal of the first inductor (L1), respectively. The gate of the first N-type MOSFET (Q1) is electrically connected to one end of a first resistor (R2) and... The anode of the first diode (D1), the junction point where the other end of the first resistor (R2) and the cathode of the first diode (D1) are connected serves as the high-level controlled terminal of the buck circuit and is electrically connected to the output terminal of the buck-boost drive circuit. The gate of the second N-type MOS transistor (Q2) is connected to one end of the second resistor (R4) and the anode of the second diode (D2). The junction point where the other end of the second resistor (R4) and the cathode of the second diode (D2) are connected serves as the low-level controlled terminal of the buck circuit and is electrically connected to the output terminal of the buck-boost drive circuit. The source of the second N-type MOS transistor (Q2) is grounded through the third resistor (R5).

4. The power management circuit according to claim 1, characterized in that: The boost circuit includes a second input filter module, a second inductor (L2), a second charge / discharge control module, and a second output filter module, which are sequentially connected to the power supply. The second charge / discharge control module includes a third N-type MOSFET (Q3) and a fourth N-type MOSFET (Q4). The drain of the third N-type MOSFET (Q3) is electrically connected to the input terminal of the second output filter module. The source of the third N-type MOSFET (Q3) is electrically connected to the output terminal of the second inductor (L2) and the drain of the fourth N-type MOSFET (Q4). The gate of the third N-type MOSFET (Q3) is electrically connected to one end of a fourth resistor (R9) and the second inductor (L2). The anode of the third diode (D3), the junction point where the other end of the fourth resistor (R9) and the cathode of the third diode (D3) are connected serves as the high-level controlled terminal of the boost circuit and is electrically connected to the output terminal of the buck-boost drive circuit. The gate of the fourth N-type MOS transistor (Q4) is electrically connected to one end of the fifth resistor (R10) and the anode of the fourth diode (D4). The junction point where the other end of the fifth resistor (R10) and the cathode of the fourth diode (D4) are connected serves as the low-level controlled terminal of the boost circuit and is electrically connected to the output terminal of the buck-boost drive circuit. The source of the fourth N-type MOS transistor (Q4) is grounded through the sixth resistor (R11).

5. A power management circuit according to claim 1, characterized in that: The buck-boost drive circuit includes a boost drive circuit and a buck drive circuit. The buck drive circuit includes an EG2104 type first half-bridge drive chip (U3), a first capacitor (C31), a second capacitor (C32), and a fifth diode (D5). Pins 2 and 3 of the first half-bridge drive chip (U3) are electrically connected to the main control circuit as the controlled terminals of the buck drive circuit. Pin 1 of the first half-bridge drive chip (U3) is electrically connected to the power supply and the anode of the fifth diode (D5). Pin 1 of the first half-bridge drive chip (U3) is also grounded through the first capacitor (C31). The cathode of the fifth diode (D5) is electrically connected to pin 8 of the first half-bridge drive chip (U3). The cathode of the fifth diode (D5) is also electrically connected to pin 6 of the first half-bridge drive chip (U3) through the second capacitor (C32). Pins 5 and 7 of the first half-bridge drive chip (U3) are electrically connected to the controlled terminals of the buck drive circuit as the output terminals of the buck drive circuit. The boost drive circuit includes an EG2104 type second half-bridge driver chip (U4), a third capacitor (C33), a fourth capacitor (C34), and a sixth diode (D6). Pins 2 and 3 of the second half-bridge driver chip (U4) are electrically connected to the main control circuit as the controlled terminals of the boost drive circuit. Pin 1 of the second half-bridge driver chip (U4) is electrically connected to the power supply and the anode of the sixth diode (D6). Pin 1 of the second half-bridge driver chip (U4) is also grounded through the third capacitor (C33). The cathode of the sixth diode (D6) is electrically connected to pin 8 of the second half-bridge driver chip (U4). The cathode of the sixth diode (D6) is also electrically connected to pin 6 of the second half-bridge driver chip (U4) through the fourth capacitor (C34). Pins 5 and 7 of the second half-bridge driver chip (U4) are electrically connected to the controlled terminals of the boost circuit as the output terminals of the boost drive circuit.

6. A power management circuit according to claim 1, characterized in that: The power management circuit further includes a boost current monitoring circuit and a buck current monitoring circuit. The acquisition terminals of the boost current monitoring circuit and the buck current monitoring circuit are electrically connected to the current detection terminals of the boost circuit and the buck circuit, respectively. The detection signal output terminals of the boost current monitoring circuit and the buck current monitoring circuit are both electrically connected to the main control circuit.

7. A power management circuit according to claim 6, characterized in that: The power management circuit also includes a short-circuit monitoring circuit, which comprises a first operational amplifier (U9A) and a second operational amplifier (U9B). The non-inverting input of the first operational amplifier (U9A) is connected to the detection signal output of the buck current monitoring circuit via a seventh resistor (R31). The non-inverting input of the first operational amplifier (U9A) is also grounded via a fifth capacitor (C43). The inverting input of the first operational amplifier (U9A) is electrically connected to the first reference voltage signal pin of the main control circuit via an eighth resistor (R30). The inverting input of the first operational amplifier (U9A) is also grounded via a sixth capacitor (C42). The output of the first operational amplifier (U9A) is connected to the cathode of the seventh diode (D8). The second operational amplifier (U9B) is connected to the detection signal output of the boost current monitoring circuit via the ninth resistor (R32). The inverting input of the second operational amplifier (U9B) is also grounded via the seventh capacitor (C49). The non-inverting input of the second operational amplifier (U9B) is electrically connected to the second reference voltage signal pin of the main control circuit via the tenth resistor (R33). The non-inverting input of the second operational amplifier (U9B) is also grounded via the eighth capacitor (C50). The output of the second operational amplifier (U9B) is connected to the cathode of the eighth diode (D9). The anodes of the seventh diode (D8) and the eighth diode (D9) are both electrically connected to the external trigger pin of the main control circuit.

8. A power management circuit according to claim 1, characterized in that: The power management circuit further includes a main voltage monitoring circuit, a boost voltage monitoring circuit, and a buck voltage monitoring circuit. The acquisition terminals of the main voltage monitoring circuit, the boost voltage monitoring circuit, and the buck voltage monitoring circuit are respectively connected to the power supply, the power output terminals of the boost circuit, and the power output terminals of the buck circuit. The detection signal output terminals of the main voltage monitoring circuit, the boost voltage monitoring circuit, and the buck voltage monitoring circuit are all electrically connected to the main control circuit.

9. A meteorological data acquisition terminal, characterized in that: Includes the power management circuit as described in any one of claims 1 to 8.

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