Linear emitting aperture vcSEL chip
By using a linear light-emitting aperture design, the density and area of the light-emitting apertures in the VCSEL chip are increased, solving the problem of insufficient optical power in existing VCSEL chips. This achieves high optical power density and efficient photoelectric conversion, making it suitable for 3D sensing applications.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- ZHEJIANG RAYSEASC TECH CO LTD
- Filing Date
- 2025-03-29
- Publication Date
- 2026-07-03
Smart Images
Figure CN224458943U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor chips, and more specifically, to a linear light-emitting aperture VCSEL chip. Background Technology
[0002] A VCSEL (Vertical-Cavity Surface-Emitting Laser) is a semiconductor laser with an optical resonant cavity perpendicular to the substrate. A VCSEL consists of multiple semiconductor layers, including a p-type Bragg mirror, an n-type Bragg mirror, and an active region layer. Electrons recombine with holes in the active region to form photons. These photons are then reflected and amplified by the p-type and n-type Bragg mirrors before being emitted through the exit aperture.
[0003] In 3D sensing applications, the peak power density of VCSELs is a crucial parameter, impacting the overall performance of systems using VCSEL chips as core components. VCSELs possess excellent beam quality and directivity, resulting in a more concentrated beam that can more accurately illuminate the target, thus improving the accuracy of 3D sensing. However, existing VCSEL chips, due to size limitations, struggle to effectively increase their optical power. Therefore, a novel, small-sized, high-power driving solution suitable for pulsed lidar is needed. Utility Model Content
[0004] One advantage of this application is that it provides a linear light-emitting aperture VCSEL chip, in which the area of the light-emitting aperture can be increased without increasing the area by arranging the light-emitting apertures in an elongated shape / sawtooth shape in the Y direction (not limited to the Y direction, it can also be X direction) to increase the density of the light-emitting apertures, thereby improving the gain per unit area, increasing the light emission power and photoelectric conversion efficiency. This method does not require additional processes and does not increase the cost.
[0005] To achieve at least one of the above advantages or other advantages and objectives, according to one aspect of this application, a linear light-emitting aperture VCSEL chip is provided, comprising at least one light-emitting array having at least one linear light-emitting aperture.
[0006] In the linear light-emitting aperture VCSEL chip according to this application, the shape of the light-emitting aperture is one of a straight line, a curve, or a broken line.
[0007] In the linear light-emitting aperture VCSEL chip according to this application, the light-emitting array includes a first electrode, a substrate layer, a first Bragg mirror, an active region, an electrical confinement layer, a second Bragg mirror, and a second electrode, wherein the light-emitting aperture is formed on the electrical confinement layer.
[0008] The linear light-emitting aperture VCSEL chip according to this application also includes a light-emitting unit adjacent to the linear light-emitting aperture.
[0009] In the linear light-emitting aperture VCSEL chip according to this application, the shape of the light-emitting unit is either a circle or an N-sided polygon, where N is an integer.
[0010] In the linear light-emitting aperture VCSEL chip according to this application, the first Bragg reflector is a P-type Bragg reflector and the second Bragg reflector is an N-type Bragg reflector.
[0011] In the linear light-emitting aperture VCSEL chip according to this application, the first Bragg reflector is an N-type Bragg reflector and the second Bragg reflector is a P-type Bragg reflector.
[0012] The further objectives and advantages of this application will become fully apparent from the following description and accompanying drawings.
[0013] These and other objects, features and advantages of this application are fully apparent from the following detailed description, the accompanying drawings and the claims. Attached Figure Description
[0014] Figure 1 The figure shows a schematic block diagram of a linear light-emitting aperture VCSEL chip according to an embodiment of this application.
[0015] Figure 2 The figure shows a schematic block diagram of a linear light-emitting aperture VCSEL chip according to an embodiment of this application.
[0016] Figure 3 The illustration shows a schematic diagram of a linear light-emitting aperture VCSEL chip according to an embodiment of this application.
[0017] Figure 4 The illustration shows a schematic diagram of a modified embodiment of a linear light-emitting aperture VCSEL chip according to an embodiment of this application.
[0018] Figure 5 The illustration shows a schematic diagram of a modified embodiment of a linear light-emitting aperture VCSEL chip according to an embodiment of this application.
[0019] Figure 6 The figure shows a schematic flowchart of a boost method according to an embodiment of this application.
[0020] Figure 7 The illustration shows a schematic diagram of the light-emitting apertures of the light-emitting array of a VCSEL chip according to an embodiment of this application. Detailed Implementation
[0021] The following description is intended to disclose this application and enable those skilled in the art to implement it. The embodiments described below are merely examples, and other obvious variations will occur to those skilled in the art. The basic principles of this application defined in the following description can be applied to other embodiments, modifications, improvements, equivalents, and other technical solutions that do not depart from the spirit and scope of this application.
[0022] It is understood that the term "a" should be understood as "at least one" or "one or more", that is, in one embodiment, the number of an element can be one, while in another embodiment, the number of the element can be multiple, and the term "a" should not be understood as a limitation on the number.
[0023] While ordinal numbers such as "first," "second," etc., will be used to describe various components, there is no limitation on which components are used here. The term is used only to distinguish one component from another. For example, a first component may be referred to as a second component, and similarly, a second component may be referred to as a first component, without departing from the teachings of the application concept. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.
[0024] The terminology used herein is for the purpose of describing various embodiments only and is not intended to be limiting. As used herein, the singular form also includes the plural form, unless the context clearly indicates otherwise. It will also be understood that the terms "comprising" and / or "having," when used in this specification, specify the presence of the described features, numbers, steps, operations, components, elements, or combinations thereof, without excluding the presence of one or more other features, numbers, steps, operations, components, elements, or groups thereof, or as outlined in the application summary.
[0025] As mentioned earlier, the peak power density of VCSELs in 3D sensing affects the overall performance of the VCSEL system. However, the small-sized VCSELs used in existing smartphones, wearable devices, drones, and other terminal products have low peak power densities and cannot provide sufficient light power to illuminate the target scene to accurately obtain the depth information of the target scene.
[0026] Based on the above, this application proposes a linear light-emitting aperture VCSEL chip, which includes at least one light-emitting array, and the light-emitting array has at least one linear light-emitting aperture. The design of the linear light-emitting aperture increases the light emission density of the VCSEL per unit area, thereby improving the light power density of the light-emitting aperture.
[0027] Example
[0028] Reference manual attached Figures 1 to 7According to embodiments of this application, a linear light-emitting aperture VCSEL chip includes a light-emitting array, wherein each laser has one or more light-emitting arrays. Each light-emitting array corresponds to a light-emitting aperture 16, through which the laser is emitted, and the light-emitting aperture 16 is of a linear shape. (See attached figure.) Figure 1 In this embodiment, the light-emitting aperture 16-1 is a straight line, and the length direction of the straight light-emitting aperture 16-1 is parallel to one edge of the laser. For example... Figure 2 As shown, in another embodiment, the light-emitting aperture 16-2 is linear in shape, and its length direction is parallel to the diagonal of the laser, and the plurality of light-emitting apertures 16-2 are arranged at equal intervals. Figure 3 As shown, in another embodiment, the light-emitting holes 16-3 are in the shape of a broken line, and the broken line light-emitting holes 16-3 are arranged at equal intervals on the laser.
[0029] like Figure 4 and Figure 5 As shown, the light-emitting array further includes multiple light-emitting units (20-1, 20-2), with spacing between them. The light-emitting units (20-1, 20-2) are located on one side of the light-emitting aperture. The shape of the light-emitting units (20-1, 20-2) is either circular or hexagonal.
[0030] refer to Figure 7 The VCSEL chip light-emitting array disclosed in this application includes, from bottom to top, a substrate layer 11, a first Bragg mirror 12, an active region 13, an electrical confinement layer 14, and a second Bragg mirror 15. The substrate layer 11 serves as the base for the light-emitting aperture 10, and the first Bragg mirror 12 is stacked on the upper surface of the substrate layer 11. The substrate layer 11 is an N-type doped gallium arsenide substrate, or in other embodiments, a P-type doped gallium arsenide substrate; of course, in other embodiments, the material of the substrate layer 11 can be a doped material such as InP, GaN, or GaAs. The substrate layer 11 has a top surface and a bottom surface, and a first electrode 19 is disposed on the bottom surface of the substrate layer 11, serving as the cathode of the light-emitting aperture 10.
[0031] In this embodiment, the first Bragg reflector 12 is grown and stacked on the top surface of the substrate layer 11 using vapor phase epitaxy (MOCVD). The first Bragg reflector 12 is an N-DBR, which is formed by alternating stacks of N-type doped high-aluminum-content AlxGaAs and N-type doped low-aluminum-content AlxGaAs. It is worth noting that the material selection of the alternating layers depends on the operating wavelength of the laser emitted from the light-emitting aperture 10, and the optical thickness of the alternating layers is equal to or approximately equal to 1 / 4 of the operating wavelength of the laser. The second Bragg reflector 15 is located above the first Bragg reflector 12. The second Bragg reflector 15 is grown to the top surface of the active region 13 using MOCVD. The second Bragg reflector 15 is a P-DBR, which is formed by alternating stacks of multiple P-type doped high-aluminum-content AlxGaAs and P-type doped low-aluminum-content AlxGaAs.
[0032] In other embodiments, the first Bragg reflector is a P-DBR and the second Bragg reflector is an N-DBR.
[0033] The active region 13 is grown on the top surface of the first Bragg mirror 12 by vapor phase epitaxy (MOCVD). The active region 13 is sandwiched between the first Bragg mirror 12 and the second Bragg mirror 15 to form a resonant cavity. After being excited, photons are repeatedly amplified by reflecting back and forth in the resonant cavity to form laser oscillation, thereby forming a laser.
[0034] In this embodiment, the second Bragg reflector 15 has an insulating protective layer on the side away from the active region 13. This protective layer protects the second Bragg reflector 15 from damage during operation and adjusts the laser emitted from the active region 13, improving the divergence angle and optical power of the light-emitting aperture 10. In this embodiment, the protective layer is preferably made of Si3N4 (silicon nitride), which has insulating and optical modulation properties. In other modified embodiments, the protective layer can be any one of SiO2, Al2O3, and AlN. Alternatively, in yet another modified embodiment, the protective layer can be a combination of multiple materials selected from SiO2, Si3N4, Al2O3, and AlN.
[0035] The electrical confinement layer 14 is formed below the second Bragg reflector 15 or above the active region 13. This electrical confinement layer 14 has a high resistivity to guide charge from the central region of the VCSEL chip into the active region 13. The electrical confinement layer 14 has a ring structure, and the area enclosed by the electrical confinement layer 14 forms a light-emitting aperture 16 for laser emission from the active region 13. In a view from the second Bragg reflector 15 toward the first Bragg reflector 12, the light-emitting aperture 16 has the linear structure described above; in other embodiments, a light-emitting unit is located near the light-emitting aperture, which is a circular or hexagonal structure, and the light-emitting unit is the unoxidized portion of the electrical confinement layer.
[0036] In summary, the VCSEL chip based on the embodiments of this application is explained. The VCSEL chip can increase the area of the light-emitting holes without increasing the area by arranging the light-emitting holes in a strip-shaped or sawtooth-shaped manner, thereby increasing the density of the light-emitting holes. This can improve the gain per unit area, improve the luminous power and photoelectric conversion efficiency. This method does not require additional processes and does not increase the cost.
[0037] The basic principles of this application have been described above with reference to specific embodiments. However, it should be noted that the advantages, benefits, and effects mentioned in this application are merely examples and not limitations, and should not be considered as essential features of each embodiment of this application. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the application to the necessity of employing the aforementioned specific details for implementation.
Claims
1. A linear light emitting aperture VCSEL chip, characterized by, It includes at least one light-emitting array, wherein the light-emitting array has at least one linear light-emitting hole.
2. The linear light emitting aperture VCSEL chip of claim 1, wherein, The shape of the linear light-emitting hole is one of a straight line, a curve, or a broken line.
3. The linear light emitting aperture VCSEL chip of claim 1, wherein, The light-emitting array includes a first electrode, a substrate layer, a first Bragg mirror, an active region, an electrical confinement layer, a second Bragg mirror, and a second electrode, with the light-emitting aperture formed on the electrical confinement layer.
4. The linear light emitting aperture VCSEL chip of claim 1, wherein, It also includes a light-emitting unit adjacent to the linear light-emitting aperture.
5. The linear light emitting aperture VCSEL chip of claim 4, wherein, The shape of the light-emitting unit is either a circle or an N-sided polygon, where N is an integer.
6. The linear light-emitting aperture VCSEL chip according to claim 3, wherein, The first Bragg reflector is a P-type Bragg reflector, and the second Bragg reflector is an N-type Bragg reflector.
7. The linear light emitting aperture VCSEL chip of claim 3, wherein, The first Bragg reflector is an N-type Bragg reflector, and the second Bragg reflector is a P-type Bragg reflector.