A flyback circuit

Abstract

The utility model discloses a flyback circuit, including setting in transformer primary side's double -tube series connection topological circuit, transformer primary side sets between voltage input high potential and low potential, transformer secondary side voltage output after secondary circuit, topological circuit is with transformer primary side winding series connection and mutual between series connection's first MOS pipe circuit and second MOS pipe circuit. Through adopting above -mentioned structure, MOS pipe adopts 900VDC voltage resistance general MOS pipe series connection flyback circuit, is applied to ultra -wide superhigh voltage DCDC switching power supply module circuit, the general voltage resistance MOS pipe of utility model uses generally uses TO 220 package, need not special gate electrode driving chip, can effectively solve single MOS package big, cannot share voltage resistance and heat dissipation problem, greatly optimizes the whole machine comprehensive cost simultaneously.

Description

Technical Field

[0001] This utility model relates to a flyback circuit, and more particularly to a flyback circuit that uses a series MOSFET to effectively improve the input voltage withstand range of the module. Background Technology

[0002] Against the backdrop of accelerated global energy transition, photovoltaic (PV) energy technology, as a core driving force of this transition, is undergoing a strategic shift from "supplementary energy" to "primary energy." While solar PV and wind power systems are environmentally friendly, the output voltage of PV solar panels varies with light intensity, temperature, and the characteristics of the cells themselves. Similarly, the output voltage of wind power systems is significantly affected by wind speed and direction. Therefore, both solar PV and wind power systems must utilize ultra-wideband and ultra-high-voltage DC-DC power modules to provide auxiliary power. The auxiliary power supply for such applications is generally below 100W, with a common operating voltage range of approximately 80VDC to 1000VDC. For PV auxiliary power supplies below 100W with an input voltage of 80VDC-1000VDC... For actual power supply system requirements, compared to traditional forward, half-bridge, and full-bridge topologies, flyback topologies, with their advantages of simple structure, natural isolation, and strong voltage adaptability, have become the ideal solution for such applications. However, the withstand voltage requirement of the main switching transistor in this type of flyback topology is a technical challenge. Traditional MOSFETs, such as typical planar power MOSFETs, have a withstand voltage of around 650VDC, mature COOLMOS power transistors have a withstand voltage of 900VDC, and new superjunction MOSFETs can only achieve a withstand voltage of 1200VDC. Moreover, their internal resistance is generally high, and the MOSFETs themselves generate significant heat under high voltage and high current. According to the calculation formula for flyback topologies, the main switching transistor needs to have a withstand voltage of at least 1500VDC to ensure reliable withstand voltage. At this point, a single ordinary withstand voltage MOSFET cannot meet the application requirements.

[0003] IGBTs (Insulated Gate Bipolar Transistors) are a new type of composite power electronic device composed of MOSFETs and BJTs. They can withstand high voltages, and currently, common IGBTs can achieve very high withstand voltages, with a maximum withstand voltage of 6500VDC. In this application, if a single IGBT is used as the primary main switch, a mature 1700VDC withstand voltage transistor can be selected. Although the withstand voltage meets the requirements, IGBTs also have obvious disadvantages. IGBTs require special drive circuits. Additionally, this type of IGBT has a large package, typically a TO-247 package. When using discrete components for driving, the operating frequency is generally only around 20kHz. If a higher switching frequency is required, in addition to a normal PWM main control chip, a dedicated gate driver chip is needed, such as the Infineon 1ED020I12-F2. IGBT gate driver chip solutions are available, but the frequency can only be within 100kHz. Dedicated gate driver chips can not only provide the required drive power to IGBTs under normal operating conditions, but also protect IGBTs under abnormal operating conditions. They can also provide good isolation between high voltage and other circuits in power electronic systems. However, they are not conducive to product miniaturization and have high overall project costs.

[0004] With the continuous development of power device technology, third-generation semiconductor devices, SiC, are gradually becoming commercially available. Their withstand voltage can reach 6500VDC and above, and their internal resistance can be made within 100 milliohms. This can effectively solve the problems of low efficiency and low operating frequency of IGBTs. However, SiC is much more expensive than IGBTs and has not been commercially available in large quantities. Secondly, like IGBTs, SiC MOSFETs require not only a normal PWM main control chip but also a specific gate driver chip, such as the ROHM BM61S41RFVCSIC gate driver chip. The overall circuit is complex, and each switching transistor needs a heat sink for heat dissipation, which is not conducive to product miniaturization and cost reduction. Utility Model Content

[0005] The technical problem to be solved by this utility model is to provide a flyback circuit, which has the feature of using MOS transistors in series to flyback, which can effectively improve the input voltage withstand range of the module.

[0006] To solve the above-mentioned technical problems, the technical solution of this utility model is as follows: a flyback circuit, the innovation of which is: a dual-transistor series topology circuit disposed on the primary side of the transformer, the primary side of the transformer is disposed between the high and low voltage input potentials, and the voltage output of the secondary side of the transformer is obtained after passing through the secondary circuit. The topology circuit is a first MOS transistor circuit and a second MOS transistor circuit that are connected in series with the primary winding of the transformer and connected in series with each other.

[0007] Preferably, an electrolytic capacitor EC1 and an electrolytic capacitor EC2 are connected in series between the high voltage input potential and the low voltage input potential.

[0008] The first MOS transistor circuit and the second MOS transistor circuit are respectively connected to the first PWM chip through a three-winding isolation drive transformer. The primary side of the three-winding isolation drive transformer is connected to the first PWM chip through R1 and capacitor C1 connected in series. The secondary side of the three-winding isolation drive transformer is connected to the first MOS transistor circuit and the second MOS transistor circuit through the first winding and the second winding, respectively. The three-winding isolation drive transformer converts the gate drive signal of the first PWM chip into two drive signals with the same amplitude and phase, which are then sent to the first winding and the second winding on the secondary side of the three-winding isolation drive transformer. The two drive signals with the same amplitude and phase are respectively connected to the first MOS transistor circuit and the second MOS transistor circuit. The model of the first PWM chip is LN3C62SIC.

[0009] Preferably, the first MOS transistor circuit includes a MOS transistor Q1 disposed between the primary winding of the transformer and the high voltage input potential, and a resistor R2 disposed between the gate of the MOS transistor Q1 and the primary winding, wherein the primary winding is connected to the primary winding of the transformer.

[0010] A resistor R3 is provided between the gate of the MOS transistor Q1 and the primary winding of the transformer. The resistor R3 is grounded through diodes D1 and D2 connected in series. The positive terminal of diode D1 is connected to the negative terminal of diode D2, and the positive terminal of diode D2 is grounded.

[0011] Preferably, the second MOS transistor circuit includes a MOS transistor Q2 located between the primary winding of the transformer and the low voltage input potential, a resistor R6 connected in series between the low voltage input potential and the MOS transistor Q2, a resistor R4 located between the gate of the MOS transistor Q2 and the secondary winding, the secondary winding being connected to the resistor R6, and a resistor R5 located between the gate of the MOS transistor Q2 and the resistor R6.

[0012] A conduction branch is provided between the MOSFET Q2 and the primary winding of the transformer, which is connected to the high potential of the voltage input. The conduction branch includes diodes D3 and D4 connected in series. The positive terminal of diode D3 is connected to the negative terminal of diode D4, and the positive terminal of diode D4 is connected to the MOSFET Q2.

[0013] Preferably, an electrolytic capacitor EC1 and an electrolytic capacitor EC2 are connected in series between the high voltage input potential and the low voltage input potential.

[0014] The primary winding of the transformer includes a first primary winding and a second primary winding connected in series. A third MOS transistor circuit and a fourth MOS transistor circuit are connected in series to the first primary winding and the second primary winding. The third MOS transistor circuit is connected to the second primary winding. The first primary winding is connected to a high voltage input potential, and the fourth MOS transistor circuit is connected to a low voltage input potential. An RCD clamping circuit is provided between the third MOS transistor circuit and the high voltage input potential and connected in parallel across the first primary winding and the second primary winding connected in series.

[0015] Preferably, the third MOS transistor circuit includes a MOS transistor Q3 disposed between the second primary winding and the fourth MOS transistor circuit, a Zener diode ZD1 disposed between the gate of the MOS transistor Q3 and the fourth MOS transistor circuit, a bootstrap drive circuit disposed between the connection of electrolytic capacitors EC1 and EC2 and the gate of the MOS transistor Q3, and a branch disposed between the connection of electrolytic capacitors EC1 and EC2 and the connection of the first primary winding and the second primary winding, consisting of a resistor R8 and a diode D6 connected in series.

[0016] Preferably, a resistor R9 is connected in series between the fourth MOS transistor circuit and the low voltage input potential. The fourth MOS transistor circuit consists of a MOS transistor Q4 located between the third MOS transistor circuit and the resistor R9, a resistor R10 located on the gate of the MOS transistor Q4, and a second PWM chip connected to the resistor R10.

[0017] Preferably, the second PWM chip is model LN3C62DT.

[0018] Preferably, the bootstrap driving circuit consists of a bootstrap diode D7 and a bootstrap capacitor C2 connected in parallel.

[0019] Preferably, the secondary circuit includes a diode D5 connected to the secondary winding of the transformer, an output resistor connected to the diode D5, the output resistor being connected to the secondary winding of the transformer, and an electrolytic capacitor EC3 connected in parallel on the output resistor, with a voltage output at the connection point of the diode D5 and the electrolytic capacitor EC3.

[0020] The advantages of this invention are as follows: By adopting the above structure, the MOSFET uses a 900VDC withstand voltage general-purpose MOSFET series flyback circuit, which is applied to the ultra-wide voltage DC-DC switching power supply module circuit. The ordinary withstand voltage MOSFET used in this invention is generally in TO-220 package, which does not require a special gate driver chip. This can effectively solve the problem of large single MOSFET package and inability to distribute withstand voltage and heat dissipation, while greatly optimizing the overall cost of the whole machine.

[0021] Compared with traditional structures, this utility model has the following advantages:

[0022] By using a low-cost, mature, and universally applicable 900VDC voltage-rated MOSFET series flyback scheme to replace a single large-package 1700VDC voltage-rated IGBT or an expensive 1700VDC voltage-rated SiC MOSFET single-tube flyback scheme, material costs are effectively reduced, and product reliability and competitiveness are improved. Attached Figure Description

[0023] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0024] Figure 1 A schematic diagram of a traditional single-transistor flyback scheme using a common voltage-rated MOSFET as the main switch.

[0025] Figure 2 A schematic diagram of a traditional single-tube flyback scheme using an IGBT as the main switch.

[0026] Figure 3 A schematic diagram of a traditional single-transistor flyback scheme using a SiC MOSFET as the main switch.

[0027] Figure 4 This is a schematic diagram of a dual-transistor series flyback scheme using a common MOS transistor as the main switch in this utility model.

[0028] Figure 5 This utility model uses a common MOS transistor as the main switch in series with two transistors connected together, and the upper transistor is driven by a bootstrap drive circuit to drive the flyback scheme.

[0029] In the diagram: 1-Transformer primary side, 2-Transformer secondary side, 3-Secondary circuit, 4-First MOS transistor circuit, 5-Second MOS transistor circuit, 6-Three-winding isolation drive transformer, 7-First PWM chip, 8-Third MOS transistor circuit, 9-Fourth MOS transistor circuit, 10-RCD clamping circuit, 11-Second PWM chip, 12-Boot drive circuit. Detailed Implementation

[0030] The flyback circuit of this invention includes a dual-transistor series topology circuit disposed on the primary side 1 of the transformer. The primary side 1 of the transformer is positioned between the high and low voltage input potentials. The voltage output is achieved from the secondary side 2 of the transformer via the secondary circuit 3. This topology circuit consists of a first MOSFET circuit 4 and a second MOSFET circuit 5 connected in series with the windings of the primary side 1 of the transformer and also connected in series with each other. By adopting the above structure, a series flyback circuit using general-purpose MOSFETs with a withstand voltage of 900VDC is applied to ultra-wide voltage and ultra-high voltage DC-DC switching power supply module circuits. The general-purpose withstand voltage MOSFETs used in this invention are typically in TO-220 packages, eliminating the need for dedicated gate driver chips. This effectively solves the problem of large single MOSFET packages, which prevent the distribution of withstand voltage and heat dissipation, while significantly optimizing the overall cost of the device.

[0031] The first embodiment of this utility model is as follows: Figure 4 As shown, electrolytic capacitors EC1 and EC2 are connected in series between the high and low voltage input potentials. The first MOSFET circuit 4 and the second MOSFET circuit 5 are connected to the first PWM chip 7 via a three-winding isolation drive transformer 6. The primary side of the three-winding isolation drive transformer 6 is connected to the first PWM chip 7 via R1 and capacitor C1 connected in series. The secondary side of the three-winding isolation drive transformer 6 is connected to the first MOSFET circuit 4 and the second MOSFET circuit 5 via the first and second windings, respectively. The three-winding isolation drive transformer 6 converts the gate drive signal of the first PWM chip 7 into two in-phase and in-amplitude drive signals, which are then fed to the first and second windings of the secondary side 2 of the three-winding isolation drive transformer 6. These two in-phase and in-amplitude drive signals are connected to the first MOSFET circuit 4 and the second MOSFET circuit 5, respectively. The first PWM chip is model LN3C62SIC.

[0032] The aforementioned first MOSFET circuit 4 includes a MOSFET Q1 disposed between the primary winding 1 of the transformer and the high voltage input potential, and a resistor R2 disposed between the gate of the MOSFET Q1 and the primary winding 1. The primary winding 1 is connected to the primary winding 1 of the transformer. A resistor R3 is disposed between the gate of the MOSFET Q1 and the primary winding 1 of the transformer. The resistor R3 is grounded through diodes D1 and D2 connected in series. The anode of diode D1 is connected to the cathode of diode D2, and the anode of diode D2 is grounded.

[0033] The second MOSFET circuit 5 consists of a MOSFET Q2 located between the primary winding 1 of the transformer and the low-potential input voltage; a resistor R6 connected in series between the low-potential input voltage and the MOSFET Q2; a resistor R4 located between the gate of the MOSFET Q2 and the secondary winding; the secondary winding being connected to resistor R6; and a resistor R5 located between the gate of the MOSFET Q2 and resistor R6. A conduction branch is established between the MOSFET Q2 and the primary winding 1 of the transformer, connecting it to the high-potential input voltage. This conduction branch includes diodes D3 and D4 connected in series, with the anode of diode D3 connected to the cathode of diode D4, and the anode of diode D4 connected to the MOSFET Q2.

[0034] Figure 4 The diagram illustrates a dual-MOSFET series flyback circuit using ordinary MOSFETs as the main switching transistors. In this circuit, a simple three-winding isolation driver transformer 6 converts the gate drive signal of the first PWM chip 7 into two in-phase and equal-amplitude drive signals, which drive two MOSFETs designed in series. This allows the two identical series-connected MOSFETs to turn on and off simultaneously. These identical series-connected MOSFETs can be equivalent to a single switch with double the voltage rating, performing the switching function. This enables the entire circuit to withstand higher input voltages. Compared to a single MOSFET, the voltage that each MOSFET withstands is reduced by half, thereby improving the system's voltage input range and reliability. At the same time, the three-winding driver transformer serves as a signal isolation function, intersecting with a dedicated gate driver chip, which can significantly reduce costs and thus optimize the overall system cost.

[0035] The second embodiment of this utility model is as follows: Figure 5 As shown, electrolytic capacitors EC1 and EC2 are connected in series between the high and low voltage input potentials. The primary winding 1 of the transformer includes a first primary winding and a second primary winding connected in series. A third MOSFET circuit 8 and a fourth MOSFET circuit 9 are connected in series to the first and second primary windings. The third MOSFET circuit 8 is connected to the second primary winding, the first primary winding is connected to the high voltage input potential, and the fourth MOSFET circuit 9 is connected to the low voltage input potential. An RCD clamping circuit 10 is connected in parallel between the third MOSFET circuit 8 and the high voltage input potential, and is connected across the first and second primary windings connected in series. The RCD clamping circuit 10 is an existing circuit (composed of a resistor and a capacitor connected in parallel, and then a diode connected in series), which is not an innovation of this application and will not be described in detail here.

[0036] The aforementioned third MOS transistor circuit 8 includes a MOS transistor Q3 disposed between the second primary winding and the fourth MOS transistor circuit 9, a Zener diode ZD1 disposed between the gate of the MOS transistor Q3 and the fourth MOS transistor circuit 9, a bootstrap drive circuit 12 disposed between the connection of electrolytic capacitors EC1 and EC2 and the gate of the MOS transistor Q3, and a branch disposed between the connection of electrolytic capacitors EC1 and EC2 and the connection of the first primary winding and the second primary winding, consisting of a resistor R8 and a diode D6 connected in series.

[0037] A resistor R9 is connected in series between the fourth MOSFET circuit 9 and the low voltage input potential. The fourth MOSFET circuit 9 consists of MOSFET Q4 located between the third MOSFET circuit 8 and the resistor R9, a resistor R10 located on the gate of MOSFET Q4, and a second PWM chip 11 connected to the resistor R10. The model of the second PWM chip is LN3C62DT.

[0038] The bootstrap drive circuit 12 described above consists of a bootstrap diode D7 and a bootstrap capacitor C2 connected in parallel. MOSFET Q3 is driven by a bootstrap driver circuit 12. In a dual-MOSFET series flyback scheme, the bootstrap driver circuit effectively solves the problem of insufficient drive voltage for the upper MOSFET (Q3). The core function of this circuit is to ensure a stable and reliable gate drive voltage for the upper MOSFET. It also solves the problem of the upper and lower MOSFETs (Q4) not sharing a common ground. The main principle is to utilize the characteristic that the voltage across the bootstrap capacitor C2 cannot change abruptly. The discharge voltage of the bootstrap capacitor C2 is combined with the intermediate voltage (VMP) of the series connection between the electrolytic capacitor EC1 and EC2, thereby increasing the drive voltage. Under high-frequency switching, the recovery time of the bootstrap diode D7 and the capacitance need to be precisely matched to avoid drive voltage drops or current surges. This circuit only requires a moderate capacitance (usually several hundred nF). Too large a capacitance will lead to excessive charging current, while too small a capacitance will fail to maintain the drive voltage. Generally, low-ESR ceramic capacitors are used, and ultra-fast recovery diodes (such as FR107) are selected. The withstand voltage needs to be higher than the input voltage, and the forward voltage drop should be as small as possible to reduce losses. This will enable the upper MOSFET to follow the switch effectively.

[0039] The specific selection of this bootstrap capacitor C2 can be initially calculated using the following formula and then fine-tuned based on experimental data:

[0040]

[0041] Where Ciss_max is the maximum value of the input capacitance of the required driving MOSFET, Crss_mos is the maximum value of the reverse transfer capacitance of the required driving MOSFET, Vgs_min is the minimum value of the gate drive voltage of the required driving MOSFET, and VMP is the intermediate voltage value between series capacitors EC1 and EC2, which is also the voltage source for charging bootstrap capacitor C2.

[0042] Figure 5 The diagram shows a dual-transistor series bootstrap flyback scheme using ordinary MOSFETs as the main switch. This scheme is similar to... Figure 4 The topology of the solutions is the same, both using a series MOSFET voltage divider. The only difference is the optimized MOSFET gate drive method. Specifically, the upper MOSFET of the two series-connected MOSFETs is driven by a bootstrap driver circuit 12. This bootstrap driver circuit 12 eliminates the need for an isolation power supply or drive transformer, achieving floating drive solely through capacitors and diodes. This simplifies the drive architecture. The bootstrap capacitor C2 charges when the lower MOSFET (Q4) is turned on, and raises the drive potential through the capacitor voltage when the upper MOSFET is turned on, ensuring a stable gate voltage for the upper MOSFET (Q3) (e.g., a 12V drive voltage) and preventing issues caused by input voltage fluctuations. Insufficient drive caused by input voltage fluctuations requires precise matching of the recovery time of the self-driving diode and the capacitance under high-frequency switching to avoid problems such as drive voltage drop or current surge. This circuit only needs a moderate capacitance (usually several hundred nF). Too large a capacitance will lead to excessive charging current, while too small a capacitance will not be able to maintain the drive voltage. Generally, low ESR ceramic capacitors are used, and ultra-fast recovery diodes (such as FR107) are selected. The withstand voltage needs to be higher than the input voltage, and the forward voltage drop should be as small as possible to reduce losses. This can effectively complete the follower switching of the MOSFET and optimize the overall cost to the greatest extent.

[0043] The secondary circuit 3 of this utility model includes a diode D5 connected to the secondary winding of the transformer, an output resistor connected to the diode D5, the output resistor being connected to the secondary winding of the transformer, and an electrolytic capacitor EC3 connected in parallel on the output resistor. The voltage output is located at the connection point of the diode D5 and the electrolytic capacitor EC3.

[0044] Figure 1 The diagram illustrates a single conventional high-voltage MOSFET flyback topology. While simple, this topology requires a high voltage withstand capability from the primary-side main switch. This is due to leakage inductance energy spikes in the transformer, along with a secondary reflected voltage proportional to the transformer turns ratio. During the primary main switch's off-state, the actual voltage withstand capability of the primary main switch is the sum of the maximum input voltage, the leakage inductance energy spike voltage, and the reflected voltage from the secondary winding to the primary winding. Taking a 75W 24V output flyback power module with an input voltage range of 80VDC-1000VDC as an example, the maximum voltage withstand requirement for the MOSFET is confirmed as follows:

[0045] Vmos_DS=Vin_max+Vor+Vlk

[0046] Where Vin_max is the maximum input voltage, which is 1000VDC.

[0047] Vlk is the oscillating voltage spike generated by the transformer leakage inductance when the main switch is turned off. This voltage can be absorbed by an RCD snubber circuit connected in parallel to the primary winding of the transformer. Position and regulation, but voltage The voltage value is inversely proportional to the loss, which in turn affects the overall efficiency. Therefore, considering both the overall efficiency and reliability requirements, the peak voltage Vlk is generally taken as 150VDC.

[0048] The secondary reflected voltage can be calculated using the following formula:

[0049] Vor = Nps × (Vo + Vd)

[0050] Where Nps is the turns ratio of the primary and secondary coils of the transformer, and for a 24VDC output, Nps is 5; Vd is the forward voltage drop of the output rectifier diode, which is 0.7VDC, so Vor is 123.5VDC.

[0051] Vmos_DS was finally confirmed.

[0052] Vmos_DS=Vin_max+Vor+Vlk=1000+123.5+150=1273.5VDC.

[0053] From the perspective of reliability in practical applications, the voltage withstand of the MOSFET needs to be dated by 80%, and the final voltage withstand of the primary side main MOSFET needs to be around 1592VDC. This voltage withstand value has far exceeded the voltage withstand limit of a single MOSFET.

[0054] Figure 2The diagram illustrates a single-tube flyback scheme using an IGBT power transistor as the main switch. IGBTs can easily withstand voltages up to 1700VDC, such as the Mitsubishi CM600DY-24NF, but they are expensive due to their high saturation voltage drop. When used as a flyback main switch, they also experience significant conduction losses. Furthermore, IGBTs exhibit tail current, which severely impacts turn-off losses. Even when a turn-off signal is given at the gate, the IGBT cannot turn off completely in time, increasing switching losses and limiting its switching frequency. Without a dedicated gate driver chip, the IGBT's operating frequency is limited to around 20kHz. However, using a dedicated IGBT gate driver chip effectively solves the tail current problem and significantly increases the switching frequency. This is because a dedicated IGBT gate driver chip provides the necessary drive power to the IGBT under normal operating conditions and protects it under abnormal operating conditions, ensuring good isolation between high voltage and other circuits in the power electronic system. However, the disadvantages of using IGBTs as the main switch are their limited market availability, high price, and difficulty in optimizing system costs.

[0055] Figure 3 The diagram shows a single-transistor flyback scheme using a SiC MOSFET as the main switch. A SiC MOSFET, or Silicon Carbide Metal-Oxide-Semiconductor Field-Effect Transistor, is a power device based on silicon carbide (SiC) material. As a representative of third-generation semiconductors, it possesses characteristics such as a wide bandgap, high thermal conductivity, high breakdown voltage, and high electron saturation drift velocity, easily meeting the 1700VDC withstand voltage requirement. Because of its small gate capacitance, SiC MOSFETs can achieve faster switching speeds. However, the manufacturing of SiC MOSFETs currently requires more complex materials and processes, resulting in a high defect rate and high manufacturing costs. Furthermore, a dedicated gate driver chip is needed to actively clamp the Miller plateau of the PWM chip's gate drive signal, providing a negative voltage for lock-in when the switch is turned off. This can optimize and improve the reliability of SiC MOSFET applications to some extent. However, as a relatively new power device, issues such as material defects and device lifespan make SiC MOSFETs... The reliability of MOSFETs still needs further improvement. In short, factors such as high manufacturing costs, technological maturity, and reliability issues that urgently need to be addressed make the full commercialization of SiC MOSFETs a long way off.

[0056] The above description is for illustrative purposes and not for limitation. Many embodiments and applications beyond the provided examples will be apparent to those skilled in the art upon reading the above description. Therefore, the scope of this invention should not be determined by reference to the above description, but rather by reference to the appended claims and the full scope of their equivalents. For purposes of completeness, all articles and references, including patent applications and publications, are incorporated herein by reference. The omission of any aspect of the subject matter disclosed herein in the preceding claims is not intended as a waiver of that subject matter, nor should it be construed as an indication that the inventors have not considered it part of the disclosed inventive subject matter.

Claims

1. A flyback circuit, characterized in that: The flyback circuit includes a dual-transistor series topology circuit disposed on the primary side of the transformer. The primary side of the transformer is disposed between the high and low voltage input potentials. The voltage output is obtained from the secondary side of the transformer after passing through the secondary circuit. The topology circuit consists of a first MOS transistor circuit and a second MOS transistor circuit connected in series with the primary winding of the transformer and connected in series with each other.

2. The flyback circuit as described in claim 1, characterized in that: An electrolytic capacitor EC1 and an electrolytic capacitor EC2 are connected in series between the high and low voltage input potentials. The first MOS transistor circuit and the second MOS transistor circuit are respectively connected to the first PWM chip through a three-winding isolation drive transformer. The primary side of the three-winding isolation drive transformer is connected to the first PWM chip through R1 and capacitor C1 connected in series. The secondary side of the three-winding isolation drive transformer is connected to the first MOS transistor circuit and the second MOS transistor circuit through the first winding and the second winding, respectively. The three-winding isolation drive transformer converts the gate drive signal of the first PWM chip into two drive signals with the same amplitude and phase, which are then sent to the first winding and the second winding on the secondary side of the three-winding isolation drive transformer. The two drive signals with the same amplitude and phase are respectively connected to the first MOS transistor circuit and the second MOS transistor circuit. The model of the first PWM chip is LN3C62SIC.

3. The flyback circuit as described in claim 2, characterized in that: The first MOS transistor circuit includes a MOS transistor Q1 disposed between the primary winding of the transformer and the high voltage input potential, and a resistor R2 disposed between the gate of the MOS transistor Q1 and the primary winding. The primary winding is connected to the primary winding of the transformer. A resistor R3 is provided between the gate of the MOS transistor Q1 and the primary winding of the transformer. The resistor R3 is grounded through diodes D1 and D2 connected in series. The positive terminal of diode D1 is connected to the negative terminal of diode D2, and the positive terminal of diode D2 is grounded.

4. A flyback circuit as described in claim 2, characterized in that: The second MOS transistor circuit includes a MOS transistor Q2 located between the primary winding of the transformer and the low voltage input potential, a resistor R6 connected in series between the low voltage input potential and the MOS transistor Q2, a resistor R4 located between the gate of the MOS transistor Q2 and the secondary winding, the secondary winding being connected to the resistor R6, and a resistor R5 located between the gate of the MOS transistor Q2 and the resistor R6. A conduction branch is provided between the MOSFET Q2 and the primary winding of the transformer, which is connected to the high potential of the voltage input. The conduction branch includes diodes D3 and D4 connected in series. The positive terminal of diode D3 is connected to the negative terminal of diode D4, and the positive terminal of diode D4 is connected to the MOSFET Q2.

5. A flyback circuit as described in claim 1, characterized in that: An electrolytic capacitor EC1 and an electrolytic capacitor EC2 are connected in series between the high and low voltage input potentials. The primary winding of the transformer includes a first primary winding and a second primary winding connected in series. A third MOS transistor circuit and a fourth MOS transistor circuit are connected in series to the first primary winding and the second primary winding. The third MOS transistor circuit is connected to the second primary winding. The first primary winding is connected to a high voltage input potential, and the fourth MOS transistor circuit is connected to a low voltage input potential. An RCD clamping circuit is provided between the third MOS transistor circuit and the high voltage input potential and connected in parallel across the first primary winding and the second primary winding connected in series.

6. A flyback circuit as described in claim 5, characterized in that: The third MOS transistor circuit includes a MOS transistor Q3 disposed between the second primary winding and the fourth MOS transistor circuit, a Zener diode ZD1 disposed between the gate of MOS transistor Q3 and the fourth MOS transistor circuit, a bootstrap drive circuit disposed between the connection of electrolytic capacitors EC1 and EC2 and the gate of MOS transistor Q3, and a branch disposed between the connection of electrolytic capacitors EC1 and EC2 and the connection of the first primary winding and the second primary winding, consisting of a resistor R8 and a diode D6 connected in series.

7. A flyback circuit as described in claim 5, characterized in that: A resistor R9 is connected in series between the fourth MOS transistor circuit and the low voltage input potential. The fourth MOS transistor circuit consists of a MOS transistor Q4 located between the third MOS transistor circuit and the resistor R9, a resistor R10 located on the gate of the MOS transistor Q4, and a second PWM chip connected to the resistor R10.

8. A flyback circuit as described in claim 7, characterized in that: The second PWM chip is model LN3C62DT.

9. A flyback circuit as described in claim 5, characterized in that: The bootstrap driving circuit consists of a bootstrap diode D7 and a bootstrap capacitor C2 connected in parallel.

10. A flyback circuit as described in claim 1, characterized in that: The secondary circuit includes a diode D5 connected to the secondary winding of the transformer, an output resistor connected to the diode D5, the output resistor being connected to the secondary winding of the transformer, and an electrolytic capacitor EC3 connected in parallel on the output resistor. The voltage output is located at the connection point of the diode D5 and the electrolytic capacitor EC3.

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