Chip detection coaxial test fixture

Abstract

The utility model discloses a kind of chip detection coaxial test fixture, including needle plate assembly, chip to be measured, flip cover component and pressure applying component.Needle plate assembly is made of signal and power probe, ground probe, multilayer needle plate and test PCB, probe is through needle plate and is connected with test PCB.Flip cover component is rotatably connected with needle plate assembly by outer frame and is buckled and fixed, pressure applying component is realized to the even pressure of chip to be measured by knob, threaded ring and pressure block.Shield stratum design optimizes high-frequency signal transmission impedance to 50Ω, probe tip end spacing is compressed to 0.07mm, adapt to supermicro pitch chip test demand.The utility model is applicable to 20GHz high-frequency test, supports large-scale chip multipoint test, is widely used in 5G communication, automatic driving and AI chip test field, significantly improves test efficiency and precision.

Description

Technical Field

[0001] This utility model relates to the field of chip testing technology, and in particular to a coaxial testing fixture for chip testing. Background Technology

[0002] With the rapid development of IoT, 5G communication, artificial intelligence, and autonomous driving technologies, the global integrated circuit industry is facing unprecedented changes. The surge in demand for high-speed data processing and the extreme compression of chip packaging density have become two core trends. AI training chips need to support high-speed interfaces such as PCIe 5.0 / 6.0 (32GT / s to 64GT / s) and DDR5 (6400MT / s), with signal transmission loss tolerance requirements below 3%. Simultaneously, the continuous compression of circuit board space in smart devices is driving the chip ball center-to-center distance to evolve from 0.4mm to 0.25mm or even smaller, requiring contact spacing errors to be controlled within ±15μm. However, traditional testing techniques are struggling to meet these stringent requirements, especially in terms of high-frequency signal integrity and ultra-fine pitch adaptability. Ordinary probes suffer from high-frequency signal attenuation due to parasitic inductance (>0.5nH) and capacitance (>0.3pF), resulting in a bit error rate (BER) exceeding 10^-12, failing to guarantee testing accuracy and reliability.

[0003] To address these challenges, a novel solution centered around a coaxial test fixture has emerged. The coaxial probes utilize a layered shielding design, with an inner conductor (gold-plated beryllium copper) transmitting signals and an outer conductor (silver-plated stainless steel) forming a grounding shield, reducing parasitic inductance to below 0.1nH, thus supporting high-frequency testing up to 20GHz. Furthermore, the probe array employs a beveled offset layout, compressing the tip spacing to 0.07mm, adapting to the 0.35mm ball-to-ball distance testing requirements of BGA, WLCSP, and QFN packaged chips. However, existing coaxial test fixtures still have some issues in practical applications, such as ensuring signal integrity when the number of test points is large, optimizing shielding effectiveness in high-frequency testing environments, and balancing ease of operation with testing efficiency. These issues limit their widespread application in areas such as batch testing of 5G communication chips, aging verification of autonomous driving domain controllers, and AIGPU firmware burning and functional verification.

[0004] Therefore, developing a coaxial test fixture for chip testing that can adapt to a large number of test points, support high-frequency testing, and possess high operational efficiency has become a pressing technical challenge in the current chip testing field. This invention is based on this background and aims to provide an innovative coaxial test fixture for chip testing to overcome the shortcomings of existing technologies and meet the needs of modern high-performance chip testing. Utility Model Content

[0005] This invention addresses the problems of high high-frequency signal transmission loss and insufficient testing accuracy in existing technologies by proposing a coaxial testing fixture for chip testing. The fixture overcomes the technical bottlenecks of traditional testing techniques in terms of high-frequency signal integrity, micro-pitch adaptability, and support for multiple test points through optimized probe layout, shielding layer design, and modular component configuration.

[0006] To achieve the above objectives, this utility model is implemented according to the following technical solution:

[0007] This utility model includes a needle plate assembly, a chip under test, a flip cover assembly, and a pressure application assembly. One side of the needle plate assembly is rotatably connected to one side of the flip cover assembly, and the other side of the needle plate assembly is fastened to the other side of the flip cover assembly. The chip under test is detachably located between the contacts of the needle plate assembly and the flip cover assembly. The pressure application assembly is located on the flip cover assembly, and the force application end of the pressure application assembly contacts one side of the chip under test.

[0008] Furthermore, the pin plate assembly includes signal and power probes, a ground probe, a lower pin plate, a fixed guide plate, a middle pin plate, a base upper pin plate, and a test PCB. The chip under test (DUT) is located inside the fixed guide plate. The lower end of the fixed guide plate has a through hole corresponding to the contact of the DUT. The base upper pin plate is located at the lower end of the fixed guide plate, the middle pin plate is located at the lower end of the base upper pin plate, the lower pin plate is located at the lower end of the middle pin plate, and the test PCB is located at the lower end of the lower pin plate. The ground probe and the signal and power probe both penetrate the base upper pin plate, the middle pin plate, and the lower pin plate. The lower ends of the signal and power probe and the ground probe contact the contact of the test PCB, and the upper ends of the signal and power probe and the ground probe pass through the through hole of the fixed guide plate to contact the contact of the DUT. The outer edge of the base upper pin plate is connected to the flip-top assembly. The fixed guide plate is made of polyetheretherketone (PEEK) and ceramic composite material, possessing high wear resistance and a low coefficient of thermal expansion, enabling it to maintain stability under high temperature and high frequency testing conditions. The lower needle plate, intermediate needle plate, and base upper needle plate are all made of the same material to ensure consistent mechanical strength and electrical performance of the overall structure. The test PCB is connected to signal, power, and ground probes via solder joints, transmitting test signals to an external software system for real-time feedback of test results.

[0009] A gap exists between the base plate and the outer wall of the signal and power probes, forming a shielding ground layer. This shielding ground layer forms a coaxial cable transmission pattern around the signal and power probes. The impedance of the signal and power probes is controlled at 50Ω to reduce attenuation and interference of high-frequency signals. The ground probes are in direct contact with the shielding ground layer to ensure low impedance characteristics of the grounding loop; an isolation structure is provided between the power probes and the shielding ground layer to prevent power signals from interfering with the ground layer. The pin plate assembly contains 1691 signal and power probes, 864 ground probes, and 2054 ground pins to meet the needs of large-scale chip testing.

[0010] The flip-cover assembly includes an outer frame, a hand-operated cover shell, and a snap fastener. One edge of the outer frame is rotatably connected to one edge of the pin plate on the base, and the other edge of the outer frame is fastened to the other edge of the pin plate on the base via the snap fastener. The hand-operated cover shell is fixedly mounted on the outer frame, and the pressure-applying component is located in the middle of the hand-operated cover shell. The flip-cover assembly is designed to enable rapid clamping and testing of the chip under test. The outer frame and the pin plate on the base are rotatably connected via a hinge mechanism, and the snap fastener ensures the stability of the flip-cover assembly during testing. The hand-operated cover shell, as the basic component of the flip-cover assembly, is fixedly connected to other parts by bolts to ensure precise positioning of the pressure-applying component. The knob in the pressure-applying component engages with a threaded ring, converting rotational motion into vertical displacement of the pressure block, thereby applying uniform pressure to the chip under test. The pressure block is made of a polyetheretherketone (PEEK) and ceramic composite material to reduce damage to the chip surface and ensure good conductivity.

[0011] The pressure application assembly includes a knob, a threaded ring, a pressure block, and a handle. The knob is fixedly connected to the upper end of the threaded ring, the pressure block is slidably connected to the hand-test cover, the threaded ring is threadedly connected to the hand-test cover, the lower end of the threaded ring contacts the upper end of the pressure block, and the lower end of the pressure block can contact the upper end of the chip under test. The handle is fixedly disposed outside the knob. The pitch and thread depth of the threaded ring are precisely calculated to ensure that the displacement of the pressure block is linearly related to the rotation angle of the knob. The handle facilitates the operator in applying torque, while the limiting structure prevents overpressure from damaging the chip. The lower end face of the pressure block has a micro-convex structure, which forms a uniform pressure distribution when in contact with the upper end face of the chip under test, avoiding local stress concentration.

[0012] The tip spacing of the signal and power probes is compressed to 0.07mm through a beveled offset layout design to accommodate the 0.35mm ball-to-ball distance testing requirements of BGA, WLCSP, and QFN packaged chips. The outer walls of the signal and power probes are gold-plated to improve conductivity and corrosion resistance; the outer wall of the ground probe is silver-plated to enhance shielding. The elastic modulus and yield strength of the probes are optimized to maintain stable contact performance even under high-frequency vibration environments.

[0013] The usage process of this utility model is as follows:

[0014] S1, Place the chip under test into the fixed guide plate, and use the through holes of the fixed guide plate to limit and position the chip under test;

[0015] S2, snap on the flip cover assembly, rotate the knob clockwise, the threaded ring drives the pressure block to descend vertically, pressing the chip under test to the test state height;

[0016] S3, the signal and power probes and the ground probe respectively contact the contacts of the chip under test, and the test signal is transmitted to the external software system through the test PCB to output the test results;

[0017] S4, rotate the knob counterclockwise, the threaded ring drives the pressure block to rise, press the buckle to open the flip cover assembly, and take out the chip that has completed testing.

[0018] The beneficial effects of this utility model are:

[0019] This invention is a coaxial test fixture for chip testing. Compared with existing technologies, this invention, through the design of a shielded ground layer, precisely controls the signal transmission impedance to 50Ω, significantly reducing high-frequency signal attenuation and interference, making it suitable for high-frequency testing scenarios up to 20GHz. The inclined offset layout design allows the tip spacing of the probe array to be compressed to 0.07mm, meeting the testing requirements of ultra-fine pitch chips. The configuration of numerous signal, power, and ground probes enables the fixture to adapt to large-scale chip testing with a large number of test points. The modular design of the flip-top assembly and pressure application assembly simplifies the operation process and improves testing efficiency. Furthermore, this invention has wide applications in various scenarios such as batch testing of 5G communication chips, aging verification of autonomous driving domain controllers, and AIGPU firmware burning and functional verification, demonstrating high practical value and market potential. Attached Figure Description

[0020] Figure 1 This is an exploded structural diagram of the present invention;

[0021] Figure 2 This is a partially enlarged cross-sectional view of the needle plate assembly of this utility model;

[0022] Figure 3This is a schematic diagram of the overall structure of this utility model.

[0023] 1. Signal and power probes; 2. Grounding probe; 3. Lower probe plate; 4. Fixed guide plate; 5. Middle probe plate; 6. Upper probe plate on base; 7. Test PCB; 8. Outer frame; 9. Hand test cover; 10. Knob; 11. Threaded ring; 12. Pressure block; 13. Buckle; 14. Handle; 15. Chip under test. Detailed Implementation

[0024] The present invention will be further described below with reference to the accompanying drawings and specific embodiments. The illustrative embodiments and descriptions of the present invention are used to explain the present invention, but are not intended to limit the present invention.

[0025] This utility model provides a coaxial testing fixture for chip detection, the structure and function of which are described through... Figures 1 to 3 The accompanying drawings provide a detailed description. The specific embodiments of this utility model are described in detail below with reference to the accompanying drawings and specific component reference numerals.

[0026] like Figure 1 As shown, the coaxial test fixture for chip testing of this utility model includes a pin plate assembly, a chip under test (15), a flip-cover assembly, and a pressure application assembly. The pin plate assembly is the core part of the entire fixture, consisting of signal and power probes 1, a ground probe 2, a lower pin plate 3, a fixed guide plate 4, a middle pin plate 5, an upper pin plate on the base 6, and a test PCB 7. The flip-cover assembly includes an outer frame 8, a hand-held cover 9, and a latch 13. The pressure application assembly consists of a knob 10, a threaded ring 11, a pressure block 12, and a handle 14. These components, through precise design and assembly, achieve the function of high-frequency signal testing and exhibit excellent performance in practical applications.

[0027] The structural design of the pin plate assembly is particularly critical. The fixed guide plate 4 is made of polyetheretherketone (PEEK) and ceramic composite material, possessing high wear resistance and a low coefficient of thermal expansion, enabling it to maintain stability under high temperature and high frequency testing conditions. The fixed guide plate 4 has through holes in its center, each corresponding to a contact of the chip under test (DUT) 15, ensuring accurate placement and positioning of the DUT 15. The upper pin plate 6 is located at the lower end of the fixed guide plate 4, with the middle pin plate 5 and lower pin plate 3 stacked sequentially below it, and the test PCB 7 located at the bottom. Signal and power probes 1 and ground probe 2 pass through the upper pin plate 6, middle pin plate 5, and lower pin plate 3, with their lower ends contacting the contacts of the test PCB 7 and their upper ends passing through the through holes in the fixed guide plate 4 to contact the contacts of the DUT 15. This design allows the probes to stably transmit signals and establish a connection with the test PCB 7. Furthermore, a gap is provided between the base plate 6 and the outer wall of the signal and power probes 1, forming a shielding ground layer, which surrounds the signal and power probes 1 to form a coaxial cable transmission mode. The design of the shielding ground layer significantly reduces the attenuation and interference of high-frequency signals, allowing the signal transmission impedance to be precisely controlled at 50Ω, suitable for high-frequency testing scenarios up to 20GHz.

[0028] The flip-top assembly is designed to enable rapid clamping and testing of the chip under test (DUT) 15. One edge of the outer frame 8 is rotatably connected to one edge of the pin plate 6 on the base via a hinge mechanism, while the other side is fastened by a snap-fit ​​13. The hand-operated cover 9, as the basic component of the flip-top assembly, is fixedly connected to other parts by bolts to ensure precise positioning of the pressure application assembly. The pressure application assembly is located in the middle of the hand-operated cover 9. The knob 10 in the pressure application assembly is fixedly connected to the upper end of the threaded ring 11, which is threadedly connected to the hand-operated cover 9. The lower end of the threaded ring 11 contacts the upper end of the pressure block 12, and the lower end of the pressure block 12 contacts the upper end of the DUT 15. The handle 14 is fixedly mounted outside the knob 10 for easy torque application by the operator. The pitch and thread depth of the threaded ring 11 are precisely calculated to ensure a linear relationship between the displacement of the pressure block 12 and the rotation angle of the knob 10. The pressure block 12 is made of a composite material of polyetheretherketone and ceramic, which reduces damage to the chip surface and ensures good conductivity. The lower end face of the pressure block 12 has a micro-protrusion structure, which forms a uniform pressure distribution when in contact with the upper end face of the chip under test 15, avoiding local stress concentration.

[0029] The tip spacing of signal and power probe 1 is compressed to 0.07mm through a beveled offset layout design to meet the 0.35mm ball-to-ball distance testing requirements of BGA, WLCSP, and QFN packaged chips. The outer wall of signal and power probe 1 is gold-plated to improve conductivity and corrosion resistance; the outer wall of ground probe 2 is silver-plated to enhance shielding. The elastic modulus and yield strength of the probes are optimized to maintain stable contact performance even under high-frequency vibration environments. The pin board assembly contains 1691 signal and power probes 1, 864 ground probes 2, and 2054 ground pins to meet the needs of large-scale chip testing.

[0030] The working principle of this utility model is as follows:

[0031] S1, the chip to be tested 15 is placed into the fixed guide plate 4, and the through hole of the fixed guide plate 4 limits and positions the chip to be tested 15.

[0032] S2, fasten the flip cover assembly, rotate the knob 10 clockwise, the threaded ring 11 drives the pressure block 12 to descend vertically, pressing the chip under test 15 to the test state height;

[0033] S3, signal and power probe 1 and ground probe 2 respectively contact the contacts of the chip under test 15, the test signal is transmitted to the external software system through the test PCB7, and the test result is output;

[0034] S4. Rotate knob 10 counterclockwise. The threaded ring 11 raises the pressure block 12, and the latch 13 opens the flip cover assembly, allowing the tested chip to be removed. The above steps ensure the stability and accuracy of the chip under test 15 throughout the entire testing process.

[0035] This invention demonstrates significant technical advantages in practical applications. The shielding layer design not only reduces high-frequency signal attenuation and interference but also significantly improves signal integrity, making it suitable for high-frequency testing scenarios up to 20GHz. The angled offset layout design allows the probe array tip spacing to be compressed to 0.07mm, meeting the testing requirements of ultra-fine pitch chips. The configuration of numerous signal and power probes 1 and ground probes 2 enables the fixture to adapt to large-scale chip testing with numerous test points. The modular design of the flip-top assembly and pressure application assembly simplifies the operation process and improves testing efficiency. Furthermore, this invention is widely applicable to various scenarios such as batch testing of 5G communication chips, aging verification of autonomous driving domain controllers, and firmware burning and functional verification of AI GPUs, possessing high practical value and market prospects.

[0036] In batch testing of 5G communication chips, this invention significantly improves testing efficiency and accuracy through its high-frequency testing capabilities and multi-test-point support. In the aging verification of autonomous driving domain controllers, the fixture maintains stable performance during long-term operation, ensuring the reliability of test results. In AIGPU firmware burning and functional verification, the fixture's high precision and stability provide strong support for the functional verification of complex chips. These application scenarios fully demonstrate the technical advantages and wide applicability of this invention.

[0037] In summary, this invention, through the design of the shielding ground layer, the inclined offset layout, the modular component configuration, and the precision manufacturing process, solves the technical bottlenecks of traditional testing technologies in terms of high-frequency signal integrity, micro-pitch adaptability, and multi-test-point support. Its reasonable structural design, ease of operation, and superior performance can meet the diverse needs of modern chip testing, providing important technical support for the development of the integrated circuit industry.

[0038] The foregoing has shown and described the basic principles, main features, and advantages of this utility model. Those skilled in the art should understand that this utility model is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of this utility model. Various changes and modifications can be made to this utility model without departing from its spirit and scope, and all such changes and modifications fall within the scope of the claimed utility model. The scope of protection of this utility model is defined by the appended claims and their equivalents.

Claims

1. A coaxial testing fixture for chip detection, characterized in that: The device includes a needle plate assembly, a chip under test (15), a flip cover assembly, and a pressure application assembly. One side of the needle plate assembly is rotatably connected to one side of the flip cover assembly, and the other side of the needle plate assembly is fastened to the other side of the flip cover assembly. The chip under test (15) is detachably located between the contacts of the needle plate assembly and the flip cover assembly. The pressure application assembly is located on the flip cover assembly, and the force application end of the pressure application assembly contacts one side of the chip under test (15).

2. The coaxial testing fixture for chip testing according to claim 1, characterized in that: The pin plate assembly includes signal and power probes (1), ground probes (2), a lower pin plate (3), a fixed guide plate (4), a middle pin plate (5), a base upper pin plate (6), and a test PCB (7). The chip under test (15) is located inside the fixed guide plate (4). The lower end of the fixed guide plate (4) is provided with a through hole corresponding to the contact of the chip under test (15). The base upper pin plate (6) is located at the lower end of the fixed guide plate (4). The middle pin plate (5) is located at the lower end of the base upper pin plate (6). The lower pin plate (3) is located at the middle pin plate (5). The test PCB (7) is located at the lower end of the lower pin plate (3). The ground probe (2) and the signal and power probe (1) pass through the upper pin plate (6), the middle pin plate (5), and the lower pin plate (3) of the base. The lower ends of the signal and power probe (1) and the ground probe (2) are in contact with the contacts of the test PCB (7). The upper ends of the signal and power probe (1) and the ground probe (2) pass through the through hole of the fixed guide plate (4) and can contact the contacts of the chip under test (15). The outer edge of the upper pin plate (6) of the base is connected to the flip cover assembly.

3. The coaxial test fixture for chip testing according to claim 2, characterized in that: There is a gap between the base plate (6) and the outer wall of the signal and power probe (1), and the gap forms a shielding ground layer.

4. The coaxial test fixture for chip testing according to claim 2, characterized in that: The flip-top assembly includes an outer frame (8), a hand-operated cover shell (9), and a buckle (13). One side edge of the outer frame (8) is rotatably connected to one side edge of the needle plate (6) on the base. The other side edge of the outer frame (8) and the other side edge of the needle plate (6) on the base are fastened together by the buckle (13). The hand-operated cover shell (9) is fixedly mounted on the outer frame (8), and the pressure-applying component is disposed in the middle of the hand-operated cover shell (9).

5. The coaxial test fixture for chip testing according to claim 4, characterized in that: The pressure application assembly includes a knob (10), a threaded ring (11), a pressure block (12), and a handle (14). The knob (10) is fixedly connected to the upper end of the threaded ring (11), the pressure block (12) is slidably connected to the hand-test cover (9), the threaded ring (11) is threadedly connected to the hand-test cover (9), the lower end of the threaded ring (11) contacts the upper end of the pressure block (12), the lower end of the pressure block (12) can contact the upper end of the chip under test (15), and the handle (14) is fixedly disposed outside the knob (10).

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