Chip test socket

Abstract

The utility model relates to a chip test socket, including casing and locking cover, be equipped with first radio frequency adapter and second radio frequency adapter on the lateral wall of casing, still be equipped with first transmission zone and second transmission zone in the casing, wherein first transmission zone is connected with first radio frequency adapter, second transmission zone is connected with second radio frequency adapter connector, locking cover can compress the chip to be tested and make its bottom pad contact and lead through with first transmission zone and second transmission zone, first transmission zone and second transmission zone are located between upper elastic rubber plate and lower elastic rubber plate, the utility model discloses through the transmission zone of embedding inside elastic rubber plate and directly contact with chip pad, can reduce the residual stump effect of contact part, has improved the performance matching, and the arrangement of transmission zone can be according to the space maneuvering adjustment, is applicable to the chip of small node spacing.

Description

Technical Field

[0001] This utility model belongs to the field of chip testing technology, and specifically relates to a chip testing socket. Background Technology

[0002] QFN (Quad Flat No-Leader Package) is a no-lead package that is square or rectangular in shape. There is a large exposed pad at the center of the bottom of the package for heat conduction, and conductive pads around the perimeter of the package for electrical connection.

[0003] Due to the pad characteristics of QFN (Quad Flat No-Leader) chips, existing QFN test fixtures with spring-loaded contact mechanisms can only meet the needs of conventional lower-frequency QFN chips (applicable to RF frequencies ≤20GHz). For higher-frequency QFN chips, residual contact effects are significant. Furthermore, for chips with small spacing, smaller spring probe diameters are required, resulting in relatively higher processing and costs.

[0004] Invention application CN111965524A discloses a chip testing device. This device uses RF signal lines and RF connectors on the surface of an RF circuit board. The connectors are electrically connected to the chip under test (DUT), and the signal lines are connected via RF connectors, leading to a testing instrument to complete the electrical connection. However, this method uses RF connectors to contact the chip pads. The connectors are made of rigid copper alloy, which, on the one hand, leads to direct, hard contact with the chip pads, easily causing poor contact and unstable signal transmission; on the other hand, to ensure reliable contact, the connector contacts are designed with different shapes, which can also easily damage the chip pads. Summary of the Invention

[0005] The purpose of this invention is to provide a novel chip test socket structure that simplifies the structure of the chip test socket and ensures stable elastic contact between the chip pads by embedding the transfer device within an elastic rubber plate and making direct elastic contact with the chip pads via the transfer belt.

[0006] The purpose of this utility model and the technical problem it solves are achieved by the following technical solution. A chip test socket according to this utility model includes a housing 1 and a locking cover 2. A first RF adapter 3 and a second RF adapter 4 are provided on the side wall of the housing 1. A first transmission belt 5 and a second transmission belt 6 are also provided inside the housing 1. The first transmission belt 5 is connected to the first RF adapter 3, and the second transmission belt 6 is connected to the second RF adapter 4. The locking cover 2 can press the chip under test 7 so that its bottom pads make contact and conduction with the first transmission belt 5 and the second transmission belt 6. The first transmission belt 5 and the second transmission belt 6 are located between an upper elastic rubber plate 9 and a lower elastic rubber plate 8.

[0007] The purpose of this utility model and the technical problems to be solved can be further achieved by the following technical measures.

[0008] The aforementioned chip test socket also includes a chip limiting frame 10 inside the housing 1. The chip limiting frame 10 presses against the upper elastic rubber plate 9 and has a positioning groove 101 for positioning the chip 7 to be tested.

[0009] The aforementioned chip test socket has its upper surfaces of the first transmission belt 5 and the second transmission belt 6, located below the positioning groove 101, exposed.

[0010] The aforementioned chip test socket also includes a first notch 102 on the chip limiting frame 10 for avoiding the connection position of the first transmission belt 5 and the first RF adapter 3, and a second notch 103 for avoiding the connection position of the second transmission belt 6 and the second RF adapter 4 connector.

[0011] The aforementioned chip test socket includes a central strip 11 and a ground strip 12 spaced apart on both sides of the central strip 11. The central strip 11 is connected to the tail pin of the RF adapter, and the ground strip is connected to the inner wall of the housing 1.

[0012] The aforementioned chip test socket has a conductive adhesive 13 applied between the grounding strip 12 and the housing 1.

[0013] In the aforementioned chip test socket, the first transmission belt 5 and the second transmission belt 6 are located on the same lower elastic rubber plate 8.

[0014] In the aforementioned chip test socket, the first transmission band 5 and the second transmission band 6 are symmetrically distributed on both sides of the housing 1. The first transmission band 5 and the second transmission band 6 extend in the same direction and are spaced apart.

[0015] In the aforementioned chip test socket, the tail pins of the RF adapter are directly connected to the transmission belt in opposite directions along the vertical axis or are soldered and fixed.

[0016] In the aforementioned chip test socket, both the first transmission band 5 and the second transmission band 6 are strip-shaped copper foils.

[0017] Compared with the prior art, this utility model has significant advantages and beneficial effects. Through the above technical solution, this utility model achieves considerable technological advancement and practicality, and has broad industrial application value. It possesses at least the following advantages:

[0018] This invention uses a conveyor belt embedded inside an elastic rubber plate to directly contact the chip pads, which can reduce the residual pile effect at the contact point and improve performance matching. At the same time, the arrangement of the conveyor belt can be dynamically adjusted according to space, making it suitable for chips with small node spacing.

[0019] This invention simplifies the structure, shortens the link length, reduces link switching losses, and improves performance by having the transmission belt embedded in the elastic rubber plate directly contact the chip pads.

[0020] This invention utilizes the elasticity of the elastic rubber sheet itself, and uses a conveyor belt embedded between two layers of elastic rubber sheets to contact the chip pads. During the process of applying pressure to the chip, the elasticity of the elastic rubber sheet replaces the function of existing elastic components, ensuring effective contact between the chip pads and the copper foil, and simplifying the structure. Attached Figure Description

[0021] Figure 1 This is a schematic diagram of the chip test socket locking cover of this utility model in the open state.

[0022] Figure 2 This is a schematic diagram of the closed state of the locking cover of the chip test socket of this utility model;

[0023] Figure 3 This is a top view of the chip test socket of this utility model after the locking cover has been removed;

[0024] Figure 4 A partial cross-sectional view of the chip test socket of this utility model with the locking cover removed;

[0025] Figure 5 for Figure 4 Enlarged view of Part I;

[0026] Figure 6 for Figure 4 Enlarged view of Part II;

[0027] Figure 7 This is a partial schematic diagram of the chip test socket of this utility model;

[0028] Figure 8 This is a schematic diagram of the transmission band distribution of the chip test socket of this utility model.

[0029] [Explanation of Key Component Symbols]

[0030] 1: Shell

[0031] 2: Locking the cover

[0032] 21: Buckle

[0033] 22: Screw

[0034] 3: First RF adapter

[0035] 4: Second RF adapter

[0036] 5: First Conveyor Belt

[0037] 6: Second Conveyor Belt

[0038] 7: Chip under test

[0039] 8: Lower layer elastic rubber sheet

[0040] 9: Upper elastic rubber sheet

[0041] 10: Chip limiting frame Detailed Implementation

[0042] To further illustrate the technical means and effects adopted by this utility model in order to achieve the intended purpose of the invention, the following detailed description of the specific implementation method, structure, features and effects of the chip test socket proposed according to this utility model is provided in conjunction with the accompanying drawings and preferred embodiments.

[0043] Please see Figure 1-8 This is a schematic diagram of the various parts of the chip test socket of this utility model. The chip test socket includes a housing 1 and a locking cover 2. The housing 1 has a first RF converter 3 and a second RF converter 4 on its side wall. The housing 1 also has a first transmission belt 5 and a second transmission belt 6 inside. The first RF converter 3 is connected to the first transmission belt 5, and the second RF converter 4 is connected to the second transmission belt 6. The locking cover 2 is locked onto the housing 1 and presses the chip under test 7, so that the bottom pad of the chip under test 7 makes contact and conduction with the first transmission belt 5 and the second transmission belt 6. In this embodiment, the first transmission belt 5 and the second transmission belt 6 are both strip copper foils, but it is not limited to this.

[0044] Both the first conveyor belt 5 and the second conveyor belt 6 have a lower elastic adhesive plate 8 below them and an upper elastic adhesive plate 9 above them. That is, both the first conveyor belt 5 and the second conveyor belt 6 are located between the upper elastic adhesive plate 9 and the lower elastic adhesive plate 8, and can float up and down under the elastic deformation of the upper elastic adhesive plate 9 and the lower elastic adhesive plate 8. The upper end face of the first conveyor belt 5 and the second conveyor belt 6 at the contact point with the chip under test 5 is exposed, and the upper elastic adhesive plate 9 has a notch at this contact point. Preferably, the exposed area of ​​the upper end face of the first conveyor belt 5 and the second conveyor belt 6 at the contact point with the chip under test 5 is larger than the area of ​​the contact area with the chip under test 5.

[0045] The upper end of the first transmission belt 5 near the first RF adapter 3 is not covered by the upper elastic rubber plate 9 and is exposed, making contact with the pin 31 at the tail of the first RF adapter 3. In this embodiment, the tail end face of the first RF adapter 3 is stopped and limited by the stepped surface inside the housing 1. The lower elastic rubber plate 8 located inside the housing 1 extends to the stepped surface at this end and contacts the tail end face of the first RF adapter 3, providing elastic support for the contact between the first transmission belt 5 and the pin 31, so that there is a stable and reliable elastic contact force between the two. The connection between the second transmission belt 6 and the second RF adapter 4, and the distribution of the lower elastic rubber plate 8 at the second RF adapter 4 are the same as the connection between the first transmission belt 5 and the first RF adapter 3, and the distribution of the lower elastic rubber plate 8 at the first device adapter 4, and will not be described in detail.

[0046] In this embodiment, the first RF adapter 3 and the second RF adapter 4 are symmetrically distributed on both sides of the housing 1. The first transmission band 5 and the second transmission band 6 are located between the first RF adapter 3 and the second RF adapter 4, and their extension directions are the same. The chip under test 7 is located between the first transmission band 5 and the second transmission band 6, and its two ends are respectively pressed on the exposed upper surfaces of the first transmission band 5 and the second transmission band 6 to achieve contact conduction.

[0047] In other embodiments of this utility model, the first radio frequency adapter 3 and the second radio frequency adapter 4 are asymmetrically distributed around the housing 1. In this case, the first transmission belt 5 and the second transmission belt 6 extend in different directions and there is an angle between them.

[0048] In this embodiment, the lower elastic rubber plate 8 below the first transmission belt 5 and the second transmission belt 6 is an integral structure, that is, the first transmission belt 5 and the second transmission belt 6 are located on the same lower elastic rubber plate 8, which extends from one end of the first radio frequency adapter 3 to one end of the second radio frequency adapter 4.

[0049] In this embodiment, the pins of the RF adapter are in direct contact with the transmission belt, but in other embodiments, the pins and the transmission belt can also be soldered together.

[0050] The housing 1 also includes a chip positioning frame 10 for positioning the chip under test 7. This chip positioning frame 10 presses against the upper elastic rubber plate 9 and is positioned by a positioning groove 101 on it. The portions of the first transmission belt 5 and the second transmission belt 6 that are in contact with the chip under test 7 are both located within the positioning groove 101. In this embodiment, extension grooves 1011 are formed on the four inner walls of the positioning groove 101, extending away from the chip under test 7. The ends of the first transmission belt 5 and the second transmission belt 6 are located within the corresponding extension grooves 1011. The upper surfaces of the portions of the first transmission belt 5 and the second transmission belt 6 located within the extension grooves 1011 are covered by the upper elastic rubber plate 9, while the upper surfaces of the portions located within the positioning grooves 101 are exposed. The extension grooves 1011 of this invention facilitate the removal of the chip under test 7 and prevent damage during removal.

[0051] The chip limiting frame 10 is provided with a first notch 102 for avoiding the docking position of the first transmission belt 5 and the first RF adapter 3, and a second notch 103 for avoiding the docking position of the second transmission belt 6 and the second RF adapter 4, so that the docking position of the transmission belt and the corresponding RF adapter is exposed, which facilitates the installation of the RF adapter and the operation of the connector between the RF adapter and the transmission belt.

[0052] Both the first transmission band 5 and the second transmission band 6 include a central band 11 and grounding bands 12 spaced apart on both sides of the central band 11. In this embodiment, both the central band 11 and the grounding bands 12 are strip-shaped copper foils. The tail pin of the RF adapter presses onto the central band 11 of the corresponding transmission band, making contact and conducting with the central band 11. The grounding bands 12 on both sides of the central band make contact and conducting with the inner wall of the housing 1. The housing 1 is a conductive housing. Preferably, conductive adhesive 13 is applied between the grounding bands 12 and the housing 1, and the conductive adhesive 13 achieves contact and conduction between the two.

[0053] The width, thickness, and length of the copper foil of this utility model can be adjusted according to the spatial arrangement, and it needs to be calculated to conform to the standard 50Ω transmission line.

[0054] In this embodiment, the locking cover 2 includes a fixing part 24 fixed to a rectangular housing 1 by screws and a main body part 25 rotatably connected to the fixing part 24. The fixing part 24 is fixed to the front end face of the housing 1, and the main body part 25 is locked to the housing by a snap fastener 21, thus sealing the housing. The main body part 25 is also provided with a rotating knob 23 for driving its inner pressing structure to press the chip under test 7. When the rotating knob 23 is rotated, the pressing structure moves downward, applying pressure and pressing the chip under test 7. In other embodiments of this utility model, the chip under test 7 can be directly pressed by the protrusion on the inner side of the main body part 25 when the main body part 25 is locked to the housing 1.

[0055] During testing, the locking cover 2 of this utility model is opened, the chip under test 7 is placed in the positioning groove 101 of the chip limiting frame 10, and then the locking knob on the locking cover 2 is rotated to apply pressure to the chip limiting frame 10 and the chip under test 7 to lock them. The signal is transmitted to the RF adapter through the copper foil, and then the RF adapter is connected to the testing instrument for testing to achieve effective signal transmission.

[0056] This invention utilizes the elasticity of a flexible rubber sheet, applying vertical pressure through a locking cap. Grounding and signals are transmitted to the grounding copper foil via the chip pads. The radio frequency (RF) signal originates from the contact between the chip's pads and the strip copper foil, and is then transmitted from the strip copper foil to the RF adapter pins. The RF adapter pins extend to the standard interface of the RF adapter and are then connected to the instrument. The RF signal is divided into "IN" and "OUT" signals, with both signal paths being identical, forming an RF signal transmission loop.

[0057] The chip under test 7 of this utility model is a QFN (square flat no-lead package) type chip. The chip test socket reduces the residual stub effect of the chip pad to chip test socket path, simplifies the structure, improves signal matching, and improves voltage standing wave ratio.

[0058] The above description is merely a preferred embodiment of the present utility model and is not intended to limit the present utility model in any way. Although the present utility model has been disclosed above with reference to a preferred embodiment, it is not intended to limit the present utility model. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the present utility model. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of the present utility model without departing from the scope of the present utility model shall still fall within the scope of the present utility model.

Claims

1. A chip test socket, comprising a housing and a locking cover, wherein a first RF adapter and a second RF adapter are disposed on the side wall of the housing, characterized in that: The housing also includes a first transmission belt and a second transmission belt. The first transmission belt is connected to the first RF adapter, and the second transmission belt is connected to the second RF adapter connector. The locking cover can press the chip under test so that its bottom pads make contact and conduction with the first and second transmission belts. The first and second transmission belts are located between the upper elastic rubber plate and the lower elastic rubber plate.

2. The chip test socket according to claim 1, characterized in that: The housing also includes a chip positioning frame, which is pressed against the upper elastic rubber plate and has a positioning groove for positioning the chip to be tested.

3. The chip test socket according to claim 2, characterized in that: The upper surfaces of the first and second transmission belts located below the positioning groove are both exposed.

4. The chip test socket according to claim 2, characterized in that: The chip limiting frame is also provided with a first notch for avoiding the connection position of the first transmission belt and the first RF adapter, and a second notch for avoiding the connection position of the second transmission belt and the second RF adapter connector.

5. The chip test socket according to claim 4, characterized in that: Both the first and second transmission bands include a center band and ground bands spaced apart on both sides of the center band. The center band is connected to the tail pin of the RF adapter, and the ground band is connected to the inner wall of the housing.

6. The chip test socket according to claim 5, characterized in that: Conductive adhesive is applied between the grounding strip and the casing.

7. The chip test socket according to any one of claims 1-6, characterized in that: The first and second transmission belts are located on the same lower elastic rubber sheet.

8. The chip test socket according to claim 7, characterized in that: The first and second transmission belts are symmetrically distributed on both sides of the shell, extending in the same direction and spaced apart.

9. The chip test socket according to claim 8, characterized in that: The RF adapter's tail pins are directly connected to the transmission belt in the vertical direction or welded together.

10. The chip test socket according to claim 2, characterized in that: On the two opposing inner walls of the positioning groove, there are extension grooves that extend in the direction away from the chip under test.

11. The chip test socket according to any one of claims 1-6 and 8-10, characterized in that: Both the first and second transmission belts are strip-shaped copper foils.

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