Display panel and display device
By setting a second region in the TFT-LCD panel where the organic layer thickness gradually decreases and increasing the trace spacing, the problem of trace breakage was solved, production yield and performance were improved, and material and factory costs were reduced.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- HEFEI XINSHENG OPTOELECTRONICS TECH CO LTD
- Filing Date
- 2025-07-25
- Publication Date
- 2026-07-14
Smart Images
Figure CN224501081U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of display technology, and more specifically, to a display panel and a display device. Background Technology
[0002] With the continuous advancement of display technology, flat panel displays, due to their lightweight and thin characteristics, have become the mainstream application. Among various flat panel displays, thin-film transistor liquid crystal displays (TFT-LCDs) are particularly widely used.
[0003] With the widespread application of TFT-LCDs in mobile phones, laptops, televisions, monitors, and industrial displays, their development has been rapid in recent years, attracting increasing attention. Therefore, how to further improve the performance of TFT-LCDs is a pressing technical problem that needs to be solved. Utility Model Content
[0004] In view of the above problems, this application provides a display panel and a display device, wherein the traces in the trace layer of the display panel will not be broken, which can improve the yield and performance of the display panel.
[0005] In a first aspect, a display panel is provided, comprising: a display area and a non-display area disposed on at least one side of a substrate layer, the display area and the non-display area being disposed sequentially along a first direction; in the first direction, the non-display area includes a first region, a second region and a dicing region disposed sequentially, the first region being located on the side of the non-display area closer to the display area; the first region and the second region include an organic layer and a wiring layer disposed along a second direction, the dicing region including the wiring layer, the second direction being perpendicular to the first direction; in the second direction, the size of the organic layer in the second region is smaller than the size of the organic layer in the first region.
[0006] In conjunction with the first aspect, in some implementations of the first aspect, in the second direction, the size ratio of the organic layer in the second region to the size of the organic layer in the first region is 0.4-0.6.
[0007] In conjunction with the first aspect, in some implementations of the first aspect, in the second direction, the size ratio of the organic layer in the second region to the size of the organic layer in the first region is 0.5.
[0008] In conjunction with the first aspect, in some implementations of the first aspect, the size of the organic layer in the second region is 1 μm-3 μm in the first direction.
[0009] In conjunction with the first aspect, in some implementations of the first aspect, the routing layer includes multiple routing lines; in the third direction, the spacing between adjacent routing lines in the cutting region is greater than the spacing between adjacent routing lines in the first region, and the third direction is perpendicular to the first direction and the second direction.
[0010] In conjunction with the first aspect, in some implementations of the first aspect, the spacing between adjacent traces in the second region is greater than the spacing between adjacent traces in the first region.
[0011] In conjunction with the first aspect, in some implementations of the first aspect, in the third direction, the spacing between adjacent traces in the cutting region and the second region is 80μm-110μm.
[0012] In a second aspect, a display device is provided, comprising: a housing forming a receiving cavity; and a display panel as described in any embodiment of the first aspect of this application, the display panel being received in the receiving cavity to provide display content to the display device. Attached Figure Description
[0013] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments of this application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on the drawings without creative effort.
[0014] Figure 1 This is a partial structural schematic diagram of a display panel according to one embodiment of this application;
[0015] Figure 2 for Figure 1 Cross-sectional view along line AA';
[0016] Figure 3 This is a schematic diagram of the structure of a display panel according to an embodiment of a related technology.
[0017] Figure 4 This is a partial structural diagram of a display panel according to another embodiment of this application.
[0018] Figure label:
[0019] Display panel-10, substrate layer-110, display area-100, non-display area-200, first area-210, second area-220, diced area-230, organic layer-120, wiring layer-130, wiring-131;
[0020] First direction - X, second direction - Y, third direction - Z. Detailed Implementation
[0021] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.
[0022] The "range" disclosed in this application is defined by a lower limit and an upper limit. A given range is defined by selecting a lower limit and an upper limit, which define the boundaries of a specific range. Ranges defined in this way include endpoint values and can be arbitrarily combined; that is, any lower limit can be combined with any upper limit to form a range. For example, if ranges of 60-120 and 80-110 are listed for a specific parameter, it is also expected that ranges of 60-110 and 80-120 are also included. Furthermore, if the minimum range values are listed as 1 and 2, and the maximum range values are listed as 3, 4, and 5, then the following ranges are all expected: 1-3, 1-4, 1-5, 2-3, 2-4, and 2-5. In this application, unless otherwise stated, the numerical range "ab" represents a shortened representation of any combination of real numbers between a and b, where a and b are real numbers. For example, the numerical range "0-5" means that all real numbers between "0-5" have been listed herein; "0-5" is simply a shortened representation of these numerical combinations. Furthermore, when a parameter is described as an integer greater than or equal to 2, it is equivalent to disclosing that the parameter is, for example, an integer such as 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, etc.
[0023] Unless otherwise specified, all embodiments and optional embodiments of this application can be combined with each other to form new technical solutions.
[0024] Unless otherwise specified, all technical features and optional technical features of this application may be combined to form new technical solutions.
[0025] The terminology used in the following embodiments is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. As used in the specification and appended claims of this application, the singular expressions “a,” “an,” “the,” “the,” “the,” and “this” are intended to also include expressions such as “one or more,” unless the context clearly indicates otherwise. It should also be understood that in the following embodiments of this application, “at least one” and “one or more” refer to one, two, or more than two. The term “and / or” is used to describe the relationship between related objects, indicating that three relationships may exist; for example, A and / or B can indicate: A alone, A and B simultaneously, or B alone, where A and B can be singular or plural. The character “ / ” generally indicates that the preceding and following related objects are in an “or” relationship.
[0026] References to "one embodiment," "some embodiments," "one example," or "some examples" used in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.
[0027] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different descriptive objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, "multiple" means two or more, unless otherwise explicitly defined.
[0028] Embodiments of this application will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements are represented by similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale. Furthermore, some well-known parts may not be shown in the drawings.
[0029] In TFT-LCD panel design, the array TFT test traces are connected to form a complete closed loop on the display substrate using gate lines or SD metal lines. Simultaneously, the array TFT test traces need to be connected to the test pads (celltestpads) within the display panel via ITO traces (different from gate lines or SD metal lines) to transmit signals to the display panel and detect any broken lines or open circuits. If a broken line or open circuit is found, the display panel can be scrapped immediately without further processing, saving time on film deposition materials (ICs), PCB boards, and factory equipment, thus reducing factory costs.
[0030] Organic layers in display substrates are typically used for surface planarization (covering the unevenness of underlying metal lines, transistors, and other structures to provide a smooth substrate), insulation (preventing short circuits between different conductive layers), or as functional layers. ITO traces, located above the organic layer, are formed by sputtering (PVD) to deposit ITO thin films, followed by photolithography and etching processes to create conductive lines with specific patterns for signal transmission (such as pixel electrode connections and test signal transmission). The continuity of ITO traces depends on the surface smoothness of the organic layer and the uniformity of its film formation. Excessively thick organic layers or large thickness variations often lead to ITO trace breakage, rendering the display panel precursor unusable. However, removing the organic layer would affect the planarization of other film layers or other performance characteristics of the display panel. Therefore, reducing the likelihood of ITO trace breakage while retaining the organic layer structure is a pressing technical challenge.
[0031] In view of this, this application provides a display panel. The display panel includes a display area and a non-display area disposed on at least one side of a substrate layer, the display area and the non-display area being sequentially disposed along a first direction; in the first direction, the non-display area includes a first region, a second region, and a dicing region sequentially disposed, the first region being located on the side of the non-display area closer to the display area; the first region and the second region include an organic layer and a wiring layer disposed along a second direction, the dicing region including the wiring layer, the second direction being perpendicular to the first direction; in the second direction, the size of the organic layer in the second region is smaller than the size of the organic layer in the first region. The wiring in this application has a lower risk of breakage, which can improve production yield and the performance of the display panel.
[0032] The display panel and display device described in the embodiments of this application will be described in detail below with reference to the accompanying drawings.
[0033] Figure 1 This is a partial structural diagram of a display panel according to one embodiment of this application. Figure 2 for Figure 1 A cross-sectional view along line AA'. (See diagram below.) Figure 1 and Figure 2 As shown, the display panel 10 includes a display area 100 and a non-display area 200 disposed on at least one side of the substrate layer 110, and the display area 100 and the non-display area 200 are arranged sequentially along the first direction X.
[0034] For example, the first direction X is as follows Figure 1 and Figure 2 As shown, the first direction X can also be referred to as the length direction of the display panel 10 or the display device.
[0035] The substrate layer 110 is the bottom base layer of the display panel 10, providing support and structural foundation for the display panel 10 or display device. This application does not limit the material, thickness, etc. of the substrate layer 110. For example, the substrate layer 110 can be a glass substrate, polyimide, or other materials. For example, the substrate layer 110 can be a single layer or a double layer.
[0036] It should be understood that Figure 1 and Figure 2 The division of the display area 100 and the non-display area 200 is exemplary and does not constitute a limitation on the display panel 10 of this application. Furthermore, there are some conventional settings in the display area 100 and the non-display area 200 that are not shown, which do not affect the normal use of the display panel 10.
[0037] In the first direction X, the non-display area 200 includes a first region 210, a second region 220 and a cutting region 230 arranged sequentially. The first region 210 is located on the side of the non-display area 200 closer to the display area 100. The first region 210 and the second region 220 include an organic layer 120 and a wiring layer 130 arranged along the second direction Y. The cutting region 230 includes the wiring layer 130. The second direction Y is perpendicular to the first direction X.
[0038] For example, the second direction Y is as follows Figure 2 As shown, the second direction Y can also be referred to as the thickness direction of the display panel 10 or the display device.
[0039] The non-display area 200 includes a side closer to the display area 100 and a side farther from the display area 100, with the first region 210 located on the side of the non-display area 200 closer to the display area 100. That is, along the first direction X, the display area 100, the first region 210, the second region 220, and the cutting region 230 are arranged sequentially. In other words, the first region 210 is closest to the display area 100, and the cutting region 230 is furthest from the display area 100.
[0040] It should be understood that the cutting area 230 here refers to the process of cutting the display substrate into multiple display panels 10 along the cutting lines in the cutting area 230 during the manufacturing process of the display panel 10.
[0041] The first region 210 and the second region 220 include an organic layer 120 and a wiring layer 130 disposed along the second direction Y. The cut region 230 includes the wiring layer 130, that is, the cut region 230 does not include the organic layer 120.
[0042] In the second direction Y, the size of the organic layer 120 in the second region 220 is smaller than the size of the organic layer 120 in the first region 210.
[0043] That is, the thickness of the organic layer 120 in the second region 220 is thinner than the thickness of the organic layer in the first region 210. In other words, along the first direction X, the organic layer 120 first becomes thinner from its normal thickness, and then the thickness in the cutting region 230 is 0.
[0044] During the fabrication of the display panel 10, it is necessary to cut along the cutting area 230 to form the display panel 10. The display panel 10 needs to transmit signals from the outside to the inside of the display panel 10 through the traces in the trace layer 130. Therefore, the trace layer 130 needs to exist in the cutting area 230, but the organic layer 120 cannot exist. However, in the display panel 10, the organic layer 120 is relatively thick. The thickness of the organic layer 120 changes abruptly from a relatively thick thickness to zero thickness from other areas to the cutting area 230. When fabricating the trace layer 130, the trace layer 130 may experience breakage due to the excessive thickness change of the organic layer 120. When the trace layer 130 breaks, it will cause abnormal display functions of the display panel 10, such as dark spots, vertical lines, or horizontal lines. If the break is close to the display area 100, it may cause cracks to extend to the display area 100 due to stress transmission during glass cutting, resulting in the scrapping of the display panel 10. Therefore, in the embodiments of this application, by setting a second region 220 and making the size of the organic layer 120 in the second region 220 smaller than the size of the organic layer 120 in the first region 210, the buffer step in the organic layer 120 can alleviate the "climbing difficulty" of the wiring layer 130 in the organic layer 120, thereby reducing the possibility of wiring breakage in the wiring layer 130 and improving the performance of the display panel 10.
[0045] In the above scheme, the display panel 10 includes a display area 100, a first region 210, a second region 220, and a cutting region 230 arranged sequentially along a first direction X. The first region 210 and the second region 220 include a wiring layer 130 and an organic layer 120, while the cutting region 230 only includes the wiring layer 130. By setting the second region 220 and making the size of the organic layer 120 in the second region 220 smaller than the size of the organic layer 120 in the first region 210, the buffer step in the organic layer 120 can alleviate the "climbing difficulty" of the wiring layer 130 within the organic layer 120, thereby reducing the possibility of wiring breakage in the wiring layer 130 and improving the performance of the display panel 10.
[0046] It should be understood that, in order to further mitigate the possibility of trace breakage in the wiring layer 130, the organic layer 120 can gradually become thinner at the junction of the first region 210 and the second region 220, and can gradually become thinner to 0 at the junction of the second region 220 and the cutting region 230.
[0047] Figure 3 This is a schematic diagram of the structure of a display panel according to an embodiment of a related technology. For example... Figure 3 As mentioned above, when the wiring layer 130 is fabricated on the organic layer 120 with excessive thickness variation, the wiring layer 130 is very prone to wire breakage.
[0048] In some embodiments, in the second direction Y, the ratio of the size of the organic layer 120 in the second region 220 to the size of the organic layer 120 in the first region 210 is 0.4-0.6.
[0049] In the above scheme, by making the ratio of the size of the organic layer 120 in the second region 220 to the size of the organic layer 120 in the first region 210 0.4-0.6, the possibility of wire breakage in the wiring layer 130 can be further reduced.
[0050] Specifically, the ratio of the size of the organic layer 120 in the second region 220 to the size of the organic layer 120 in the first region 210 can be 0.4, 0.42, 0.45, 0.48, 0.5, 0.53, 0.55, 0.57, 0.6 or any value within the above range.
[0051] In some embodiments, in the second direction Y, the ratio of the size of the organic layer 120 in the second region 220 to the size of the organic layer 120 in the first region 210 is 0.5.
[0052] In the above scheme, by making the ratio of the size of the organic layer 120 in the second region 220 to the size of the organic layer 120 in the first region 210 0.5, the possibility of wire breakage in the wiring layer 130 can be reduced to the greatest extent.
[0053] In some embodiments, the size of the organic layer 120 in the second region 220 is 1 μm-3 μm in the first direction X.
[0054] Retaining the organic layer 120 in the display panel 10 has two advantages: firstly, it helps to reduce the parasitic capacitance of the display panel 10, thereby reducing the resistance and capacitive load of the display panel 10; secondly, it facilitates the planarization of other film layers in subsequent manufacturing processes, such as metal layers and PS isolation pillars.
[0055] In the above solution, by making the length of the organic layer 120 in the second region 220 1μm-3μm, that is, the length of the thinned organic layer 120 is 1μm-3μm, the risk of wire breakage in the wiring layer 130 can be reduced, and the manufacturing process of the display panel 10 can also be taken into account.
[0056] Figure 4 This is a partial structural diagram of a display panel according to another embodiment of this application. Figure 4As shown, the routing layer 130 includes multiple traces 131; in the third direction Z, the spacing between connected traces 131 in the cutting region 230 is greater than the spacing between adjacent traces 131 in the first region 210, and the third direction Z is perpendicular to the first direction X and the second direction Y.
[0057] For example, a third party provides Z with... Figure 4 As shown, the third direction Z can also be referred to as the width direction of the display panel 10 or the display device.
[0058] The ITO traces 131 connecting the array test traces and the celltest pads within the display panel are prone to short circuits when cut in area 230. This causes short circuits in the different detection signals from the array test traces, resulting in the inability to detect the manufacturing yield of the display panel 10 in a timely manner. Therefore, increasing the distance between the traces 131 in the cut area 230 can reduce the risk of short circuits in the traces 131.
[0059] In the above scheme, by making the distance between adjacent traces 131 in the cutting area 230 greater than the distance between adjacent traces 131 in the first area 210, the risk of short circuit of trace 131 can be reduced.
[0060] In some implementations, the spacing between adjacent traces 131 in the second region 220 is greater than the spacing between adjacent traces 131 in the first region 210.
[0061] In the above solution, by making the distance between adjacent traces 131 in the second region 220 greater than the distance between adjacent traces 131 in the first region 210, the risk of short circuits in traces 131 can be further reduced, and the production difficulty can also be reduced.
[0062] It should be noted that if you want to further reduce the risk of short circuits in the wiring 131, you can continue to increase the spacing between adjacent wirings 131 in the first area 210 that borders the second area 220.
[0063] In some implementations, the spacing between adjacent traces 131 in the third direction Z of the cutting region 230 and the second region 220 is 80μm-110μm.
[0064] Specifically, the spacing between adjacent traces 131 in the cutting area 230 and the second area 220 can be 80μm, 82μm, 85μm, 88μm, 90μm, 95μm, 99.4μm, 100μm, 105μm, 110μm or any value within the above range.
[0065] This application also provides a display device, including a housing forming a receiving cavity; and a display panel as described in any of the above possible implementations, the display panel being received in the receiving cavity to provide display content to the display device.
[0066] The display device can be a TFT-LCD display or other display device, as well as any product or component with display function, such as a television, digital camera, mobile phone, or tablet computer that includes such display devices.
[0067] It should be noted that this application is not limited to the above-described embodiments. The above embodiments are merely examples, and any embodiments with the same structure and effect as the technical concept within the scope of this application are included in the technical scope of this application. Furthermore, various modifications that can be conceived by those skilled in the art to the embodiments, and other ways of constructing by combining some of the constituent elements of the embodiments, without departing from the spirit of this application, are also included in the scope of this application.
Claims
1. A display panel, characterized in that, include: A display area and a non-display area are disposed on at least one side of the substrate, wherein the display area and the non-display area are disposed sequentially along a first direction; In the first direction, the non-display area includes a first region, a second region, and a cutting region arranged sequentially. The first region is located on the side of the non-display area closer to the display area. The first region and the second region include an organic layer and a wiring layer arranged along a second direction. The cutting region includes the wiring layer. The second direction is perpendicular to the first direction. In the second direction, the size of the organic layer in the second region is smaller than the size of the organic layer in the first region.
2. The display panel according to claim 1, characterized in that, In the second direction, the size ratio of the organic layer in the second region to the size of the organic layer in the first region is 0.4-0.
6.
3. The display panel according to claim 1, characterized in that, In the second direction, the size ratio of the organic layer in the second region to the size of the organic layer in the first region is 0.
5.
4. The display panel according to claim 1, characterized in that, In the first direction, the size of the organic layer in the second region is 1 μm-3 μm.
5. The display panel according to any one of claims 1-4, characterized in that, The routing layer includes multiple traces; In the third direction, the spacing between adjacent traces in the cutting region is greater than the spacing between adjacent traces in the first region, and the third direction is perpendicular to the first direction and the second direction.
6. The display panel according to claim 5, characterized in that, In the third direction, the spacing between adjacent traces in the second region is greater than the spacing between adjacent traces in the first region.
7. The display panel according to claim 6, characterized in that, In the third direction, the spacing between adjacent traces in the cutting area and the second area is 80μm-110μm.
8. A display device, characterized in that, include: The outer shell forms a receiving cavity; and The display panel as claimed in any one of claims 1 to 7, wherein the display panel is housed in the receiving cavity to provide display content to the display device.