Bandgap reference start-up circuit with no quiescent power consumption, pcb board and device
By designing a bandgap reference startup circuit with zero static power consumption, and utilizing the current mirror effect and simplified circuit structure, the problems of static power consumption and stability are solved, realizing a low-power, highly integrated bandgap reference circuit suitable for low-power electronic systems.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- ZHUHAI CORE DISCOVERY MICROELECTRONICS CO LTD
- Filing Date
- 2025-12-12
- Publication Date
- 2026-07-14
AI Technical Summary
While existing bandgap reference start-up circuits address the degeneracy point problem, they generally face technical bottlenecks such as excessive static power consumption, large chip area, or impaired reference stability, making it difficult to meet the application requirements of low-power, high-integration, and high-stability electronic systems.
Design a bandgap reference startup circuit with zero static power consumption. By combining a switching section, a node pull-down section, and a mirror section, the current path is completely shut off after the reference signal stabilizes by utilizing the current mirror effect. This simplifies the circuit structure, reduces chip area, and ensures voltage stability through the current mirror section, temperature coefficient generation section, and reference output section.
It achieves complete shutdown of the static current loss of the startup unit after the reference signal stabilizes, simplifies the circuit structure, reduces chip area, improves the stability and response speed of the reference circuit, and adapts to the energy efficiency requirements of low-power electronic systems.
Smart Images

Figure CN224501219U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of startup circuit technology, and in particular to a bandgap reference startup circuit, PCB board and device with no static power consumption. Background Technology
[0002] As a core module in analog integrated circuits, the bandgap reference circuit provides a high-precision, low-temperature-coefficient voltage reference for various electronic systems such as ADCs and power management chips. Its operational stability directly determines the overall system performance. Traditional bandgap reference circuits are prone to entering a degenerate point state during the initial power-on phase, causing the circuit to fail to establish a stable output. Therefore, a startup circuit must be configured to break this ineffective equilibrium state and ensure that the reference circuit quickly enters the preset operating mode.
[0003] Currently, mainstream startup circuits are mainly divided into two categories: continuous-operation startup circuits trigger the reference circuit to start by continuously generating a fixed current or voltage signal. However, their working mechanism determines that the circuit still needs to maintain the current path after the reference stabilizes, inevitably introducing static power consumption. This poses a significant constraint on low-power applications that are sensitive to power consumption. Switch-controlled startup circuits control the on / off state of the startup module through a trigger signal. Theoretically, the startup path can be turned off after the reference stabilizes to eliminate static power consumption. However, this type of circuit requires the design of a complex logic control unit to achieve precise switching between startup and shutdown. This not only increases the chip area overhead but may also affect the output stability of the reference circuit due to interference of the control signal or timing matching problems, resulting in a decrease in the accuracy of the reference voltage.
[0004] In summary, while existing startup circuits address the bandgap reference degeneracy point problem, they generally face technical bottlenecks such as excessively high static power consumption, large chip area occupation, or impaired reference stability, making it difficult to meet the application requirements of low-power, high-integration, and high-stability electronic systems. Summary of the Invention
[0005] In order to overcome the shortcomings of the prior art, the purpose of this utility model is to provide a bandgap reference startup circuit with no static power consumption, which aims to reduce static power consumption caused by static current and reduce the complexity of control logic, thereby reducing additional power consumption.
[0006] To achieve the above objectives, the present invention adopts the following technical solution:
[0007] A bandgap reference startup circuit with zero static power consumption includes a startup unit and a bandgap reference unit. The startup unit includes a switching section, a node pull-down section, and a first mirror section. The bandgap reference unit includes a second mirror section. The drain of the switching section is connected to one end of the node pull-down section, and the other end of the node pull-down section is connected to the bandgap reference unit. The node pull-down section is used to start the bandgap reference unit when an enable signal triggers the switching section to conduct. The drain of the first mirror section is connected to the source of the switching section, and the gate of the first mirror section is connected to one end of the second mirror section. The first mirror section is used to mirror the operating current of the second mirror section so as to cut off the current path of the startup unit after the bandgap reference unit outputs a stable reference signal.
[0008] In the aforementioned bandgap reference startup circuit with no static power consumption, the bandgap reference unit further includes a current mirror, which includes a PBIAS node and a PBIASC node. The node pull-down section includes a tenth switch Q10 and an eleventh switch Q11. The gate of the tenth switch Q10 is connected to the gate of the eleventh switch Q11 and the drain of the switching section, respectively. The drain of the tenth switch Q10 is connected to the PBIAS node, and the drain of the eleventh switch Q11 is connected to the PBIASC node. The source of the tenth switch Q10 is connected to the source of the eleventh switch Q11 and the source terminal of the first mirror section, respectively. The tenth switch Q10 is used to pull the PBIAS node low when the switch section is turned on by an enable signal, and the eleventh switch Q11 is used to pull the PBIASC node low when the switch section is turned on by an enable signal.
[0009] In the aforementioned bandgap reference startup circuit with no static power consumption, the bandgap reference unit further includes a current distribution control unit, a temperature coefficient generation unit, and a reference output unit. The current mirror is connected to the second mirror unit, the current distribution control unit, and the reference output unit, respectively, and the current mirror unit is used to provide a stable bias current. The second mirror unit is connected to the current distribution control unit and the temperature coefficient generation unit, respectively, and the second mirror unit is used to provide a mirror current to the first mirror unit. The current distribution control unit is connected to the temperature coefficient generation unit, and the current distribution control unit is used to distribute current. The temperature coefficient generation unit is used to generate a temperature coefficient. The reference output unit is used to output a stable bandgap reference voltage.
[0010] In the aforementioned bandgap reference startup circuit with zero static power consumption, the current mirror includes a first PMOS transistor PM1, a second PMOS transistor PM2, a third PMOS transistor PM3, a fourth PMOS transistor PM4, a fifth PMOS transistor PM5, a sixth PMOS transistor PM6, a seventh PMOS transistor PM7, an eighth PMOS transistor PM8, a ninth PMOS transistor PM9, and a tenth PMOS transistor PM10. The sources of the first PMOS transistor PM1, the second PMOS transistor PM2, the third PMOS transistor PM3, the fourth PMOS transistor PM4, and the fifth PMOS transistor PM5 are all connected to a power supply. The gate of the first PMOS transistor PM1 is connected to its drain. The gate of the second PMOS transistor PM2 is connected to the gates of the third PMOS transistor PM3, the fourth PMOS transistor PM4, and the fifth PMOS transistor PM5, respectively, forming... The PBIAS node is formed by connecting the gate and drain of the sixth PMOS transistor PM6, and connecting the gate of the sixth PMOS transistor PM6 to the gates of the seventh PMOS transistor PM7, the eighth PMOS transistor PM8, the ninth PMOS transistor PM9, and the tenth PMOS transistor PM10. The drain of the first PMOS transistor PM1 is connected to the source of the sixth PMOS transistor PM6, the drain of the second PMOS transistor PM2 is connected to the source of the seventh PMOS transistor PM7, the drain of the third PMOS transistor PM3 is connected to the source of the eighth PMOS transistor PM8, the drain of the fourth PMOS transistor PM4 is connected to the source of the ninth PMOS transistor PM9, and the drain of the fifth PMOS transistor PM5 is connected to the source of the tenth PMOS transistor PM10.
[0011] In the aforementioned bandgap reference startup circuit with no static power consumption, the second mirror section includes a first NMOS transistor NM1 and a second NMOS transistor NM2. The gate of the first NMOS transistor NM1 is connected to the gate of the second NMOS transistor NM2, the drain of the first NMOS transistor NM1 is connected to the drain of the sixth PMOS transistor PM6, and the drain of the second NMOS transistor NM2 is connected to the drain of the seventh PMOS transistor PM7. The second NMOS transistor NM2 is used to provide mirror current for the first mirror section.
[0012] In the aforementioned bandgap reference startup circuit with zero static power consumption, the current distribution control unit includes a sixth switch Q6, a seventh switch Q7, an eighth switch Q8, and a ninth switch Q9. The gate and drain of the sixth switch Q6 are connected, and the gate of the sixth switch Q6 is also connected to the gates of the seventh switch Q7 and the eighth switch Q8, respectively. The drain of the sixth switch Q6 is connected to the drain of the fourth PMOS transistor PM4, and the source of the sixth switch Q6 is connected to the drain of the seventh switch Q7. The drain of the eighth switch Q8 is connected to the drain of the ninth PMOS transistor PM9 and the PBIAS node, respectively. The source of the eighth switch Q8 is connected to the drain of the ninth switch Q9, and the gate of the ninth switch Q9 is connected to the drain of the second NMOS transistor NM2.
[0013] In the aforementioned bandgap reference startup circuit with no static power consumption, the temperature coefficient generating unit includes a first transistor Q1, a second transistor Q2, a third transistor Q3, a fourth transistor Q4, and a first resistor R1. The emitter of the first transistor Q1 is connected to the source of the first NMOS transistor NM1, the emitter of the second transistor Q2 is connected to the source of the second NMOS transistor NM2, the emitter of the third transistor Q3 is connected to the source of the seventh switch Q7, the emitter of the fourth transistor Q4 is connected to one end of the first resistor R1, and the other end of the first resistor R1 is connected to the source of the ninth switch Q9. The bases and collectors of the first transistor Q1, the second transistor Q2, the third transistor Q3, and the fourth transistor Q4 are all grounded.
[0014] In the aforementioned bandgap reference start-up circuit with no static power consumption, the reference output section includes a fifth transistor Q5 and a second resistor R2. The emitter of the fifth transistor Q5 is connected to one end of the second resistor R2, and both the base and collector of the fifth transistor Q5 are grounded. The other end of the second resistor R2 is connected to the drain of the tenth PMOS transistor PM10. The other end of the second resistor R2 is used to output a stable bandgap reference voltage.
[0015] This utility model also provides a PCB board, on which the above-described bandgap reference start-up circuit with no static power consumption is printed.
[0016] This invention also provides an electronic device, which uses the above-described bandgap reference start-up circuit with no static power consumption to achieve operation control.
[0017] Beneficial effects:
[0018] This invention provides a bandgap reference startup circuit with no static power consumption. When the enable signal jumps to a high level, the enable signal triggers the switch to turn on, and the node pull-down section quickly starts the bandgap reference unit. When the bandgap reference unit outputs a stable reference signal, its internal second mirror section forms a stable operating current. The first mirror section connected to the second mirror section synchronously acquires the stable current signal through the current mirror effect, completely dissipating the charge coupled to the switch section. This causes the relevant devices in the node pull-down section and the switch section to turn off in sequence, so that no current flows through the switch section and the node pull-down section after the reference is stable. This ensures that the startup unit is completely turned off after completing the startup task, eliminating the static current loss of the startup unit. At the same time, it simplifies the circuit structure, reduces the chip area occupied, and improves the stability of the reference circuit. Attached Figure Description
[0019] Figure 1 A circuit block diagram of the bandgap reference startup circuit with zero static power consumption provided by this utility model;
[0020] Figure 2 The circuit diagram of the bandgap reference start-up circuit with zero static power consumption provided by this utility model.
[0021] Explanation of key component symbols: 100-Start-up unit, 110-Node pull-down section, 120-Switch section, 130-First mirror section, 200-Bandgap reference unit, 210-Current mirror section, 220-Second mirror section, 230-Current distribution control section, 240-Temperature coefficient generation section, 250-Reference output section. Detailed Implementation
[0022] This utility model provides a bandgap reference start-up circuit, PCB board, and device with no static power consumption. To make the purpose, technical solution, and effects of this utility model clearer and more explicit, the following describes this utility model in further detail with reference to the accompanying drawings and embodiments.
[0023] In the description of this utility model, it should be understood that the terms "installation" and "connection" should be interpreted broadly, and those skilled in the art can understand the specific meaning of the above terms in this utility model according to the specific circumstances.
[0024] Please see Figure 1 and Figure 2This invention provides a bandgap reference startup circuit with zero static power consumption, including a startup unit 100 and a bandgap reference unit 200. The startup unit 100 includes a switching section 120, a node pull-down section 110, and a first mirror section 130. The bandgap reference unit 200 includes a second mirror section 220. The drain of the switching section 120 is connected to one end of the node pull-down section 110, and the other end of the node pull-down section 110 is connected to the bandgap reference unit 200. The node pull-down section 110 is used to start the bandgap reference unit 200 when an enable signal triggers the switching section 120 to conduct. The drain of the first mirror section 130 is connected to the source of the switching section 120, and the gate of the first mirror section 130 is connected to one end of the second mirror section 220. The first mirror section 130 is used to mirror the operating current of the second mirror section 220 so as to cut off the current path of the startup unit 100 after the bandgap reference unit 200 outputs a stable reference signal.
[0025] The bandgap reference startup circuit disclosed in this application, which has zero static power consumption, consists of a startup unit 100 and a bandgap reference unit 200. The startup unit 100 includes a switching section 120, a node pull-down section 110, and a first mirror section 130. The bandgap reference unit 200 includes a second mirror section 220. When the enable signal is low, the switching section 120 is off, and the node pull-down section 110 and the first mirror section 130 are synchronously kept off. The startup unit 100 has no effective current path and maintains an initial state of zero static current. When the enable signal jumps to high, the gate voltage of the node pull-down section 110 is raised and turned on through the capacitive coupling of the switching section 120. This pulls the corresponding node potential of the bandgap reference unit 200 to a low level, fully turning on the relevant PMOS devices in the bandgap reference unit 200, breaking the degeneracy point of the bandgap reference, and driving the bandgap reference to quickly enter the working state and establish a stable output. During the establishment of the bandgap reference, the first mirror unit 130 mirrors the operating current of the second mirror unit 220 through its connection with the second mirror unit 220. As the bandgap reference outputs a stable reference signal, the second mirror unit 220 forms a stable operating current, and the first mirror unit 130 is simultaneously turned on, completely discharging the charge accumulated in the switching unit 120 due to capacitive coupling, causing the node pull-down unit 110 to turn off. At the same time, the drain of the first mirror unit 130 is connected to a capacitive load. After the charge is discharged, no continuous current flows through the first mirror unit 130, ultimately achieving a complete cut-off of the current path of the starting unit 100.
[0026] The bandgap reference startup circuit disclosed in this application, which has no static power consumption, ensures that all devices in the startup unit 100 are in the off state when the enable signal is low, resulting in no current loss. After the bandgap reference outputs a stable signal, the current path of the startup unit 100 is completely cut off, eliminating the static power consumption redundancy commonly found in traditional bandgap reference startup circuits and fully adapting to the energy efficiency requirements of low-power electronic systems. Secondly, its circuit architecture is highly simplified. The startup unit 100 consists only of a switching section 120, a node pull-down section 110, and a first mirror section 130, eliminating the need for additional complex auxiliary modules such as state detection and delay control. Furthermore, the first mirror section 130 reuses the second mirror section 220 within the bandgap reference unit 200 to achieve current mirroring, effectively reducing the number of devices and circuit complexity, significantly reducing chip area occupation, and improving the functional integration per unit chip area. This circuit ensures the high-performance operation of the bandgap reference. Through the capacitive coupling of the switching unit 120, the bandgap reference can quickly break the degeneracy point and establish a stable output. The complete shutdown of the startup unit 100 after the reference stabilizes avoids continuous electrical interference from the startup circuit to the bandgap reference unit 200, further enhancing the stability and long-term reliability of the bandgap reference signal.
[0027] Further, please refer to Figure 1 and Figure 2 In the aforementioned bandgap reference startup circuit with no static power consumption, the bandgap reference unit 200 further includes a current mirror 210. The current mirror 210 includes a PBIAS node and a PBIASC node. The node pull-down section 110 includes a tenth switch Q10 and an eleventh switch Q11. The gate of the tenth switch Q10 is connected to the gate of the eleventh switch Q11 and the drain of the switching section 120, respectively. The drain of the tenth switch Q10 is connected to the PBIAS node, and the drain of the eleventh switch Q11 is connected to the PBIASC node. The source of the tenth switch Q10 is connected to the source of the eleventh switch Q11 and the source terminal of the first mirror section 130, respectively. The tenth switch Q10 is used to pull the PBIAS node low when the enable signal triggers the switching section 120 to conduct. The eleventh switch Q11 is used to pull the PBIASC node low when the enable signal triggers the switching section 120 to conduct.
[0028] The bandgap reference startup circuit disclosed in this application, with no static power consumption, turns on when the enable signal jumps to a high level. Through the capacitive coupling of the switching section 120, the gate voltages of the tenth switch Q10 and the eleventh switch Q11 are raised. At this time, the tenth switch Q10 pulls down the PBIAS node potential of the current mirror section 210, and the eleventh switch Q11 simultaneously pulls down the PBIASC node potential. This causes the relevant devices in the current mirror section 210 to be fully turned on due to the lower gate potential, thereby breaking the degeneracy point of the bandgap reference and driving the bandgap reference to quickly enter the working state and establish a stable output. By directly pulling down the PBIAS and PBIASC node potentials of the current mirror section 210 through the tenth and eleventh switches Q10 and Q11, the current mirror section 210 can be quickly turned on, efficiently breaking the degeneracy point of the bandgap reference, significantly shortening the bandgap reference setup time, and improving the circuit response speed. In addition, the node pull-down section 110 directly achieves the potential control of the key node by means of the tenth switch Q10 and the eleventh switch Q11, without the need for additional complex auxiliary modules such as status detection and delay control, which effectively reduces the number of devices and circuit complexity, significantly reduces the chip area occupied, and improves the functional integration per unit chip area.
[0029] Further, please refer to Figure 1 and Figure 2 In the aforementioned bandgap reference startup circuit with no static power consumption, the bandgap reference unit 200 further includes a current distribution control unit 230, a temperature coefficient generation unit 240, and a reference output unit 250. The current mirror unit 210 is connected to the second mirror unit 220, the current distribution control unit 230, and the reference output unit 250, respectively, and the current mirror unit 210 is used to provide a stable bias current. The second mirror unit 220 is connected to the current distribution control unit 230 and the temperature coefficient generation unit 240, respectively, and the second mirror unit 220 is used to provide a mirror current to the first mirror unit 130. The current distribution control unit 230 is connected to the temperature coefficient generation unit 240, and the current distribution control unit 230 is used to distribute current. The temperature coefficient generation unit 240 is used to generate a temperature coefficient. The reference output unit 250 is used to output a stable bandgap reference voltage.
[0030] The bandgap reference startup circuit with zero static power consumption disclosed in this application includes a current mirror section 210 that provides a stable, low-noise bias current to the second mirror section 220, the current distribution control section 230, and the reference output section 250. This suppresses the interference of power supply fluctuations and process deviations on circuit performance from the source, ensuring the consistency and reliability of the current supply to each functional module. The second mirror section 220 provides a mirror reference to the first mirror section 130 in the startup unit 100, supporting the automatic shutdown of the startup unit 100 after the reference stabilizes through a current mirroring mechanism, thus achieving the design goal of zero static power consumption. The current distribution control section 230 adjusts the bias current directly supplied by the current mirror section 210 based on the circuit's preset temperature compensation requirements. The current set and the current mirrored by the second mirror unit 220 are proportionally allocated to provide controllable conditions for the generation of temperature characteristic signals. The temperature coefficient generation unit 240 generates complementary signals with positive and negative temperature coefficients under the drive of the allocated current, relying on the physical characteristics of semiconductor devices. The temperature sensitivity of the two types of signals is accurately calibrated by the current allocation ratio. The reference output unit 250 maintains its working state with the support of the stable bias current of the current mirror unit 210. It receives the complementary temperature coefficient signal of the temperature coefficient generation unit 240 through the indirect signal transmission link. After superposition and integration by the internal circuit topology, the voltage drift caused by temperature changes is offset, and finally a highly stable bandgap reference voltage VBG is output.
[0031] Further, please refer to Figure 2In the aforementioned bandgap reference startup circuit with zero static power consumption, the current mirror 210 includes a first PMOS transistor PM1, a second PMOS transistor PM2, a third PMOS transistor PM3, a fourth PMOS transistor PM4, a fifth PMOS transistor PM5, a sixth PMOS transistor PM6, a seventh PMOS transistor PM7, an eighth PMOS transistor PM8, a ninth PMOS transistor PM9, and a tenth PMOS transistor PM10. The sources of the first PMOS transistor PM1, the second PMOS transistor PM2, the third PMOS transistor PM3, the fourth PMOS transistor PM4, and the fifth PMOS transistor PM5 are all connected to a power supply. The gate of the first PMOS transistor PM1 is connected to its drain, and the gate of the second PMOS transistor PM2 is connected to the gates of the third PMOS transistor PM3, the fourth PMOS transistor PM4, and the fifth PMOS transistor PM5, respectively. The PBIAS node is formed; the gate and drain of the sixth PMOS transistor PM6 are connected, and the gate of the sixth PMOS transistor PM6 is connected to the gates of the seventh PMOS transistor PM7, the eighth PMOS transistor PM8, the ninth PMOS transistor PM9, and the tenth PMOS transistor PM10, respectively, to form the PBIASC node; the drain of the first PMOS transistor PM1 is connected to the source of the sixth PMOS transistor PM6, the drain of the second PMOS transistor PM2 is connected to the source of the seventh PMOS transistor PM7, the drain of the third PMOS transistor PM3 is connected to the source of the eighth PMOS transistor PM8, the drain of the fourth PMOS transistor PM4 is connected to the source of the ninth PMOS transistor PM9, and the drain of the fifth PMOS transistor PM5 is connected to the source of the tenth PMOS transistor PM10.
[0032] Further, please refer to Figure 2 In the aforementioned bandgap reference startup circuit with no static power consumption, the second mirror section 220 includes a first NMOS transistor NM1 and a second NMOS transistor NM2. The gate of the first NMOS transistor NM1 is connected to the gate of the second NMOS transistor NM2, the drain of the first NMOS transistor NM1 is connected to the drain of the sixth PMOS transistor PM6, and the drain of the second NMOS transistor NM2 is connected to the drain of the seventh PMOS transistor PM7. The second NMOS transistor NM2 is used to provide mirror current for the first mirror section.
[0033] Further, please refer to Figure 2In the aforementioned bandgap reference startup circuit with no static power consumption, the current distribution control unit 230 includes a sixth switch Q6, a seventh switch Q7, an eighth switch Q8, and a ninth switch Q9. The gate and drain of the sixth switch Q6 are connected, and the gate of the sixth switch Q6 is also connected to the gates of the seventh switch Q7 and the eighth switch Q8, respectively. The drain of the sixth switch Q6 is connected to the drain of the fourth PMOS transistor PM4, and the source of the sixth switch Q6 is connected to the drain of the seventh switch Q7. The drain of the eighth switch Q8 is connected to the drain of the ninth PMOS transistor PM9 and the PBIAS node, respectively. The source of the eighth switch Q8 is connected to the drain of the ninth switch Q9, and the gate of the ninth switch Q9 is connected to the drain of the second NMOS transistor NM2.
[0034] Further, please refer to Figure 2 In the aforementioned bandgap reference startup circuit with no static power consumption, the temperature coefficient generating unit 240 includes a first transistor Q1, a second transistor Q2, a third transistor Q3, a fourth transistor Q4, and a first resistor R1. The emitter of the first transistor Q1 is connected to the source of the first NMOS transistor NM1, the emitter of the second transistor Q2 is connected to the source of the second NMOS transistor NM2, the emitter of the third transistor Q3 is connected to the source of the seventh switch Q7, the emitter of the fourth transistor Q4 is connected to one end of the first resistor R1, and the other end of the first resistor R1 is connected to the source of the ninth switch Q9. The bases and collectors of the first transistor Q1, the second transistor Q2, the third transistor Q3, and the fourth transistor Q4 are all grounded.
[0035] Further, please refer to Figure 2 In the aforementioned bandgap reference start-up circuit with no static power consumption, the reference output section 250 includes a fifth transistor Q5 and a second resistor R2. The emitter of the fifth transistor Q5 is connected to one end of the second resistor R2, and both the base and collector of the fifth transistor Q5 are grounded. The other end of the second resistor R2 is connected to the drain of the tenth PMOS transistor PM10. The other end of the second resistor R2 is used to output a stable bandgap reference voltage VBG.
[0036] This utility model also provides a PCB board, on which the above-described bandgap reference start-up circuit with no static power consumption is printed.
[0037] This invention also provides an electronic device, which uses the above-described bandgap reference start-up circuit with no static power consumption to achieve operation control.
[0038] It is understood that those skilled in the art can make equivalent substitutions or changes based on the technical solution and inventive concept of this utility model, and all such substitutions or changes should fall within the protection scope of this utility model.
Claims
1. A bandgap reference startup circuit with zero static power consumption, characterized in that, The device includes a startup unit and a bandgap reference unit. The startup unit includes a switching section, a node pull-down section, and a first mirror section. The bandgap reference unit includes a second mirror section. The drain of the switching section is connected to one end of the node pull-down section, and the other end of the node pull-down section is connected to the bandgap reference unit. The node pull-down section is used to start the bandgap reference unit when an enable signal triggers the switching section to conduct. The drain of the first mirror section is connected to the source of the switching section, and the gate of the first mirror section is connected to one end of the second mirror section. The first mirror section is used to mirror the operating current of the second mirror section so as to cut off the current path of the startup unit after the bandgap reference unit outputs a stable reference signal.
2. The bandgap reference startup circuit with no static power consumption according to claim 1, characterized in that, The bandgap reference unit further includes a current mirror section, which includes a PBIAS node and a PBIASC node. The node pull-down section includes a tenth switch Q10 and an eleventh switch Q11. The gate of the tenth switch Q10 is connected to the gate of the eleventh switch Q11 and the drain of the switching section, respectively. The drain of the tenth switch Q10 is connected to the PBIAS node, and the drain of the eleventh switch Q11 is connected to the PBIASC node. The source of the tenth switch Q10 is connected to the source of the eleventh switch Q11 and the source terminal of the first mirror section, respectively. The tenth switch Q10 is used to pull down the PBIAS node when the switch section is turned on by an enable signal, and the eleventh switch Q11 is used to pull down the PBIASC node when the switch section is turned on by an enable signal.
3. The bandgap reference startup circuit with no static power consumption according to claim 2, characterized in that, The bandgap reference unit further includes a current distribution control unit, a temperature coefficient generation unit, and a reference output unit. The current mirror is connected to the second mirror unit, the current distribution control unit, and the reference output unit, respectively, and the current mirror unit is used to provide a stable bias current. The second mirror unit is connected to the current distribution control unit and the temperature coefficient generation unit, respectively, and the second mirror unit is used to provide a mirror current to the first mirror unit. The current distribution control unit is connected to the temperature coefficient generation unit, and the current distribution control unit is used to distribute current. The temperature coefficient generation unit is used to generate a temperature coefficient. The reference output unit is used to output a stable bandgap reference voltage.
4. The bandgap reference startup circuit with no static power consumption according to claim 3, characterized in that, The current mirror section includes a first PMOS transistor PM1, a second PMOS transistor PM2, a third PMOS transistor PM3, a fourth PMOS transistor PM4, a fifth PMOS transistor PM5, a sixth PMOS transistor PM6, a seventh PMOS transistor PM7, an eighth PMOS transistor PM8, a ninth PMOS transistor PM9, and a tenth PMOS transistor PM10. The sources of the first PMOS transistor PM1, the second PMOS transistor PM2, the third PMOS transistor PM3, the fourth PMOS transistor PM4, and the fifth PMOS transistor PM5 are all connected to a power supply. The gate of the first PMOS transistor PM1 is connected to its drain. The gate of the second PMOS transistor PM2 is connected to the gates of the third PMOS transistor PM3, the fourth PMOS transistor PM4, and the fifth PMOS transistor PM5, respectively, forming the PBIAS node. The gate and drain of the sixth PMOS transistor PM6 are connected, and the gate of the sixth PMOS transistor PM6 is connected to the gates of the seventh PMOS transistor PM7, the eighth PMOS transistor PM8, the ninth PMOS transistor PM9, and the tenth PMOS transistor PM10, respectively, forming the PBIASC node; the drain of the first PMOS transistor PM1 is connected to the source of the sixth PMOS transistor PM6, the drain of the second PMOS transistor PM2 is connected to the source of the seventh PMOS transistor PM7, the drain of the third PMOS transistor PM3 is connected to the source of the eighth PMOS transistor PM8, the drain of the fourth PMOS transistor PM4 is connected to the source of the ninth PMOS transistor PM9, and the drain of the fifth PMOS transistor PM5 is connected to the source of the tenth PMOS transistor PM10.
5. The bandgap reference startup circuit with no static power consumption according to claim 4, characterized in that, The second mirror section includes a first NMOS transistor NM1 and a second NMOS transistor NM2. The gate of the first NMOS transistor NM1 is connected to the gate of the second NMOS transistor NM2. The drain of the first NMOS transistor NM1 is connected to the drain of the sixth PMOS transistor PM6. The drain of the second NMOS transistor NM2 is connected to the drain of the seventh PMOS transistor PM7. The second NMOS transistor NM2 is used to provide mirror current for the first mirror section.
6. The bandgap reference startup circuit with no static power consumption according to claim 5, characterized in that, The current distribution control unit includes a sixth switch Q6, a seventh switch Q7, an eighth switch Q8, and a ninth switch Q9. The gate and drain of the sixth switch Q6 are connected, and the gate of the sixth switch Q6 is also connected to the gates of the seventh switch Q7 and the eighth switch Q8, respectively. The drain of the sixth switch Q6 is connected to the drain of the fourth PMOS transistor PM4, and the source of the sixth switch Q6 is connected to the drain of the seventh switch Q7. The drain of the eighth switch Q8 is connected to the drain of the ninth PMOS transistor PM9 and the PBIAS node, respectively. The source of the eighth switch Q8 is connected to the drain of the ninth switch Q9, and the gate of the ninth switch Q9 is connected to the drain of the second NMOS transistor NM2.
7. The bandgap reference startup circuit with no static power consumption according to claim 6, characterized in that, The temperature coefficient generating unit includes a first transistor Q1, a second transistor Q2, a third transistor Q3, a fourth transistor Q4, and a first resistor R1. The emitter of the first transistor Q1 is connected to the source of the first NMOS transistor NM1, the emitter of the second transistor Q2 is connected to the source of the second NMOS transistor NM2, the emitter of the third transistor Q3 is connected to the source of the seventh switch Q7, the emitter of the fourth transistor Q4 is connected to one end of the first resistor R1, and the other end of the first resistor R1 is connected to the source of the ninth switch Q9. The bases and collectors of the first transistor Q1, the second transistor Q2, the third transistor Q3, and the fourth transistor Q4 are all grounded.
8. The bandgap reference startup circuit with no static power consumption according to claim 4, characterized in that, The reference output section includes a fifth transistor Q5 and a second resistor R2. The emitter of the fifth transistor Q5 is connected to one end of the second resistor R2. The base and collector of the fifth transistor Q5 are both grounded. The other end of the second resistor R2 is connected to the drain of the tenth PMOS transistor PM10. The other end of the second resistor R2 is used to output a stable bandgap reference voltage.
9. A PCB board, characterized in that, The PCB board is printed with a bandgap reference startup circuit with no static power consumption as described in any one of claims 1-8.
10. An electronic device, characterized in that, The electronic device employs a bandgap reference startup circuit with no static power consumption as described in any one of claims 1-8 to achieve operational control.