A battery management system
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- EVE ENERGY CO LTD
- Filing Date
- 2025-07-24
- Publication Date
- 2026-07-14
Smart Images

Figure CN224501272U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to battery management technology, and more particularly to a battery management system. Background Technology
[0002] Battery management systems (BMS) play a crucial role in battery applications as they monitor, manage, and optimize battery performance. However, existing BMS systems suffer from compatibility issues. Utility Model Content
[0003] This utility model provides a battery management system to achieve compatibility between the upper and lower boards, as well as compatibility between the battery management system and daisy-chain communication and bus communication.
[0004] This utility model provides a battery management system, including: a motherboard and a slave board, the slave board including an upper board and a lower board, both the upper board and the lower board including multiple signal acquisition and processing modules; each of the signal acquisition and processing modules is sequentially connected in communication, and each of the signal acquisition and processing modules is connected in communication with the motherboard through a daisy chain or bus;
[0005] The signal acquisition and processing module is used to acquire the target signal of the battery, process the target signal and transmit it to the motherboard; the target signal acquired by different signal acquisition and processing modules is the target signal of different batteries.
[0006] Optionally, both the upper board and the lower board include four signal acquisition and processing modules; the first to the fourth signal acquisition and processing module of the upper board are sequentially connected in communication, the fourth signal acquisition and processing module of the upper board is connected in communication with the motherboard, the first signal acquisition and processing module of the upper board is connected in communication with the fourth signal acquisition and processing module of the lower board, the first to the fourth signal acquisition and processing module of the lower board are sequentially connected in communication, and the first signal acquisition and processing module of the lower board is connected in communication with the motherboard.
[0007] Optionally, the lower board further includes a controller, which is communicatively connected to the signal acquisition and processing module of the lower board; the controller is used to process and output the signals transmitted by the signal acquisition and processing module.
[0008] Optionally, the lower board further includes a first communication interface module, through which the controller and the signal acquisition and processing module of the lower board are connected.
[0009] Optionally, the lower plate further includes a second communication interface module, which is communicatively connected to the controller, and the controller outputs signals through the second communication interface module.
[0010] Optionally, the slave board further includes a module connector, through which the signal acquisition and processing module of the upper board is communicatively connected to the signal acquisition and processing module of the lower board.
[0011] Optionally, the slave board further includes an interface connector, through which each of the signal acquisition and processing modules is electrically connected to the battery.
[0012] Optionally, the slave board may further include an interface expansion module corresponding to each of the signal acquisition and processing modules, and the signal acquisition and processing modules are electrically connected to the interface connector through the corresponding interface expansion module.
[0013] Optionally, each of the signal acquisition and processing modules communicates with the motherboard via a daisy-chain single chain or loop, or each of the signal acquisition and processing modules communicates with the motherboard via a bus.
[0014] Optionally, the target signal includes at least one of a voltage signal and a temperature signal.
[0015] The battery management system provided in this embodiment includes a motherboard and a slave board. The slave board includes an upper board and a lower board, both of which include multiple signal acquisition and processing modules. Each signal acquisition and processing module is sequentially connected to the motherboard via a daisy chain or a bus. The signal acquisition and processing modules are used to acquire target signals from the battery, process the target signals, and transmit them to the motherboard. Different signal acquisition and processing modules acquire target signals from different batteries. In this embodiment, each signal acquisition and processing module is connected to the motherboard via a daisy chain or a bus. When the upper board is used alone, it communicates with the motherboard via a single-chain or loop-loop daisy chain. When the lower board is used alone, it communicates with the motherboard via a bus. When the upper and lower boards are used together, both can communicate with the motherboard via a daisy chain, using both single-chain and loop-loop daisy chains. The upper and lower boards can also communicate with the motherboard via a bus, thus achieving compatibility between the upper and lower boards and compatibility of the battery management system with both daisy chain and bus communication. Attached Figure Description
[0016] Figure 1 This is a structural block diagram of a battery management system provided in an embodiment of the present invention;
[0017] Figure 2 This is a structural block diagram of an upper plate and a lower plate connection provided in an embodiment of this utility model. Detailed Implementation
[0018] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, not the entire structure.
[0019] Figure 1 This is a structural block diagram of a battery management system provided in an embodiment of this utility model. (Reference) Figure 1 The battery management system includes a main board 10 and a slave board 20. The slave board 20 includes an upper board 21 and a lower board 22. Both the upper board 21 and the lower board 22 include multiple signal acquisition and processing modules. Each signal acquisition and processing module is sequentially connected to the main board 10 via a daisy chain or bus. The signal acquisition and processing modules are used to acquire target signals of the battery, process the target signals, and transmit them to the main board. The target signals acquired by different signal acquisition and processing modules are the target signals of different batteries.
[0020] Specifically, the motherboard 10 can send control signals, such as signals to control the operation of the signal acquisition and processing module, to enable the signal acquisition and processing module to acquire the target signals of the battery. Different signal acquisition and processing modules acquire target signals of different batteries, such as voltage signals and temperature signals, and process the acquired target signals, such as performing analog-to-digital conversion, before transmitting them to the motherboard 10 via a daisy-chain or bus. For example, Figure 1The diagram illustrates eight signal acquisition and processing modules A1-A8, of which four modules A1-A4 are for the lower board 22, and the other four modules A5-A8 are for the upper board 21. The upper board 21 can be an upper layer of the slave board 20, and the lower board 22 can be a lower layer of the slave board 20; the upper and lower boards 21 can be stacked. When the upper board 21 is used alone, it communicates with the main board 10 via a daisy-chain single-link or loop-loop connection, meaning each signal acquisition and processing module on the upper board 21 communicates with the main board 10 via a daisy-chain connection. When the lower board 22 is used alone, it communicates with the main board 10 via a bus, such as a CAN (Controller Area Network) bus, meaning each signal acquisition and processing module on the lower board 22 communicates with the main board 10 via a bus. When the upper board 21 and the lower board 22 are used together, both can communicate with the main board 10 via a daisy chain. Both single-chain and loop daisy chains are possible. The upper board 21 and the lower board 22 can also communicate with the main board 10 via a bus, thus achieving compatibility between the upper board 21 and the lower board 22, as well as compatibility of the battery management system with both daisy chain and bus communication. Furthermore, there can be multiple slave boards, each with an identical structure, and each slave board is connected to the main board. Multiple slave boards allow for the acquisition of target signals from more batteries.
[0021] The battery management system provided in this embodiment includes a main board and slave boards. The slave boards include an upper board and a lower board, both of which include multiple signal acquisition and processing modules. Each signal acquisition and processing module is sequentially connected to the main board via a daisy chain or a bus. Each signal acquisition and processing module is used to acquire target signals from the battery, process the target signals, and transmit them to the main board. Different signal acquisition and processing modules acquire target signals from different batteries. In this embodiment, each signal acquisition and processing module is connected to the main board via a daisy chain or a bus. When the upper board is used alone, it communicates with the main board via a single-chain or loop-loop daisy chain. When the lower board is used alone, it communicates with the main board via a bus. When the upper and lower boards are used together, both can communicate with the main board via a daisy chain, using both single-chain and loop-loop daisy chains. The upper and lower boards can also communicate with the main board via a bus, thus achieving compatibility between the upper and lower boards and compatibility of the battery management system with both daisy chain and bus communication.
[0022] refer to Figure 1Optionally, both the upper board 21 and the lower board 22 include four signal acquisition and processing modules; the first to the fourth signal acquisition and processing module of the upper board 21 are sequentially connected in communication, the fourth signal acquisition and processing module of the upper board 21 is connected in communication with the main board 10, the first signal acquisition and processing module of the upper board 21 is connected in communication with the fourth signal acquisition and processing module of the lower board 22, the first to the fourth signal acquisition and processing module of the lower board 22 are sequentially connected in communication, and the first signal acquisition and processing module of the lower board 22 is connected in communication with the main board 10.
[0023] The upper board 21 includes four signal acquisition and processing modules A5-A8, and the lower board 22 includes four signal acquisition and processing modules A1-A4. The first signal acquisition and processing module A5, the second signal acquisition and processing module A6, the third signal acquisition and processing module A7, and the fourth signal acquisition and processing module A8 of the upper board 21 are sequentially connected in communication. The first signal acquisition and processing module A1, the second signal acquisition and processing module A2, the third signal acquisition and processing module A3, and the fourth signal acquisition and processing module A4 of the lower board 22 are sequentially connected in communication. The first signal acquisition and processing module A5 of the upper board 21 is connected in communication with the fourth signal acquisition and processing module A4 of the lower board 22. Figure 1 As shown, the signal transmission path from the eight signal acquisition and processing modules A1-A8 to the motherboard 10 is either from top to bottom or from bottom to top, i.e., sequentially from the fourth signal acquisition and processing module A8 on the upper board 21, the third signal acquisition and processing module A7 on the upper board 21, the second signal acquisition and processing module A6 on the upper board 21, the first signal acquisition and processing module A5 on the upper board 21, the fourth signal acquisition and processing module A4 on the lower board 22, the third signal acquisition and processing module A3 on the lower board 22, the second signal acquisition and processing module A2 on the lower board 22, and so on. The first signal acquisition and processing module A1 transmits the signal to the motherboard 10; or, the first signal acquisition and processing module A1, the second signal acquisition and processing module A2, the third signal acquisition and processing module A3, the fourth signal acquisition and processing module A4 of the lower board 22, the first signal acquisition and processing module A5, the second signal acquisition and processing module A6, the third signal acquisition and processing module A7, and the fourth signal acquisition and processing module A8 of the upper board 21 are transmitted to the motherboard 10 in sequence, which can realize the transmission of signals along different directions.
[0024] It should be noted that the four signal acquisition and processing modules included in both the upper and lower boards in this embodiment are only for illustrative purposes. The specific number of signal acquisition and processing modules included in the upper and lower boards can be determined according to the actual application requirements of the battery management system, and is not limited here.
[0025] Continue to refer to Figure 1 Optionally, the lower board 22 also includes a controller 23, which is communicatively connected to the signal acquisition and processing module of the lower board 22; the controller 23 is used to process and output the signals transmitted by the signal acquisition and processing module.
[0026] Specifically, such as Figure 1 As shown, the signal acquisition and processing module A1 of the lower board 22 is communicatively connected to the controller 23. The controller 23 processes the signals transmitted by the signal acquisition and processing module A1 of the lower board 22, such as converting the resistance value in the temperature signal into a temperature value, storing it, and then outputting it, for example, to another motherboard that communicates with the controller 23 via CAN. The controller 23 can be an MCU (Microcontroller Unit). MCUs are characterized by high integration, low power consumption, low cost, and flexible development. They can achieve control, storage, and communication without additional expansion chips, and support sleep and standby modes. They also support programming languages such as C / C++, making them suitable for battery management systems.
[0027] Continue to refer to Figure 1 Optionally, the lower plate 22 also includes a first communication interface module 221, through which the controller 23 and the signal acquisition and processing module of the lower plate 22 are connected.
[0028] For example, the first communication interface module 221 is a BQ79600 chip. The BQ79600 chip is a communication interface integrated circuit that can operate in ambient temperatures ranging from -40℃ to +125℃, making it suitable for harsh environments. The BQ79600 chip has strong electrostatic discharge protection capabilities, ensuring functional safety and compliance, and guaranteeing the high safety performance of the battery management system. In the event of a fault detection, if the controller 23 is in sleep mode, it can be automatically woken up, enhancing the safety of the battery management system. The BQ79600 chip supports a wide power supply range: from 4.75V to 40V, providing flexibility in the design of the power management system and adapting to different power conditions. The BQ79600 chip offers rich communication interfaces: it has UART / SPI interfaces, is compatible with 3.3V / 5V logic levels, and facilitates communication with other electronic devices. The BQ79600 chip supports a ring architecture, employing transformer / capacitor isolation, enabling isolated daisy-chain communication using a single device, and providing strong anti-interference capabilities. The BQ79600 chip offers good compatibility. As the interface between the controller 23 and the signal acquisition and processing module of the lower board 22, it can transmit signals from the lower board 22's signal acquisition and processing module via daisy chain to the controller 23 through SPI (Serial Peripheral Interface). In the battery management system, the BQ79600 chip acts as a communication bridge between the controller 23 and the lower board 22's signal acquisition and processing modules, enabling signal transmission between them. The BQ79600 chip features a compact package design, facilitating layout.
[0029] Continue to refer to Figure 1 Optionally, the lower plate 22 may also include a second communication interface module 222, which is connected to the controller 23 for communication, and the controller 23 outputs signals through the second communication interface module 222.
[0030] The second communication interface module 222 communicates with the controller 23 via CAN. The controller 23 can transmit signals to other motherboards, such as those communicating with the controller 23 via CAN, through the second communication interface module 222.
[0031] Figure 2 This is a structural block diagram illustrating the connection between an upper plate and a lower plate according to an embodiment of this utility model. (Reference) Figure 1 and Figure 2 Optionally, the board 20 also includes a module connector 24, through which the signal acquisition and processing module of the upper board 21 communicates with the signal acquisition and processing module of the lower board 22.
[0032] Specifically, such as Figure 1 and Figure 2 As shown, the first signal acquisition and processing module A5 of the upper board 21 and the fourth signal acquisition and processing module A4 of the lower board 22 are connected via module connector 24 to enable signal transmission between the upper board 21 and the lower board 22. Furthermore, the first signal acquisition and processing module A5 of the upper board 21 can also be connected to the motherboard via another connector to enable single-chain or loop-loop communication between the upper board 21 and the motherboard 10 via a daisy-chain when the upper board 21 is used alone.
[0033] It should be noted that the module connector 24 can be set on the upper plate 21 or the lower plate 22. The specific location can be determined according to the actual design requirements of the upper plate 21 and the lower plate 22, and no limitation is made here.
[0034] refer to Figure 1 Optionally, board 20 also includes interface connector 25, through which each signal acquisition and processing module is electrically connected to the battery.
[0035] Specifically, such as Figure 1 As shown, the interface connector 25 is connected to each signal acquisition and processing module. The interface connector 25 is provided with multiple interfaces, and different signal acquisition and processing modules acquire target signals from different batteries through different interfaces of the interface connector 25.
[0036] Continue to refer to Figure 1 Optionally, the board 20 also includes an interface expansion module 26 corresponding to each signal acquisition and processing module. The signal acquisition and processing module is electrically connected to the interface connector 25 through the corresponding interface expansion module 26.
[0037] For example, the interface expansion module 26 is a CD4067 chip. The CD4067 chip is a commonly used digital control analog switch chip. Belonging to the CD4000 series of general-purpose logic chips, the CD4067 is a 16-channel analog multiplexer / demultiplexer manufactured using CMOS technology. The CD4067 chip consists of 16 independent analog switches, with specific switch channels selected via a control terminal and four binary input terminals. When the control terminal is high, each switch is off; when the control terminal is low, based on the input combination of each input terminal, one of the 16 switches can be selected to close, thereby transmitting the input signal to one of the 16 switch channels. This signal is then transmitted to the output terminal, completing the signal selection and switching. The CD4067 chip features a wide voltage range of 3V-15V to adapt to various power supply conditions. It also boasts low on-resistance and stable on-resistance, maintaining relative stability across the entire input signal range, thus improving signal transmission accuracy and stability. Furthermore, the CD4067 chip exhibits low cutoff leakage current, with minimal leakage current in the cutoff state, effectively preventing signal crosstalk and energy loss. The CD4067 chip is available in various package types to meet the size, heat dissipation, and cost requirements of practical applications. When the number of target signals exceeds a preset threshold, the signal acquisition and processing module can acquire the target signals through the interface expansion module 26 to ensure that all target signals can be acquired.
[0038] Optionally, each signal acquisition and processing module communicates with the motherboard 10 via a daisy chain or loop, or each signal acquisition and processing module communicates with the motherboard 10 via a bus.
[0039] Specifically, such as Figure 1As shown, when the motherboard 10 sends a control signal to the signal acquisition and processing module, taking daisy-chain single-link communication as an example, the motherboard 10 sends the control signal to the first signal acquisition and processing module A1 on the lower board 22. This control signal is then sequentially transmitted from the first signal acquisition and processing module A1 on the lower board 22 to the fourth signal acquisition and processing module A8 on the upper board 21. Each signal acquisition and processing module identifies whether the control signal is intended for itself. If so, it responds to the control signal, performs an acquisition operation, and transmits the acquired target signal to the motherboard 10 in the opposite direction to the transmission direction of the control signal. When the motherboard 10 sends a control signal to the signal acquisition and processing module, taking daisy-chain loop communication as an example, if the communication line between the motherboard 10 and the signal acquisition and processing module is not broken, the working principle is similar to single-link. The motherboard 10 sends a control signal, which is sequentially transmitted through the signal acquisition and processing modules. Each signal acquisition and processing module identifies whether the control signal is intended for itself. If so, it responds to the control signal, performs an acquisition operation, and transmits the acquired target signal to the motherboard 10 in the opposite direction to the transmission direction of the control signal. If the communication line between the mainboard 10 and the signal acquisition and processing module is disconnected, such as the communication line between the mainboard 10 and the first signal acquisition and processing module A1 of the lower board 22 being disconnected, while the communication lines at other locations are normal, the target signal acquired by the signal acquisition and processing module will be transmitted sequentially from the first signal acquisition and processing module A1 of the lower board 22 to the fourth signal acquisition and processing module A8 of the upper board 21 and then to the mainboard 10. This ensures reliable transmission of the target signal to the mainboard 10 and improves the stability of the battery management system. Daisy-chain loop communication offers even higher reliability. When a communication line disconnection causes the daisy chain to break, the mainboard 10 can send control signals and receive target signals from another direction, thus ensuring communication between the mainboard 10 and the slave board 20, and enabling fault identification and troubleshooting.
[0040] Furthermore, in daisy-chain single-chain communication, signals are transmitted sequentially along the daisy chain. Each signal acquisition and processing module introduces a transmission delay, including delays in signal transmission along the line and delays in signal processing by the module. Daisy-chain loopback communication has a similar communication speed to daisy-chain single-chain communication, with signals transmitted sequentially through each acquisition and processing module. Daisy-chain loopback communication offers higher stability than daisy-chain single-chain communication. Even if a wiring harness fails, the direction can be reversed to allow the slave board to continue communicating with the motherboard without affecting signal transmission, thus enhancing the stability of the battery management system. Simultaneously, the loopback structure improves the fault tolerance of the battery management system through redundant links. When one link fails, another can serve as a backup, ensuring communication continuity. In addition, loopback structures are typically designed with fault detection and automatic switching functions in mind, enabling timely fault detection and handling, further improving the stability of the battery management system.
[0041] Furthermore, bus communication features low hardware cost, simple wiring, strong anti-interference capability, and support for long-distance transmission. Buses such as the CAN bus also offer high-efficiency transmission, low latency, low power consumption, wide temperature range, long lifespan, and strong resistance to harsh environments, making them advantageous in battery management systems. Further, the slave board and the main board 10 can communicate via daisy-chain or bus. For example, when the upper board 21 is used alone, it communicates with the main board 10 via a single-chain or loop daisy-chain, meaning each signal acquisition and processing module of the upper board 21 communicates with the main board 10 via a daisy-chain. When the lower board 22 is used alone, it communicates with the main board 10 via a bus, such as a CAN bus, meaning each signal acquisition and processing module of the lower board 22 communicates with the main board 10 via a bus. When the upper board 21 and the lower board 22 are used together, both can communicate with the main board 10 via a daisy chain. Both single-chain and loop daisy chains are possible. The upper board 21 and the lower board 22 can also communicate with the main board 10 via a bus, thus achieving compatibility between the upper board 21 and the lower board 22, as well as compatibility of the battery management system with both daisy chain and bus communication. Furthermore, there can be multiple slave boards, each with an identical structure, and each slave board is connected to the main board. Multiple slave boards allow for the acquisition of target signals from more batteries.
[0042] Optionally, the target signal includes at least one of a voltage signal and a temperature signal.
[0043] For example, the target signals include voltage signals and temperature signals. The battery management system can monitor the battery based on the voltage and temperature signals. For instance, when the voltage corresponding to the voltage signal and / or the temperature corresponding to the temperature signal exceed their respective preset thresholds, the system can take appropriate control measures to prevent the battery from malfunctioning or even being damaged due to overvoltage and / or overtemperature.
[0044] Furthermore, the voltage signal acquired from the board can range from 0V to 5V with a acquisition error of ±5mV. The temperature signal acquired from the board can range from -40℃ to 125℃, with an acquisition error of 1℃ in the temperature range of -20℃ to 65℃ and 2℃ in other ranges. The signal acquisition and processing module in the board can acquire the battery temperature signal through a temperature sensor such as a negative temperature system thermistor. The battery also has a balancing function, with each individual cell equipped with a balancing resistor, such as a 30Ω balancing resistor. The balancing current supports pulse width modulation technology. The board can be integrated with a single battery box to form a standard energy storage battery box, facilitating the production, assembly, system integration, maintenance, replacement, decommissioning, and disposal of the entire system.
[0045] Furthermore, the battery management system in this embodiment, as a system for monitoring, managing, and optimizing battery performance, is widely used in the new energy field. For example, in the electric vehicle field, the battery management system, through the management of the battery pack and in conjunction with the liquid cooling thermal management system, optimizes the driving range and extends battery life; in the photovoltaic and wind power storage fields, the battery management system coordinates battery charging and discharging, smooths grid fluctuations, and improves energy utilization efficiency; in the consumer electronics field, such as the battery management systems of mobile phones and laptops, the battery management systems are responsible for power display, charging protection, and temperature control; in the industrial and medical equipment fields, such as drones and medical monitoring equipment, the battery management system is required to ensure the high reliability and safety of the equipment.
[0046] The battery management system provided in this embodiment includes: a motherboard and a slave board. The slave board includes an upper board and a lower board, both of which include multiple signal acquisition and processing modules. Each signal acquisition and processing module is sequentially connected in communication with the motherboard via a daisy chain or bus. The signal acquisition and processing modules are used to acquire target signals from the battery, process the target signals, and transmit them to the motherboard. Different signal acquisition and processing modules acquire target signals from different batteries. Both the upper and lower boards include four signal acquisition and processing modules. The first to fourth signal acquisition and processing modules on the upper board are sequentially connected in communication with the motherboard. The first signal acquisition and processing module on the upper board is connected in communication with the fourth signal acquisition and processing module on the lower board. The first to fourth signal acquisition and processing modules on the lower board are sequentially connected in communication with the motherboard. The lower board also includes a controller, a first communication interface module, and a second communication interface module. The controller is connected to the signal acquisition and processing modules on the lower board via the first communication interface module, and the second communication interface module is connected to the controller. The controller outputs signals via the second communication interface module. In the battery management system provided in this embodiment, each signal acquisition and processing module is connected to the motherboard via a daisy chain or bus. When the upper board is used alone, it communicates with the motherboard via a single chain or loop-through daisy chain. When the lower board is used alone, it communicates with the motherboard via a bus. When the upper and lower boards are used together, both can communicate with the motherboard via a daisy chain, and both single and loop-through daisy chains are available. The upper and lower boards can also communicate with the motherboard via a bus, thus achieving compatibility between the upper and lower boards and compatibility of the battery management system with both daisy chain and bus communication. Furthermore, the signal transmission path from the eight signal acquisition and processing modules on the board to the motherboard can be either from the upper board to the lower board and then to the motherboard, or from the lower board to the upper board and then to the motherboard, enabling signal transmission in different directions.
[0047] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, combinations, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention. The scope of the present invention is determined by the scope of the appended claims.
Claims
1. A battery management system, characterized in that, include: The system includes a motherboard and a slave board. The slave board includes an upper board and a lower board, and both the upper board and the lower board include multiple signal acquisition and processing modules. Each signal acquisition and processing module is sequentially connected in communication with the motherboard, and each signal acquisition and processing module is connected in communication with the motherboard via a daisy chain or a bus. The signal acquisition and processing module is used to acquire the target signal of the battery, process the target signal and transmit it to the motherboard; the target signal acquired by different signal acquisition and processing modules is the target signal of different batteries.
2. The battery management system according to claim 1, characterized in that, Both the upper board and the lower board include four signal acquisition and processing modules; the first to the fourth signal acquisition and processing module of the upper board are sequentially connected in communication, the fourth signal acquisition and processing module of the upper board is connected in communication with the motherboard, the first signal acquisition and processing module of the upper board is connected in communication with the fourth signal acquisition and processing module of the lower board, the first to the fourth signal acquisition and processing module of the lower board are sequentially connected in communication, and the first signal acquisition and processing module of the lower board is connected in communication with the motherboard.
3. The battery management system according to claim 1, characterized in that, The lower plate also includes a controller, which is communicatively connected to the signal acquisition and processing module of the lower plate; the controller is used to process and output the signals transmitted by the signal acquisition and processing module.
4. The battery management system according to claim 3, characterized in that, The lower plate also includes a first communication interface module, and the controller and the signal acquisition and processing module of the lower plate are connected through the first communication interface module.
5. The battery management system according to claim 3, characterized in that, The lower plate also includes a second communication interface module, which is communicatively connected to the controller, and the controller outputs signals through the second communication interface module.
6. The battery management system according to any one of claims 1-5, characterized in that, The slave board also includes a module connector, through which the signal acquisition and processing module of the upper board is communicatively connected to the signal acquisition and processing module of the lower board.
7. The battery management system according to any one of claims 1-5, characterized in that, The slave board also includes an interface connector, through which each of the signal acquisition and processing modules is electrically connected to the battery.
8. The battery management system according to claim 7, characterized in that, The slave board also includes an interface expansion module that corresponds to each of the signal acquisition and processing modules. The signal acquisition and processing modules are electrically connected to the interface connectors through the corresponding interface expansion modules.
9. The battery management system according to any one of claims 1-5, characterized in that, Each of the signal acquisition and processing modules communicates with the motherboard via a daisy-chain single chain or loop, or each of the signal acquisition and processing modules communicates with the motherboard via a bus.
10. The battery management system according to any one of claims 1-5, characterized in that, The target signal includes at least one of a voltage signal and a temperature signal.