A charge-discharge protection circuit for a lithium-ion battery

Abstract

The utility model discloses a kind of charging power-off protection circuit of lithium ion battery pack, including power supply, power-off protection execution circuit, voltage sampling circuit, current sampling circuit, temperature sampling circuit and battery pack, the power-off protection execution circuit, voltage sampling circuit, current sampling circuit and temperature sampling circuit are electrically connected with battery pack, voltage sampling circuit, current sampling circuit and temperature sampling circuit are electrically connected with power-off protection execution circuit, there is filter circuit between power supply and battery pack electrically connected, battery pack is electrically connected with battery pack voltage monitoring circuit, passive equalization circuit and active equalization circuit.The utility model is set through a series of electrical devices, the voltage condition of single battery in battery pack can be monitored in real time during charging process, and voltage equalization is carried out to battery pack when there is voltage difference, which can effectively reduce the overall failure caused by single battery overcharge.

Description

Technical Field

[0001] This utility model relates to the field of lithium-ion battery pack technology, and in particular to a charging power-off protection circuit for lithium-ion battery packs. Background Technology

[0002] Lithium-ion batteries, as a new type of clean and renewable energy source, have advantages such as high operating voltage, light weight, and high energy density. They are widely used in power tools, digital cameras, mobile phones, and laptops, and show a strong development trend. Due to the inherent characteristics of lithium-ion battery packs, they are very sensitive to voltage, current, and temperature. Excessive charging and discharging can cause irreversible damage to lithium-ion battery packs, and even pose a risk of explosion. Therefore, the research and development of automatic charging power-off protection for lithium-ion battery packs is particularly important. Automatic charging power-off protection is an indispensable part of the application of lithium-ion battery packs. According to a search report from a novelty search agency, announcement number CN223024136U discloses an automatic charging power-off protection circuit for lithium-ion battery packs, consisting of four batteries... The lithium-ion battery pack is composed of a main control chip U1 (model BQ40Z50) connected to a charging / discharging interface via a main charging / discharging circuit. Its features include a voltage acquisition circuit, a current acquisition circuit, and a primary protection circuit connected to the main control chip U1. The automatic charging power-off protection circuit of this lithium-ion battery pack, composed of the integrated circuit BQ40Z50 (main control unit, with precise power calculation algorithm) and its peripheral circuits, supports the use of 1 to 4 lithium-ion battery cells in series and includes voltage, current, and temperature protection, power display, etc. It monitors each cell individually and can quickly shut down when the charging / discharging voltage or charging / discharging current exceeds the protection threshold, achieving high control precision. The use of the integrated circuit BQ40Z50 in this automatic charging power-off protection circuit simplifies the peripheral circuit design, reduces cost, and facilitates miniaturization of the device.

[0003] The automatic charging power-off protection circuit for lithium-ion battery packs disclosed in the aforementioned patents can promptly cut off power in case of overvoltage, overcurrent, and overtemperature. However, it still has the following shortcomings in use: the aforementioned patents do not involve voltage equalization functions. Since the aforementioned patents monitor and protect the entire battery pack as a whole, rather than monitoring individual cells separately, in practical applications, for series-connected battery packs, overcharging of a single cell may lead to overall failure. In view of the above, this application proposes a charging power-off protection circuit for lithium-ion battery packs. Utility Model Content

[0004] The purpose of this invention is to address the shortcomings of existing technologies by proposing a charging power-off protection circuit for lithium-ion battery packs.

[0005] To achieve the above objectives, the present invention adopts the following technical solution:

[0006] A charging power-off protection circuit for a lithium-ion battery pack includes a power supply, a power-off protection execution circuit, a voltage sampling circuit, a current sampling circuit, a temperature sampling circuit, and a battery pack. The power-off protection execution circuit, voltage sampling circuit, current sampling circuit, and temperature sampling circuit are all electrically connected to the battery pack. The voltage sampling circuit, current sampling circuit, and temperature sampling circuit are all electrically connected to the power-off protection execution circuit. A filter circuit is electrically connected between the power supply and the battery pack. The battery pack is electrically connected to a battery pack voltage monitoring circuit, a passive balancing circuit, and an active balancing circuit. The battery pack voltage monitoring circuit, passive balancing circuit, and active balancing circuit are electrically connected to the same balancing control logic module. The balancing control logic module is electrically connected to the power-off protection execution circuit.

[0007] Preferably, the battery pack voltage monitoring circuit includes a chip U3. Pin 1 of chip U3 is electrically connected to one end of resistor R10 and pin 2 of transistor Q5. The other end of resistor R10 is electrically connected to pin 2 of chip U3. Pin 1 of transistor Q5 is electrically connected to one end of resistor R11. The other ends of resistor R11 and R10 are both grounded. Pin 3 of transistor Q5 is electrically connected to one end of resistor R13 and one end of resistor R12. The other end of resistor R13 is electrically connected to one end of control switch S1. The other end of control switch S1 is electrically connected to one end of resistor R14. The other ends of resistor R14, R12, and pin 2 of chip U3 are all grounded. Pin 3 of chip U3 is electrically connected to the voltage output terminal of the battery pack. Pin 4 of chip U3 is electrically connected to the receiving terminal of the equalization control logic module.

[0008] Preferably, the passive equalization circuit includes a chip U1. Pin 2 of chip U1 is electrically connected to one end of a resistor R1, and the other end of resistor R1 is electrically connected to the positive terminal of the battery pack. Pin 3 of chip U1 is grounded. The positive terminal of the battery pack is electrically connected to one end of a fuse F1. Pin 4 of chip U1 is electrically connected to pin 1 of transistor Q1. Pin 6 of chip U1 is electrically connected to pin 1 of transistor Q2. The other end of fuse F1 and one end of resistor R1 are both electrically connected to pin 2 of transistor Q1. Pin 2 of transistor Q1 is electrically connected to the positive terminal of diode D1. The negative terminal of transistor D1 is electrically connected to the negative terminal of diode D2. Pin 3 of transistor Q2 is electrically connected to the positive terminal of diode D2. Pin 3 of transistor Q1 and pin 2 of transistor Q2 are electrically connected. The positive terminal of diode D2 and pin 3 of transistor Q2 are both electrically connected to the negative terminal of the battery pack. Pin 5 of chip U1 is electrically connected to one end of resistor R4. The other end of resistor R4 is electrically connected to the negative terminal of the battery pack. A capacitor C1 is connected in parallel between the positive and negative terminals of the battery pack. The negative terminal of the battery pack is electrically connected to one end of resistor R2 and one end of resistor R3. The other end of resistor R3 is grounded.

[0009] Preferably, the active balancing circuit includes a chip U2. Pin 1 of chip U2 is electrically connected to pin 2 of transistor Q4 and one end of capacitor C2. Pin 1 of transistor Q4 is electrically connected to pin 2 of transistor Q3. Pin 1 of transistor Q3 is electrically connected to one end of resistor R5. The other end of resistor R5 is electrically connected to pin 3 of transistor Q3. Pin 2 of chip U2 is electrically connected to the other end of resistor R5 and pin 3 of transistor Q3. Pin 3 of transistor Q4 is electrically connected to pin 11 of chip U2. Pins 3, 4, and 5 of chip U2 are respectively electrically connected to one end of resistor R6, one end of resistor R7, and one end of resistor R8. The other end of resistor R8 is electrically connected to one end of capacitor C4. The other end of capacitor C4 is electrically connected to the other end of resistor R7. One end of capacitor C3 is electrically connected, and the other end of capacitor C3 is electrically connected to the other end of resistor R6. The other end of resistor R6 is electrically connected to the other end of capacitor C2. Capacitors C2, C3, and C4 are connected in series. One end of resistor R9 is electrically connected to pin 6 of chip U2. One end of resistor R9 is electrically connected to pin 5 of chip U2. The other end of resistor R9 is electrically connected to pin 7 of chip U2. Pin 6 of chip U2 is grounded. One end of capacitor C5, one end of capacitor C6, and one end of capacitor C7 are electrically connected to pins 8, 9, and 10 of chip U2, respectively. The other ends of capacitors C5, C6, and C7 are all grounded. One end of capacitor C8 is electrically connected to pin 13 of chip U2. The other end of capacitor C8 and pin 12 of chip U2 are both grounded.

[0010] Preferably, the filtering circuit is used to suppress and filter common-mode noise from the voltage output by the power supply. The filtering circuit is an EMI filtering circuit, which includes a common-mode inductor, an X capacitor, and a Y capacitor. The common-mode inductor is used to suppress common-mode noise, the X capacitor is used to filter differential-mode interference, and the Y capacitor is used to filter common-mode interference.

[0011] Preferably, the equalization control logic module is used to monitor the voltage of each battery cell output by the battery pack voltage monitoring circuit in real time, identify voltage deviations, and automatically select passive equalization or active equalization according to the magnitude of ΔV. Passive equalization is selected when ΔV>50mV, and active equalization is selected when ΔV>30mV.

[0012] Preferably, the battery pack incorporates a MOSFET.

[0013] Compared with existing technologies, the beneficial effects of this utility model are:

[0014] By combining the battery pack voltage monitoring circuit, passive balancing circuit, active balancing circuit and balancing control logic module, the voltage of individual cells in the battery pack can be monitored in real time, and the balancing mode can be automatically selected according to the voltage difference to balance the voltage.

[0015] This invention, through the arrangement of a series of electrical components, can monitor the voltage of individual cells in the battery pack in real time during the charging process, and perform voltage balancing of the battery pack when there is a voltage difference, which can effectively reduce the situation where overcharging of a single cell leads to overall failure. Attached Figure Description

[0016] Figure 1 A connection block diagram of a charging power-off protection circuit for a lithium-ion battery pack proposed in this utility model.

[0017] Figure 2 The circuit diagram of the battery pack voltage monitoring circuit in the charging power failure protection circuit of the lithium-ion battery pack proposed in this utility model;

[0018] Figure 3 The circuit diagram of the passive equalization circuit in the charging power failure protection circuit of the lithium-ion battery pack proposed in this utility model.

[0019] Figure 4 The circuit diagram shows the active balancing circuit in the charging power-off protection circuit of a lithium-ion battery pack proposed in this utility model. Detailed Implementation

[0020] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present utility model. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments.

[0021] Reference Figure 1 A charging power-off protection circuit for a lithium-ion battery pack includes a power supply, a power-off protection execution circuit, a voltage sampling circuit, a current sampling circuit, a temperature sampling circuit, and a battery pack. The power-off protection execution circuit, the voltage sampling circuit, the current sampling circuit, and the temperature sampling circuit are all electrically connected to the battery pack, and the voltage sampling circuit, the current sampling circuit, and the temperature sampling circuit are all electrically connected to the power-off protection execution circuit.

[0022] In this implementation scheme: The existing device {publication (announcement) number}: CN223024136U discloses an automatic charging power-off protection circuit for lithium-ion battery packs. The power-off protection execution circuit, voltage sampling circuit, current sampling circuit, and temperature sampling circuit in this application all adopt the same technical means as in this prior art. These technical means will not be described in detail here. This application further improves upon the existing main body, and details can be found in the following disclosure. To solve the technical problems existing in this prior art, such as the "the above patent does not involve voltage equalization function, because the above patent monitors and protects the whole system during the detection and protection process, rather than monitoring individual cells separately. In practical applications, for series-connected battery packs, overcharging of a single cell may lead to overall failure." In combination, this problem is obviously a real and difficult problem to solve. Therefore, to solve this technical problem, a battery pack voltage monitoring circuit, a passive equalization circuit, an active equalization circuit, and an equalization control logic module have been added to this application.

[0023] Furthermore:

[0024] Reference Figure 1-4 A charging power-off protection circuit for a lithium-ion battery pack includes a filter circuit electrically connected between the power supply and the battery pack. The battery pack contains a built-in MOSFET. The filter circuit is used to suppress and filter out common-mode noise from the voltage output by the power supply. The filter circuit is an EMI filter circuit, which includes a common-mode inductor, an X capacitor, and a Y capacitor. The common-mode inductor is used to suppress common-mode noise, the X capacitor is used to filter out differential-mode interference, and the Y capacitor is used to filter out common-mode interference.

[0025] The battery pack is electrically connected to a battery pack voltage monitoring circuit, a passive balancing circuit, and an active balancing circuit. The battery pack voltage monitoring circuit, passive balancing circuit, and active balancing circuit are electrically connected to the same balancing control logic module. The balancing control logic module is electrically connected to the power failure protection execution circuit. The balancing control logic module is used to monitor the voltage of each battery cell output by the battery pack voltage monitoring circuit in real time, identify the voltage deviation, and automatically select passive balancing or active balancing according to the magnitude of ΔV. Passive balancing is selected when ΔV>50mV, and active balancing is selected when ΔV>30mV.

[0026] The battery pack voltage monitoring circuit includes chip U3. Pin 1 of chip U3 is electrically connected to one end of resistor R10 and pin 2 of transistor Q5. The other end of resistor R10 is electrically connected to pin 2 of chip U3. Pin 1 of transistor Q5 is electrically connected to one end of resistor R11. The other ends of resistor R11 and R10 are both grounded. Pin 3 of transistor Q5 is electrically connected to one end of resistor R13 and one end of resistor R12. The other end of resistor R13 is electrically connected to one end of control switch S1. The other end of control switch S1 is electrically connected to one end of resistor R14. The other ends of resistor R14, R12, and pin 2 of chip U3 are all grounded. Pin 3 of chip U3 is electrically connected to the voltage output terminal of the battery pack. Pin 4 of chip U3 is electrically connected to the receiving terminal of the equalization control logic module. Resistors R10, R11, R12, R13, and R14 are all voltage divider resistors.

[0027] The passive balancing circuit includes chip U1. Pin 2 of chip U1 is electrically connected to one end of resistor R1, and the other end of resistor R1 is electrically connected to the positive terminal of the battery pack. Pin 3 of chip U1 is grounded. The positive terminal of the battery pack is electrically connected to one end of fuse F1. Pin 4 of chip U1 is electrically connected to pin 1 of transistor Q1. Pin 6 of chip U1 is electrically connected to pin 1 of transistor Q2. The other end of fuse F1 and one end of resistor R1 are both electrically connected to pin 2 of transistor Q1. Pin 2 of transistor Q1 is electrically connected to the anode of diode D1. Diode D1... The negative terminal of chip 1 is electrically connected to the negative terminal of diode D2. Pin 3 of transistor Q2 is electrically connected to the positive terminal of diode D2. Pin 3 of transistor Q1 and pin 2 of transistor Q2 are electrically connected. The positive terminal of diode D2 and pin 3 of transistor Q2 are both electrically connected to the negative terminal of the battery pack. Pin 5 of chip U1 is electrically connected to one end of resistor R4. The other end of resistor R4 is electrically connected to the negative terminal of the battery pack. A capacitor C1 is connected in parallel between the positive and negative terminals of the battery pack. The negative terminal of the battery pack is electrically connected to one end of resistor R2 and one end of resistor R3. The other end of resistor R3 is grounded.

[0028] The active balancing circuit includes chip U2. Pin 1 of chip U2 is electrically connected to pin 2 of transistor Q4 and one end of capacitor C2. Pin 1 of transistor Q4 is electrically connected to pin 2 of transistor Q3. Pin 1 of transistor Q3 is electrically connected to one end of resistor R5. The other end of resistor R5 is electrically connected to pin 3 of transistor Q3. Pin 2 of chip U2 is electrically connected to the other end of resistor R5 and pin 3 of transistor Q3. Pin 3 of transistor Q4 is electrically connected to pin 11 of chip U2. Pins 3, 4, and 5 of chip U2 are electrically connected to one end of resistor R6, one end of resistor R7, and one end of resistor R8, respectively. The other end of resistor R8 is electrically connected to one end of capacitor C4. The other end of capacitor C4 is electrically connected to the other end of resistor R7. The other end of resistor R7 is also electrically connected to one end of capacitor C3. The other end of capacitor C3 is electrically connected to the other end of resistor R6. The other end of resistor R6 is electrically connected to the other end of capacitor C2. Capacitors C2, C3, and C4 are connected in series. Pin 6 of chip U2 is electrically connected to one end of resistor R9. One end of resistor R9 is electrically connected to pin 5 of chip U2. The other end of resistor R9 is electrically connected to pin 7 of chip U2. Pin 6 of chip U2 is grounded. Pins 8, 9, and 10 of chip U2 are electrically connected to one end of capacitor C5, one end of capacitor C6, and one end of capacitor C7, respectively. The other ends of capacitors C5, C6, and C7 are all grounded. Pin 13 of chip U2 is electrically connected to one end of capacitor C8. The other end of capacitor C8 and pin 12 of chip U2 are both grounded. Capacitors C2, C3, and C4 form a capacitor network.

[0029] In this implementation scheme: Chip U3 collects the voltage of each battery cell in real time and transmits the signal to the equalization control logic module through resistors R10, R11, R12, R13, R14 and transistor Q5. The equalization control logic module automatically selects the equalization mode according to the voltage difference (ΔV). When ΔV>50mV, the passive equalization circuit is activated. Chip U1 controls transistors Q1 and Q2 and the battery pack MOSFET to conduct, discharging the energy of the high-voltage battery through resistors R1-R4 until the voltage is balanced. When ΔV>30mV, the active equalization circuit is activated. Chip U2 transfers energy between adjacent batteries through transistors Q3 and Q4 and the capacitor network (C2-C4) to achieve lossless equalization. When ΔV≤10mV, the equalization is turned off, thereby achieving the purpose of effective equalization during charging.

[0030] It should be noted that the equalization control logic module calculates the voltage difference between adjacent batteries using its built-in differential amplifier (AD8276). The calculation formula is: ΔV=V1-V2, where V1 and V2 represent the battery voltage of the corresponding cell, respectively. Based on the voltage difference and the set threshold, the corresponding action is executed.

[0031] Working principle: During use, the external power supply filters out high-frequency noise and common-mode interference through a filter circuit to ensure stable input voltage. The input voltage directly charges the battery pack. The voltage sampling circuit, current sampling circuit, and temperature sampling circuit sample the voltage, current, and temperature during the charging process, respectively. The sampled data is transmitted to the power-off protection execution circuit. At the same time, the power-off protection execution circuit cuts off the MOSFET of the battery pack and stops charging. The specific sampling principle has been mentioned in the patent announcement number: CN223024136U, and will not be elaborated here.

[0032] Meanwhile, chip U3 collects the voltage of each battery cell in real time and transmits the signal to the equalization control logic module through resistors R10, R11, R12, R13, R14, and transistor Q5. If a battery cell voltage is abnormal (e.g., overvoltage), pin 4 of chip U3 outputs a high level to trigger protection. The equalization control logic module automatically selects the equalization mode based on the voltage difference (ΔV). When ΔV > 50mV, the passive equalization circuit is activated. Chip U1 controls transistors Q1 and Q2 and the battery pack MOSFET to conduct, transferring energy from the high-voltage battery through resistor R1-resistance... R4 discharges until voltage balance is achieved. When ΔV > 30mV, the active balancing circuit is activated. Chip U2 transfers energy between adjacent batteries through transistors Q3 and Q4 and the capacitor network (C2-C4) to achieve lossless balancing. When ΔV ≤ 10mV, balancing is turned off. At the same time, the power-off protection execution circuit transmits the sampled data to the balancing control logic module. In case of overvoltage, overtemperature, or overcurrent, the balancing control logic module forcibly shuts down the balancing circuit, thereby achieving the purpose of effectively balancing the circuit during charging. The balancing circuit can effectively reduce the situation where overcharging of a single battery leads to overall failure.

[0033] The above description is only a preferred embodiment of the present utility model, but the protection scope of the present utility model is not limited thereto. Any equivalent substitutions or changes made by those skilled in the art within the technical scope disclosed in the present utility model, based on the technical solution and the inventive concept of the present utility model, should be included within the protection scope of the present utility model.

Claims

1. A charging power-off protection circuit for a lithium-ion battery pack, comprising a power supply, a power-off protection execution circuit, a voltage sampling circuit, a current sampling circuit, a temperature sampling circuit, and a battery pack, wherein the power-off protection execution circuit, the voltage sampling circuit, the current sampling circuit, and the temperature sampling circuit are all electrically connected to the battery pack, and the voltage sampling circuit, the current sampling circuit, and the temperature sampling circuit are all electrically connected to the power-off protection execution circuit, characterized in that, The power supply and the battery pack are electrically connected by a filter circuit. The battery pack is electrically connected to a battery pack voltage monitoring circuit, a passive balancing circuit, and an active balancing circuit. The battery pack voltage monitoring circuit, the passive balancing circuit, and the active balancing circuit are electrically connected to the same balancing control logic module. The balancing control logic module is electrically connected to the power failure protection execution circuit. The battery pack voltage monitoring circuit includes a chip U3. Pin 1 of chip U3 is electrically connected to one end of resistor R10 and pin 2 of transistor Q5. The other end of resistor R10 is electrically connected to pin 2 of chip U3. Pin 1 of transistor Q5 is electrically connected to one end of resistor R11. The other ends of resistor R11 and R10 are both grounded. Pin 3 of transistor Q5 is electrically connected to one end of resistor R13 and one end of resistor R12. The other end of resistor R13 is electrically connected to one end of control switch S1. The other end of control switch S1 is electrically connected to one end of resistor R14. The other ends of resistor R14, R12, and pin 2 of chip U3 are all grounded. Pin 3 of chip U3 is electrically connected to the voltage output terminal of the battery pack. Pin 4 of chip U3 is electrically connected to the receiving terminal of the equalization control logic module. The passive equalization circuit includes a chip U1. Pin 2 of chip U1 is electrically connected to one end of resistor R1, and the other end of resistor R1 is electrically connected to the positive terminal of the battery pack. Pin 3 of chip U1 is grounded. The positive terminal of the battery pack is electrically connected to one end of fuse F1. Pin 4 of chip U1 is electrically connected to pin 1 of transistor Q1. Pin 6 of chip U1 is electrically connected to pin 1 of transistor Q2. The other end of fuse F1 and one end of resistor R1 are both electrically connected to pin 2 of transistor Q1. Pin 2 of transistor Q1 is electrically connected to the positive terminal of diode D1. The negative terminal of D1 is electrically connected to the negative terminal of diode D2. Pin 3 of transistor Q2 is electrically connected to the positive terminal of diode D2. Pin 3 of transistor Q1 and pin 2 of transistor Q2 are electrically connected. The positive terminal of diode D2 and pin 3 of transistor Q2 are both electrically connected to the negative terminal of the battery pack. Pin 5 of chip U1 is electrically connected to one end of resistor R4. The other end of resistor R4 is electrically connected to the negative terminal of the battery pack. A capacitor C1 is connected in parallel between the positive and negative terminals of the battery pack. The negative terminal of the battery pack is electrically connected to one end of resistor R2 and one end of resistor R3. The other end of resistor R3 is grounded. The active balancing circuit includes a chip U2. Pin 1 of chip U2 is electrically connected to pin 2 of transistor Q4 and one end of capacitor C2. Pin 1 of transistor Q4 is electrically connected to pin 2 of transistor Q3. Pin 1 of transistor Q3 is electrically connected to one end of resistor R5. The other end of resistor R5 is electrically connected to pin 3 of transistor Q3. Pin 2 of chip U2 is electrically connected to the other end of resistor R5 and pin 3 of transistor Q3. Pin 3 of transistor Q4 is electrically connected to pin 11 of chip U2. Pins 3, 4, and 5 of chip U2 are electrically connected to one end of resistor R6, one end of resistor R7, and one end of resistor R8, respectively. The other end of resistor R8 is electrically connected to one end of capacitor C4. The other end of capacitor C4 is electrically connected to the other end of resistor R7. The other end of resistor R7 is also electrically connected to... One end of capacitor C3 is electrically connected to the other end of resistor R6. The other end of resistor R6 is electrically connected to the other end of capacitor C2. Capacitors C2, C3, and C4 are connected in series. One end of resistor R9 is electrically connected to pin 6 of chip U2. One end of resistor R9 is electrically connected to pin 5 of chip U2. The other end of resistor R9 is electrically connected to pin 7 of chip U2. Pin 6 of chip U2 is grounded. Pins 8, 9, and 10 of chip U2 are electrically connected to one end of capacitor C5, one end of capacitor C6, and one end of capacitor C7, respectively. The other ends of capacitors C5, C6, and C7 are all grounded. One end of capacitor C8 is electrically connected to pin 13 of chip U2. The other end of capacitor C8 and pin 12 of chip U2 are both grounded.

2. The charging power-off protection circuit for a lithium-ion battery pack according to claim 1, characterized in that, The filtering circuit is used to suppress and filter out common-mode noise from the output voltage of the power supply. The filtering circuit is an EMI filtering circuit, which includes a common-mode inductor, an X capacitor, and a Y capacitor. The common-mode inductor is used to suppress common-mode noise, the X capacitor is used to filter out differential-mode interference, and the Y capacitor is used to filter out common-mode interference.

3. The charging power-off protection circuit for a lithium-ion battery pack according to claim 1, characterized in that, The equalization control logic module is used to monitor the voltage of each battery cell output by the battery pack voltage monitoring circuit in real time, identify voltage deviations, and automatically select passive equalization or active equalization according to the magnitude of ΔV. Passive equalization is selected when ΔV>50mV, and active equalization is selected when ΔV>30mV.

4. The charging power-off protection circuit for a lithium-ion battery pack according to claim 1, characterized in that, The battery pack contains a built-in MOSFET.

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