An LED boost driving circuit

Abstract

The utility model discloses a kind of LED boost driving circuit, including power module, boost control module, MOS tube driving circuit and output circuit.Power module converts commercial power into DC bus voltage;Boost control module includes power management chip, first inductor, first diode and at least one MOS tube, wherein first inductor one end connects bus voltage, the other end connects MOS tube drain and first diode anode, power management chip is controlled MOS tube on-off by first control end output drive signal to realize inductor energy storage boost;MOS tube driving circuit extracts energy from first inductor second end, and after amplifying the drive signal of power management chip, it is output to MOS tube gate;Output circuit connects first diode cathode to drive LED load.The utility model enhances driving capacity by the energy extraction and amplification mechanism of driving circuit, effectively solve the problem of insufficient driving caused by junction capacitance increase when multiple MOS tubes are connected in parallel, reduce chip and MOS tube heat loss, improve current harmonic distortion performance.

Description

Technical Field

[0001] This utility model relates to the field of LED driver circuit technology, and in particular to an LED boost driver circuit. Background Technology

[0002] Current high-power LED boost driver circuits often require stronger drive current when dealing with multiple MOSFETs connected in parallel. This is due to the increased junction capacitance of the MOSFETs. However, traditional control ICs have limited drive capability, leading to insufficient drive of the IC and MOSFETs, resulting in severe overheating and high current harmonic distortion. Traditional upgrade solutions, such as replacing with high-drive-capability ICs or using low-resistance CoolMOS transistors, significantly increase costs. Therefore, there is an urgent need for an LED driver solution that enhances drive capability, reduces drive losses and heat generation, optimizes current harmonic distortion performance, and offers cost advantages. Utility Model Content

[0003] The main purpose of this invention is to propose an LED boost driver circuit, which aims to solve the technical problems of low driving capability, high driving loss and heat generation, and high current harmonic distortion in existing LED boost driver circuits.

[0004] To achieve the above objectives, the first aspect of this utility model provides an LED boost driving circuit, including a power supply module, a boost control module, a MOSFET driving circuit, and an output circuit. The power supply module converts AC mains power into DC power. The boost control module includes a power management chip, a first inductor, a first diode, and at least one MOSFET. A first end of the first inductor is connected to the output terminal of the power supply module, and a second end is connected to the drain of the MOSFET and the anode of the first diode. The power management chip outputs a driving signal through a first control terminal to control the switching on and off of the MOSFET, driving the first inductor to perform boost conversion. The first input terminal of the MOSFET driving circuit is connected to the second end of the first inductor to obtain driving energy, the second input terminal is connected to the first control terminal of the power management chip, and the output terminal is connected to the gate of the MOSFET. The input terminal of the output circuit is connected to the cathode of the first diode, and the output terminal is connected to the LED load.

[0005] Preferably, the MOS transistor driving circuit includes a first capacitor and a first transistor; the first terminal of the first capacitor is connected to the second terminal of the first inductor; the base of the first transistor is connected to the first control terminal of the power management chip, the collector is connected to the second terminal of the first capacitor, and the emitter is connected to the gate of the MOS transistor.

[0006] Preferably, the MOS transistor driving circuit further includes a second diode and a third diode; the cathode of the second diode is connected to the second terminal of the first capacitor, and the anode is grounded; the anode of the third diode is connected to the second terminal of the first capacitor, and the cathode is connected to the collector of the first transistor.

[0007] Preferably, the MOS transistor driving circuit further includes a compensation resistor network; the first end of the compensation resistor network is connected to the cathode of the first diode, and the second end is connected to the cathode of the third diode.

[0008] Preferably, the MOS transistor driving circuit further includes a current-limiting resistor network; the first end of the current-limiting resistor network is connected to the second end of the first capacitor, and the second end is connected to the cathode of the third diode.

[0009] Preferably, the MOS transistor driving circuit further includes a second capacitor and a first resistor; the first end of the second capacitor is connected to the cathode of the third diode, and the second end is grounded; the first end of the first resistor is connected to the cathode of the third diode, and the second end is connected to the collector of the first transistor.

[0010] Preferably, the MOS transistor driving circuit further includes a fourth diode and a second resistor; the anode of the fourth diode is connected to the emitter of the first transistor, and the cathode is connected to the base of the first transistor; the first end of the second resistor is connected to the first control terminal of the power management chip, and the second end is connected to the base of the first transistor.

[0011] Preferably, the boost control module further includes a voltage divider resistor network and a third capacitor; the first end of the voltage divider resistor network is connected to the cathode of the first diode, and the second end is grounded; the first input terminal of the power management chip is connected to the voltage sampling node of the voltage divider resistor network; the first end of the third capacitor is connected to the voltage sampling node, and the second end is grounded.

[0012] Preferably, the boost control module further includes a sampling resistor group consisting of a third resistor, a fourth resistor, a fifth resistor, and a sixth resistor connected in parallel, and a seventh resistor; the first common terminal of the sampling resistor group is connected to the source of the MOSFET, and the second common terminal is grounded; the first terminal of the seventh resistor is connected to the second input terminal of the power management chip, and the second terminal is connected to the first common terminal of the sampling resistor group.

[0013] Preferably, the boost control module further includes a fourth capacitor, an eighth resistor, and a ninth resistor; the first end of the eighth resistor is connected to the cathode of the first diode, and the second end is connected to the first end of the ninth resistor; the second end of the ninth resistor and the first end of the fourth capacitor are both connected to the third input terminal of the power management chip, and the second end of the fourth capacitor is grounded.

[0014] This invention proposes an LED boost drive circuit. By independently adding a MOSFET drive circuit to the traditional boost architecture, energy is extracted from the main power node and the drive signal output by the power management chip is amplified, enhancing the overall drive capability. This effectively solves the problem of increased drive current demand caused by increased junction capacitance in multi-MOSFET parallel applications, and avoids overheating and losses of the chip and MOSFET caused by insufficient direct drive from the power management chip. At the same time, by providing a stable and amplified gate drive voltage, the consistency of MOSFET switching action is optimized, current waveform distortion is reduced, and the total harmonic distortion (THD) performance of the system is improved. Compared with the traditional solution of replacing with a high-drive-capability chip or using expensive low-resistance MOSFETs, this invention achieves improved drive capability at a lower cost.

[0015] Furthermore, this invention converts the DRAIN voltage change into a drive current through a first capacitor, which is then used by a first transistor to amplify the chip signal and drive a parallel MOSFET, protecting the chip from overheating and reducing MOSFET switching losses. A second diode clamps the gate voltage to provide overvoltage protection, while a third diode ensures unidirectional drive current flow, improving drive reliability. A compensation resistor replenishes energy from the high-voltage output to smooth the drive voltage, and a current-limiting resistor network clamps transient inrush currents. A second capacitor stores energy to stabilize and smooth the drive voltage, while a first resistor suppresses current surges, collectively reducing MOSFET losses and improving output THD characteristics. A fourth diode accelerates MOSFET turn-off to reduce losses, and a second resistor regulates the transistor drive current, synergistically improving switching response consistency. A voltage divider resistor network samples the output voltage, and a third capacitor filters noise to achieve stable overvoltage protection. A parallel sampling resistor group samples the current, distributing power and reducing temperature drift, while a seventh resistor isolates noise interference, ensuring constant current output and optimizing THD performance. A voltage divider between the eighth and ninth resistors and a fourth capacitor filter provide a clean operating voltage to the chip, ensuring stable output control accuracy and indirectly optimizing system THD performance.

[0016] In summary, this utility model solves the technical problems of low driving capability, high driving loss and heat generation, and high current harmonic distortion in existing LED boost drive circuits. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0018] Figure 1This is a circuit block diagram of an LED boost driver circuit according to the present invention.

[0019] Figure 2 This is a circuit diagram of the LED boost driver circuit of this utility model;

[0020] Figure 3 This is a circuit diagram of the power module of this utility model;

[0021] Figure 4 This is a circuit diagram of the boost control module and MOSFET drive circuit of this utility model.

[0022] In the attached diagram: 1-Power supply module, 2-Boost control module, 3-MOSFET driver circuit, 4-Output circuit.

[0023] The realization of the purpose, functional features and advantages of this utility model will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0024] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of the present utility model.

[0025] It should be noted that if the embodiments of this utility model involve directional indicators, such as up, down, left, right, front, back, etc., the directional indicators are only used to explain the relative positional relationship and movement of the components in a specific posture. If the specific posture changes, the directional indicators will also change accordingly.

[0026] Furthermore, if the embodiments of this utility model involve descriptions such as "first" or "second," these descriptions are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the technical solutions of the various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or impossible to implement, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection claimed by this utility model.

[0027] The main purpose of this invention is to solve the technical problems of low driving capability, high driving loss and heat generation, and high current harmonic distortion in existing LED boost drive circuits.

[0028] like Figures 1 to 4 As shown, this utility model proposes an LED boost driver circuit, including a power supply module 1, a boost control module 2, a MOSFET driver circuit 3, and an output circuit 4. The power supply module 1 converts AC mains power to DC power. The boost control module 2 includes a power management chip, a first inductor, a first diode, and at least one MOSFET. The first end of the first inductor is connected to the output terminal of the power supply module 1, and the second end is connected to the drain of the MOSFET and the anode of the first diode. The power management chip outputs a drive signal through its first control terminal to control the switching on and off of the MOSFET, driving the first inductor to perform boost conversion. The first input terminal of the MOSFET driver circuit 3 is connected to the second end of the first inductor to obtain driving energy, the second input terminal is connected to the first control terminal of the power management chip, and the output terminal is connected to the gate of the MOSFET. The input terminal of the output circuit 4 is connected to the cathode of the first diode, and the output terminal is connected to the LED load.

[0029] For details, see Figure 2 As shown, in this embodiment, power module 1 mainly includes a protection circuit, an EMC electromagnetic compatibility circuit, and a rectifier bridge BG1, which filters, protects, and rectifies the input AC mains power, ultimately providing a DC bus voltage at the output terminal. Boost control module 2 includes a power management chip U1, a first inductor L4, a first diode D3, and two parallel MOSFETs Q2 and Q3 forming a boost main power circuit. In this embodiment, the power management chip U1 is a BP2618. The first end of the first inductor L4 is connected to the output terminal of power module 1 to obtain the bus voltage, and the second end is connected to the anode of the first diode D3 and the drain of the two parallel MOSFETs Q2 and Q3. The cathode of the first diode D3 serves as the output point of the boosted voltage. Power management chip U1 outputs a drive signal through its first control terminal, GATE. The MOSFET driver circuit 3 has three ports: the first input is connected to the second terminal of the first inductor L4 (i.e., the DRAIN node in the boost circuit), the second input is connected to the GATE pin of the power management chip U1, and the output is connected to the gates of two parallel MOSFETs Q2 and Q3. The input of the output circuit 4 is connected to the cathode of the first diode D3 to receive the boosted DC voltage, and its output is connected to the LED load to provide constant current drive for the load.

[0030] The working process is as follows: The mains power is processed by power module 1 to obtain the bus DC voltage. When power management chip U1 outputs an enable signal from its GATE pin, this signal first acts on the MOSFET driver circuit 3. The MOSFET driver circuit 3 obtains energy from the second terminal of the first inductor L4 using its first input terminal, and through internal amplification, amplifies the GATE pin control signal into a sufficiently strong gate drive current, causing MOSFETs Q2 and Q3 to conduct. At this time, the bus voltage charges the first inductor L4 to store energy. When power management chip U1 outputs an disable signal from its GATE pin, the MOSFET driver circuit 3 causes MOSFETs Q2 and Q3 to turn off rapidly. The induced electromotive force generated by the sudden current change in the first inductor L4 is superimposed on the bus voltage, and the current flows through the first diode D3 to supply power to the output circuit 4 and the LED load, achieving voltage boost. Power management chip U1 continuously adjusts the duty cycle of its GATE pin output signal according to the system state to maintain a stable boost output and perform constant current control on the LED load.

[0031] Understandably, this embodiment enhances the driving capability by setting up an independent MOSFET driving circuit 3, which can obtain energy from the boost main power node (the second end of the first inductor L4) and amplify the weak driving signal from the power management chip U1. Especially in high-power applications where multiple MOSFETs Q2 / Q3 connected in parallel (with large equivalent input junction capacitances) need to be driven, it effectively solves the problem of insufficient driving capability that may exist in the traditional solution where the power management chip U1 directly drives the MOSFETs. This avoids the resulting insufficient driving of the power management chip U1 and MOSFETs Q2 / Q3, excessive heat generation, and potential current harmonic distortion (THD) degradation. At the same time, in terms of basic implementation structure, this solution avoids the cost requirement of replacing the power management chip with a higher driving specification or selecting expensive CoolMOS transistors with lower internal resistance to improve driving capability, significantly reducing the overall system cost.

[0032] Based on the above technical solutions, those skilled in the art can make corresponding equivalent improvements according to the application scenario. For example, in the MOS transistor drive circuit, a MOSFET device can be used to replace the first transistor Q1 to realize the driving function of switching amplification; or different types of diodes or capacitors can be selected under the premise of meeting the voltage and current specifications to adapt to different cost or performance requirements.

[0033] Preferably, the MOS transistor driving circuit 3 includes a first capacitor and a first transistor; the first terminal of the first capacitor is connected to the second terminal of the first inductor; the base of the first transistor is connected to the first control terminal of the power management chip, the collector is connected to the second terminal of the first capacitor, and the emitter is connected to the gate of the MOS transistor.

[0034] For details, see Figure 2 and Figure 4As shown, in this embodiment, the MOSFET driving circuit 3 includes a first capacitor C7 and a first transistor Q1. The first terminal of the first capacitor C7 is connected to the second terminal of the first inductor L4 in the boost control module 2, i.e., the DRAIN power node, to obtain the changing voltage signal from this node. The base of the first transistor Q1 is connected to the first control terminal GATE of the power management chip U1 to receive the drive control signal output by the chip. The collector of the first transistor Q1 is connected to the second terminal of the first capacitor C7, and the emitter is connected to the gates of the parallel-connected MOSFETs Q2 and Q3, responsible for transmitting the amplified drive current to the gates.

[0035] Understandably, this embodiment utilizes the first capacitor C7 located between the DRAIN node and the collector of the first transistor Q1 to convert the voltage change dv / dt of the DRAIN node into current (i = C7 * dv / dt), providing a basis for energy conversion in the drive stage. This current provides the main operating current source for the first transistor Q1, enabling it to effectively amplify the weak drive signal output from the GATE pin of the power management chip U1, enhancing the overall drive capability. This allows a single management chip U1 with conventional drive capability to reliably drive two (or more) parallel MOS transistors, thereby solving the problem of increased total gate equivalent capacitance caused by multiple MOS transistors in parallel. This prevents the power management chip U1 from overheating due to insufficient drive and reduces the switching losses of the MOS transistors themselves.

[0036] Based on the above technical solutions, those skilled in the art can make corresponding equivalent improvements according to the application scenario. For example, under the premise of meeting the requirements of switching speed and drive current capability, an enhanced MOSFET can be used to replace the first transistor Q1 to construct the drive amplification stage; or the capacitance value of the first capacitor C7 can be finely adjusted according to the requirements of start-up speed, turn-off speed and power consumption in actual applications.

[0037] Preferably, the MOS transistor driving circuit 3 further includes a second diode and a third diode; the cathode of the second diode is connected to the second terminal of the first capacitor, and the anode is grounded; the anode of the third diode is connected to the second terminal of the first capacitor, and the cathode is connected to the collector of the first transistor.

[0038] For details, see Figure 2 and Figure 4 As shown, in this embodiment, the MOS transistor driving circuit 3 also includes a second diode ZD1 and a third diode D2; the cathode of the second diode ZD1 is connected to the second terminal of the first capacitor C7, and the anode is grounded; the anode of the third diode D2 is also connected to the second terminal of the first capacitor C7, and the cathode is connected to the collector of the first transistor Q1.

[0039] Understandably, this embodiment significantly improves the reliability and performance of the drive circuit by introducing a second diode ZD1 and a third diode D2. The second diode ZD1, acting as a Zener diode, has its cathode connected between the second terminal of the first capacitor C7 and ground, effectively clamping the voltage at this node and ensuring it does not exceed the maximum safe voltage Vgs(max) that the gate and source of MOSFETs Q2 and Q3 can withstand, thus reliably protecting the MOSFET gate from overvoltage breakdown. Simultaneously, the third diode D2, as a unidirectional conducting element, ensures that the drive current can only flow from the first capacitor C7 to the collector of the first transistor Q1, preventing reverse backflow of drive energy or abnormal discharge paths, thereby maintaining drive voltage stability and response speed during the MOSFET turn-off phase. The synergistic effect of these two diodes improves the operational reliability of the drive circuit, especially reducing drive capability fluctuations caused by voltage dips in high-current switching scenarios, and substantially contributing to optimizing the system's THD performance.

[0040] Based on the above technical solutions, those skilled in the art can make corresponding equivalent improvements according to the application scenario. For example, they can replace the second diode ZD1 with a Zener diode of different voltage regulation value to adapt to the Vgs withstand voltage specifications of different MOSFETs; or replace the third diode D2 with a Schottky diode to reduce the on-state voltage drop; or adjust the package power specification of the second diode ZD1 in combination with heat dissipation requirements to adapt to high-density or high ambient temperature application scenarios while ensuring equivalent function.

[0041] Preferably, the MOS transistor driving circuit 3 further includes a compensation resistor network; the first end of the compensation resistor network is connected to the cathode of the first diode, and the second end is connected to the cathode of the third diode.

[0042] For details, see Figure 2 and Figure 4 As shown, in this embodiment, the compensation resistor network of the MOS transistor drive circuit 3 includes resistors R13 and R14; the first end of resistor R13 is connected to the cathode of the third diode D2, and the second end is connected to the first end of resistor R14; the second end of resistor R14 is connected to the cathode of the first diode D3; this compensation resistor network is used to provide an auxiliary energy replenishment path for the MOS transistor drive circuit 3.

[0043] Understandably, this embodiment actively injects current from the boosted high-voltage output terminal to the energy storage capacitor C9 of the driver stage through a compensation resistor network. This effectively reduces the voltage ripple across the second capacitor C9, especially under heavy loads or transient conditions, ensuring that the drive voltage applied to the gates of MOSFETs Q2 and Q3 maintains a stable amplitude. The stability of the drive voltage ensures the consistency of the MOSFET switching response, avoiding switching delays or changes in on-resistance caused by drive voltage fluctuations. This reduces current distortion during the switching process from the source, thereby effectively optimizing the system's total harmonic distortion (THD) performance.

[0044] Based on the above technical solutions, those skilled in the art can make corresponding equivalent improvements according to the application scenario. For example, they can adjust the number and value combination of resistors in the compensation resistor network to meet different voltage compensation requirements; or arrange multiple resistors in parallel or series-parallel hybrid layout to achieve specific resistance values ​​and power distribution; or use chip array resistors to replace discrete resistors to optimize the space layout and improve production compatibility while maintaining the equivalent current compensation function.

[0045] Preferably, the MOS transistor driving circuit 3 further includes a current-limiting resistor network; the first end of the current-limiting resistor network is connected to the second end of the first capacitor, and the second end is connected to the cathode of the third diode.

[0046] For details, see Figure 2 and Figure 4 As shown, in this embodiment, the current-limiting resistor network includes resistors R23 and R24 connected in parallel; the first end of resistor R23 and the first end of resistor R24 ​​are connected to the second end of the first capacitor C7; the second end of resistor R23 and the second end of resistor R24 ​​are connected to the anode of the third diode D2.

[0047] Understandably, this embodiment uses a current-limiting resistor network to suppress the surge current intensity generated by the first capacitor C7 during the switching transients of MOSFETs Q2 and Q3. When the DRAIN node voltage of the MOSFET changes abruptly, the instantaneous large current generated by the first capacitor C7 due to the dv / dt effect is limited within a safe range by R23 / R24, preventing the first transistor Q1 from being damaged by overcurrent. This current-limiting design, while ensuring the reliability of the drive circuit, reduces oscillations during the drive voltage build-up process by stabilizing the charging process of C7 to the energy storage capacitor C9, thereby improving the consistency of MOSFET switching operation and playing a positive role in reducing switching losses and optimizing EMI noise.

[0048] Based on the above technical solutions, those skilled in the art can make corresponding equivalent improvements according to the application scenario. For example, they can replace the parallel R23 and R24 with a single high-power resistor to simplify the layout; or adjust the resistance value or power specification of the current-limiting resistor according to the actual drive current requirements; or select an adjustable resistor to achieve dynamic optimization of the drive characteristics; or use current-limiting devices with different processes such as carbon film resistors or metal film resistors to adapt to cost or temperature characteristics requirements while meeting the current limiting function.

[0049] Preferably, the MOS transistor driving circuit 3 further includes a second capacitor and a first resistor; the first end of the second capacitor is connected to the cathode of the third diode, and the second end is grounded; the first end of the first resistor is connected to the cathode of the third diode, and the second end is connected to the collector of the first transistor.

[0050] For details, see Figure 2 and Figure 4As shown, in this embodiment, the MOS transistor driving circuit 3 includes a second capacitor C9 and a first resistor R9. The first end of the second capacitor C9 is connected to the cathode of the third diode D2, and the second end is grounded; at the same time, the first end of the first resistor R9 is connected to the cathode of the third diode D2, and the second end is connected to the collector of the first transistor Q1.

[0051] Understandably, in this embodiment, the second capacitor C9 provides stable energy storage support for the drive stage, absorbing transients in the drive current and smoothing the gate drive voltage. The first resistor R9 limits the current path from the third diode D2 to the collector of the first transistor Q1, preventing excessive current surges to Q1 caused by the charge in C9 during switching. The synergistic effect of these two components enhances the stability and anti-interference capability of the drive voltage, ensuring that the gate voltages of MOSFETs Q2 and Q3 remain clean and low-ripple during switching operations. This reduces the volatility of MOSFET switching and conduction losses, optimizes system efficiency, and improves the total current distortion (THD).

[0052] Based on the above technical solution, those skilled in the art can make corresponding equivalent improvements according to the application scenario. For example, they can adjust the capacitance value of the second capacitor C9 to meet the energy storage requirements under different drive currents or switching frequencies; or select capacitors of different materials or packages (such as ceramic capacitors to replace electrolytic capacitors) to optimize high-frequency characteristics or space layout; or adjust the resistance value or power level of the first resistor R9 according to the actual drive current.

[0053] Preferably, the MOS transistor driving circuit 3 further includes a fourth diode and a second resistor; the anode of the fourth diode is connected to the emitter of the first transistor, and the cathode is connected to the base of the first transistor; the first end of the second resistor is connected to the first control terminal of the power management chip, and the second end is connected to the base of the first transistor.

[0054] For details, see Figure 2 and Figure 4 As shown, in this embodiment, the MOS transistor driving circuit 3 includes a fourth diode D1 and a second resistor R8. The anode of the fourth diode D1 is connected to the emitter of the first transistor Q1, and the cathode is connected to the base of the first transistor Q1; meanwhile, the first end of the second resistor R8 is connected to the first control terminal GATE pin of the power management chip U1, and the second end is connected to the base of the first transistor Q1.

[0055] Understandably, this embodiment constructs a fast discharge channel for the gate charge of the MOSFET using the fourth diode D1. When the GATE pin of the power management chip U1 outputs a turn-off signal, the fourth diode D1 conducts, rapidly pulling down the residual charge at the base of the first transistor Q1, forcing Q1 into a deep cutoff state, and causing the gate charge of MOSFETs Q2 and Q3 to be rapidly released through the emitter of Q1. This active accelerated turn-off mechanism can shorten the turn-off delay time of the MOSFET, reduce current loss during the switching process, and effectively suppress MOSFET heating and switching noise. At the same time, the second resistor R8, as the base current limiting resistor, ensures that the drive current of the GATE pin of U1 is safe and controllable, and avoids the problem of deep saturation of transistor Q1 due to overdrive, further improving the consistency of switching response.

[0056] Based on the above technical solutions, those skilled in the art can make corresponding equivalent improvements according to the application scenario. For example, they can replace the fourth diode D1 with a Schottky diode that has a faster switching speed to optimize the turn-off performance; or adjust the resistance value of the second resistor R8 according to the characteristics of the transistor to balance the switching speed and drive loss; or use a small resistor in series and parallel with the fourth diode D1 in high voltage or high frequency scenarios to suppress oscillation; or use a transistor module with integrated base discharge function to replace the discrete component combination to improve the system integration while maintaining the fast turn-off characteristics.

[0057] Preferably, the boost control module 2 further includes a voltage divider resistor network and a third capacitor; the first end of the voltage divider resistor network is connected to the cathode of the first diode, and the second end is grounded; the first input terminal of the power management chip is connected to the voltage sampling node of the voltage divider resistor network; the first end of the third capacitor is connected to the voltage sampling node, and the second end is grounded.

[0058] For details, see Figure 2 and Figure 4 As shown, in this embodiment, the boost control module 2 includes a voltage divider resistor network and a third capacitor C10. The first end of the voltage divider resistor network is connected to the cathode of the first diode D3, and the second end is grounded. Specifically, it is composed of resistors R17, R18, R19, and R5 connected in series. The first end of R17 is connected to the cathode of D3, the second end of R17 is connected to the first end of R18, the second end of R18 is connected to the first end of R19, the second end of R19 is connected to the first end of R5, and the second end of R5 is grounded. The voltage divider sampling node is located between R19 and R5 and is connected to the first input terminal ROVP of the power management chip U1 via a wire. The first end of the third capacitor C10 is connected in parallel to the sampling node, and the second end is directly grounded, forming a filter circuit.

[0059] Understandably, this embodiment uses a voltage divider resistor network to acquire the boost output voltage signal in real time. After being attenuated by resistors R17, R18, R19, and R5, the signal is sent to the ROVP pin of the power management chip U1 to achieve overvoltage protection threshold detection. The third capacitor C10 filters out high-frequency noise and voltage spikes at the sampling node, ensuring that the voltage feedback signal received by the chip is stable and reliable. This structure effectively prevents damage to circuit components under output overvoltage conditions and avoids false protection triggering caused by sampling noise interference, effectively improving system safety and operational stability. Secondly, accurate monitoring of the output voltage can ensure the constant current driving accuracy of the LED load, which can reduce output current fluctuations and optimize overall THD performance.

[0060] Based on the above technical solutions, those skilled in the art can make corresponding equivalent improvements according to the application scenario. For example, they can adjust the number or resistance ratio of resistors in the voltage divider network to adapt to different overvoltage protection threshold settings; or select resistors with different temperature coefficients to optimize the sampling accuracy in high-temperature environments; or change the material of the third capacitor C10 according to the noise spectrum characteristics (such as replacing the film capacitor with a ceramic capacitor) to adapt to different anti-interference requirements while maintaining the overvoltage protection function.

[0061] Preferably, the boost control module 2 further includes a sampling resistor group consisting of a third resistor, a fourth resistor, a fifth resistor, and a sixth resistor connected in parallel, and a seventh resistor; the first common terminal of the sampling resistor group is connected to the source of the MOSFET, and the second common terminal is grounded; the first terminal of the seventh resistor is connected to the second input terminal of the power management chip, and the second terminal is connected to the first common terminal of the sampling resistor group.

[0062] For details, see Figure 2 and Figure 4 As shown, in this embodiment, the boost control module 2 includes a sampling resistor group consisting of four parallel resistors and a seventh resistor R21 connected in series. Specifically, the sampling resistor group consists of a third resistor RS1, a fourth resistor RS2, a fifth resistor RS3, and a sixth resistor RS4 connected in parallel. Its first common terminal is connected to the source of MOSFETs Q2 and Q3, and its second common terminal is grounded. The first terminal of the seventh resistor R21 is connected to the second input terminal CS of the power management chip U1, and its second terminal is connected to the first common terminal of the sampling resistor group, forming a current detection signal transmission link.

[0063] Understandably, this embodiment uses a parallel multi-resistor structure to evenly distribute the total operating current flowing through the MOSFET, reducing the power load and temperature rise of a single sampling resistor. The seventh resistor, R21, serves as a signal isolation resistor, accurately transmitting the current sampling signal to the CS pin of chip U1 while suppressing the impact of high-frequency interference on detection accuracy. Balancing sampling accuracy and thermal stability under high-power output conditions ensures that the power management chip U1 precisely controls the switching action according to the real-time load current, thereby maintaining a constant current output from the LED load and optimizing the purity of the output current waveform and total harmonic distortion (THD) performance.

[0064] Based on the above technical solutions, those skilled in the art can make corresponding equivalent improvements according to the application scenario. For example, they can increase or decrease the number of parallel resistors according to the current range (such as two resistors or six resistors in parallel); or select different resistance value combinations to optimize the sampling resolution; or use a surface-mount resistor array to integrate the sampling group in a space-constrained design; or adjust the resistance value or material of the seventh resistor R21 to balance signal attenuation and noise reduction requirements, so as to adapt to diverse power levels and cost targets while maintaining the core function of current sampling.

[0065] Preferably, the boost control module 2 further includes a fourth capacitor, an eighth resistor, and a ninth resistor; the first end of the eighth resistor is connected to the cathode of the first diode, and the second end is connected to the first end of the ninth resistor; the second end of the ninth resistor and the first end of the fourth capacitor are connected to the third input terminal of the power management chip, and the second end of the fourth capacitor is grounded.

[0066] For details, see Figure 2 and Figure 4 As shown, in this embodiment, the boost control module 2 includes a fourth capacitor C1, an eighth resistor R7, and a ninth resistor R6. The first end of the eighth resistor R7 is connected to the cathode of the first diode D3, and the second end is connected to the first end of the ninth resistor R6; the second end of the ninth resistor R6 and the first end of the fourth capacitor C1 are connected to the third input terminal HV of the power management chip U1, and the second end of the fourth capacitor C1 is grounded.

[0067] Understandably, this embodiment uses the eighth resistor R7 and the ninth resistor R6 to perform a stepped attenuation of the boost output high voltage, providing a safe operating voltage for the HV pin of the power management chip U1. Simultaneously, the fourth capacitor C1 stores and filters the energy of the voltage after voltage division, preventing direct high-voltage surges from damaging the chip's internal circuitry and improving the stability and anti-interference capability of the power management chip's operating voltage. Under clean power supply, the power management chip can precisely control the drive timing, improving boost conversion efficiency and output constant current accuracy, thereby optimizing the smoothness of the output current waveform, reducing high-frequency harmonic components, improving the overall THD performance of the system, and extending the chip's lifespan.

[0068] Based on the above technical solutions, those skilled in the art can make corresponding equivalent improvements according to the application scenario. For example, they can adjust the resistance ratio of the eighth resistor R7 and the ninth resistor R6 to adapt to different output voltage ranges; or use thick-film integrated resistors to replace discrete components in space-constrained designs; or connect multiple fourth capacitors C1 in parallel to enhance the high-frequency filtering effect, so as to meet the requirements of differentiated applications for withstand voltage, ripple and size while maintaining the core function of voltage divider power supply.

[0069] For details, see Figure 3 As shown, in this embodiment, the power module 1 includes a protection circuit, an EMC electromagnetic compatibility circuit, and a rectifier bridge BG1. The protection circuit consists of a fuse F1, varistors RV1 / RV2, and a thermistor NTC1: the mains line L is connected to the first terminal of the varistor RV1 via the fuse F1, and the fuse F1 is connected in series to pin 1 of the inductor L1; the mains line N is connected to the second terminal of the varistor RV1 and pin 2 of the inductor L1 via the thermistor NTC1; the first terminal of the varistor RV2 is connected to the rectified DC bus, and the second terminal is grounded, forming a two-stage overvoltage discharge protection. The electromagnetic compatibility circuit includes a two-stage filtering structure: the pre-bridge filter consists of inductors L1 and L2, anti-interference resistors R1-R3, X capacitors CX1 / CX2, and Y capacitors CY1 / CY2. Pin 3 of inductor L1 is connected to capacitors CY1 and CX1, resistor R1, and pin 1 of inductor L2. Pin 4 of inductor L1 is connected to capacitors CY2 and CX2, resistor R3, and pin 2 of inductor L2. The midpoints of capacitors CY1 and CY2 are interconnected. Resistors R1-R3 are connected in series across the input terminal of inductor L2, effectively suppressing differential / common-mode noise. The post-bridge filter includes inductor L3, capacitors C2 / C3 / C8, and varistor RV2. The AC terminal of rectifier bridge BG1 is connected to pins 3 / 4 of inductor L2. The DC positive output terminal is connected to the bus via inductor L3, current-limiting resistor R4, and filter capacitor C2. The negative output terminal is grounded. Capacitors C3 and C8, along with varistor RV2, are connected in parallel to ground at the output terminal of inductor L3, forming a filtering network.

[0070] Understandably, this embodiment achieves high robustness of the power supply through a multi-stage collaborative design. In the protection circuit, fuse F1 provides overcurrent protection, thermistor NTC1 suppresses surge current, and varistors RV1 / RV2 form a bidirectional overvoltage absorption barrier, significantly improving the withstand capability against lightning strikes and power grid fluctuations. In the electromagnetic compatibility circuit, the L1 / L2 inductors and CX / CY capacitor group before the bridge filter conducted interference, while the L3 inductor and C2 / C3 / C8 capacitor group after the bridge suppress DC ripple and high-frequency noise. This composite structure ensures both purity and stability of the rectified output bus voltage, providing a low-noise, highly reliable power foundation for the downstream boost control module, while fully meeting international electromagnetic compatibility standards.

[0071] Compared with the prior art, the beneficial effects of this utility model include at least the following:

[0072] This invention proposes an LED boost drive circuit. By independently adding a MOSFET drive circuit to the traditional boost architecture, energy is extracted from the main power node and the drive signal output by the power management chip is amplified, enhancing the overall drive capability. This effectively solves the problem of increased drive current demand caused by increased junction capacitance in multi-MOSFET parallel applications, and avoids overheating and losses of the chip and MOSFET caused by insufficient direct drive from the power management chip. At the same time, by providing a stable and amplified gate drive voltage, the consistency of MOSFET switching action is optimized, current waveform distortion is reduced, and the total harmonic distortion (THD) performance of the system is improved. Compared with the traditional solution of replacing with a high-drive-capability chip or using expensive low-resistance MOSFETs, this invention achieves improved drive capability at a lower cost.

[0073] Furthermore, this invention converts the DRAIN voltage change into a drive current through a first capacitor, which is then used by a first transistor to amplify the chip signal and drive a parallel MOSFET, protecting the chip from overheating and reducing MOSFET switching losses. A second diode clamps the gate voltage to provide overvoltage protection, while a third diode ensures unidirectional drive current flow, improving drive reliability. A compensation resistor replenishes energy from the high-voltage output to smooth the drive voltage, and a current-limiting resistor network clamps transient inrush currents. A second capacitor stores energy to stabilize and smooth the drive voltage, while a first resistor suppresses current surges, collectively reducing MOSFET losses and improving output THD characteristics. A fourth diode accelerates MOSFET turn-off to reduce losses, and a second resistor regulates the transistor drive current, synergistically improving switching response consistency. A voltage divider resistor network samples the output voltage, and a third capacitor filters noise to achieve stable overvoltage protection. A parallel sampling resistor group samples the current, distributing power and reducing temperature drift, while a seventh resistor isolates noise interference, ensuring constant current output and optimizing THD performance. A voltage divider between the eighth and ninth resistors and a fourth capacitor filter provide a clean operating voltage to the chip, ensuring stable output control accuracy and indirectly optimizing system THD performance.

[0074] In summary, this utility model solves the technical problems of low driving capability, high driving loss and heat generation, and high current harmonic distortion in existing LED boost drive circuits.

[0075] The above description is only a preferred embodiment of the present utility model and does not limit the patent scope of the present utility model. All equivalent structural transformations made under the inventive concept of the present utility model using the contents of the present utility model specification and drawings, or direct / indirect applications in other related technical fields, are included within the patent protection scope of the present utility model.

Claims

1. An LED boost driver circuit, characterized in that, include: Power module (1) is used to convert AC power to DC power; The boost control module (2) includes a power management chip, a first inductor, a first diode, and at least one MOSFET; the first end of the first inductor is connected to the output terminal of the power module (1), and the second end is connected to the drain of the MOSFET and the anode of the first diode; the power management chip outputs a drive signal through the first control terminal to control the switching of the MOSFET and drive the first inductor to perform boost conversion; The MOS transistor driving circuit (3) has a first input terminal connected to the second terminal of the first inductor to obtain driving energy, a second input terminal connected to the first control terminal of the power management chip, and an output terminal connected to the gate of the MOS transistor. The output circuit (4) has its input terminal connected to the cathode of the first diode and its output terminal connected to the LED load.

2. The LED boost driver circuit as described in claim 1, characterized in that, The MOS transistor driving circuit (3) includes a first capacitor and a first transistor; the first end of the first capacitor is connected to the second end of the first inductor; the base of the first transistor is connected to the first control terminal of the power management chip, the collector is connected to the second end of the first capacitor, and the emitter is connected to the gate of the MOS transistor.

3. The LED boost driver circuit as described in claim 2, characterized in that, The MOS transistor driving circuit (3) further includes a second diode and a third diode; the cathode of the second diode is connected to the second terminal of the first capacitor, and the anode is grounded; the anode of the third diode is connected to the second terminal of the first capacitor, and the cathode is connected to the collector of the first transistor.

4. The LED boost driver circuit as described in claim 3, characterized in that, The MOS transistor driving circuit (3) further includes a compensation resistor network; the first end of the compensation resistor network is connected to the cathode of the first diode, and the second end is connected to the cathode of the third diode.

5. The LED boost driver circuit as described in claim 3, characterized in that, The MOS transistor driving circuit (3) further includes a current-limiting resistor network; the first end of the current-limiting resistor network is connected to the second end of the first capacitor, and the second end is connected to the cathode of the third diode.

6. The LED boost driver circuit as described in claim 3, characterized in that, The MOS transistor driving circuit (3) further includes a second capacitor and a first resistor; the first end of the second capacitor is connected to the cathode of the third diode, and the second end is grounded; the first end of the first resistor is connected to the cathode of the third diode, and the second end is connected to the collector of the first transistor.

7. The LED boost driver circuit as described in claim 2, characterized in that, The MOS transistor driving circuit (3) further includes a fourth diode and a second resistor; the anode of the fourth diode is connected to the emitter of the first transistor, and the cathode is connected to the base of the first transistor; the first end of the second resistor is connected to the first control terminal of the power management chip, and the second end is connected to the base of the first transistor.

8. The LED boost driver circuit according to any one of claims 1 to 7, characterized in that, The boost control module (2) also includes a voltage divider resistor network and a third capacitor; the first end of the voltage divider resistor network is connected to the cathode of the first diode, and the second end is grounded; the first input terminal of the power management chip is connected to the voltage sampling node of the voltage divider resistor network; the first end of the third capacitor is connected to the voltage sampling node, and the second end is grounded.

9. The LED boost driver circuit according to any one of claims 1 to 7, characterized in that, The boost control module (2) also includes a sampling resistor group consisting of a third resistor, a fourth resistor, a fifth resistor, and a sixth resistor connected in parallel, and a seventh resistor; the first common terminal of the sampling resistor group is connected to the source of the MOS transistor, and the second common terminal is grounded; the first terminal of the seventh resistor is connected to the second input terminal of the power management chip, and the second terminal is connected to the first common terminal of the sampling resistor group.

10. The LED boost driver circuit according to any one of claims 1 to 7, characterized in that, The boost control module (2) also includes a fourth capacitor, an eighth resistor, and a ninth resistor; the first end of the eighth resistor is connected to the cathode of the first diode, and the second end is connected to the first end of the ninth resistor; the second end of the ninth resistor and the first end of the fourth capacitor are connected to the third input terminal of the power management chip, and the second end of the fourth capacitor is grounded.

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