A frequency-locked loop structure suitable for unified S-band TT&C signals
By using a frequency-locked loop structure with a carrier digital oscillator and a subcarrier digital oscillator, combined with filtering and signal processing techniques, the problem of carrier and subcarrier synchronization locking of USB measurement and control signals was solved, enabling continuous tracking under unknown modulation parameters and improving the stability of signal reception.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- SHAANXI IND VOCATIONAL & TECH COLLEGE
- Filing Date
- 2025-09-08
- Publication Date
- 2026-07-14
Smart Images
Figure CN224503351U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the structure of a signal frequency tracking device (i.e., a frequency locking loop), and more particularly to a frequency locking loop structure suitable for unified S-band measurement and control signals. Background Technology
[0002] Currently, mainstream signal receiving and tracking equipment is mainly suitable for navigation signals broadcast by global satellite navigation systems such as GPS, BeiDou, GLONASS, and Galileo. In navigation signal receivers, the commonly used carrier tracking loop structure is the Costas loop. However, the Costas loop cannot be directly applied to USB telemetry and control signals because USB telemetry and control signals use subcarrier modulation, resulting in spectral separation. The specific signal form of USB telemetry and control signals varies depending on the mission.
[0003] Currently, USB telemetry and control signals employ subcarrier modulation. The crucial remote control / telemetry information is typically modulated onto the subcarrier using BPSK. For the receiver to acquire useful information, it must simultaneously and accurately obtain both the carrier and subcarrier frequencies to aid in demodulation. For phase-modulated signals like BPSK or QPSK, the length of data entering the phase-locked loop (PLL) each time cannot exceed the sampling rate / data rate; otherwise, phase transitions may occur within a certain integration time. These phase transitions lead to frequent loss of lock in the PLL, preventing the receiver from tracking the correct frequency in real time. Therefore, when receiving and tracking USB telemetry and control signals, it is necessary to consider the synchronous locking of the carrier and subcarrier frequencies. Improving the synchronous locking of the carrier and subcarrier frequencies is a problem that requires further research. Utility Model Content
[0004] The purpose of this invention is to provide a frequency-locked loop structure suitable for unified S-band measurement and control signals, including USB measurement and control signals with telemetry signals. It provides a synchronous locking loop structure for the carrier frequency and subcarrier frequency of the USB measurement and control signals, which can effectively achieve continuous tracking of the carrier frequency and subcarrier frequency simultaneously when there is no prior knowledge of the modulation parameters of the USB measurement and control signals. Compared with the traditional Costas loop, it can overcome the loss of lock-in caused by symbol flipping when the code rate of the modulation signal is unknown.
[0005] To achieve the above objectives, the technical solution adopted by this utility model is as follows: a frequency-locked loop structure suitable for unified S-band measurement and control signals, including a frequency-locked loop with a carrier digital oscillator and a frequency-locked loop with a subcarrier digital oscillator, wherein a bandpass filter is connected to the front end of both the frequency-locked loop with the carrier digital oscillator and the frequency-locked loop with the subcarrier digital oscillator.
[0006] The carrier digital oscillator is connected to the first mixer, the first mixer is connected to the first low-pass filter, and the first low-pass filter is connected to the first phase detector.
[0007] The subcarrier digital oscillator is connected to a second mixer, which is connected to a second low-pass filter. The second low-pass filter is connected in sequence to a squarer, a second phase detector, and a divider.
[0008] Furthermore, both the carrier digital oscillator and the subcarrier digital oscillator generate two orthogonal carriers that enter the first mixer and the second mixer respectively.
[0009] Furthermore, there are two of each of the first and second mixers.
[0010] Furthermore, there are two low-pass filters, one first and one second.
[0011] Furthermore, the first phase detector is connected to a first loop filter, and the first loop filter is connected to a carrier digital oscillator to form a frequency-locked loop.
[0012] Furthermore, the divider is connected to a second loop filter, which is connected to a subcarrier digital oscillator to form a frequency-locked loop.
[0013] The beneficial effects of this invention are as follows: For USB measurement and control signals that require simultaneous tracking of both the carrier frequency and the subcarrier frequency, a set of bandpass filters is first used to perform frequency domain filtering on the corresponding components. Then, the time domain signal corresponding to the filtered result is used as the input of the two-channel frequency-locked loop of this invention. This can effectively achieve continuous tracking of both the carrier frequency and the subcarrier frequency even when there is no prior knowledge of the modulation parameters of the USB measurement and control signal.
[0014] To ensure that the phase-locked loop (PLL) is unaffected by the code rate when tracking the BPSK signal, after the input signal is mixed with a local carrier and low-pass filtered to obtain the baseband signal, the baseband signal is sequentially passed through a squarer, a second phase detector, and a divider. Compared with the traditional Costas loop, this can overcome the loss of lock-up caused by symbol flipping when the code rate of the modulation signal is unknown. In addition, the simultaneous tracking of the two loop structures also helps to cross-compare and verify between the two loop structures. Attached Figure Description
[0015] Figure 1 This is a flowchart illustrating the principle of the frequency-locked loop structure applicable to unified S-band measurement and control signals. Detailed Implementation
[0016] To make the technical means, creative features, objectives and effects of this utility model easier to understand, the present utility model will be further described below with reference to specific illustrations.
[0017] like Figure 1 As shown, a frequency-locked loop structure suitable for unified S-band measurement and control signals includes a frequency-locked loop with a carrier digital oscillator and a frequency-locked loop with a subcarrier digital oscillator. Both the frequency-locked loop with the carrier digital oscillator and the frequency-locked loop with the subcarrier digital oscillator are connected to a bandpass filter at their front ends.
[0018] The carrier digital oscillator is connected to the first mixer, the first mixer is connected to the first low-pass filter, and the first low-pass filter is connected to the first phase detector.
[0019] The subcarrier digital oscillator is connected to a second mixer, which is connected to a second low-pass filter. The second low-pass filter is connected in sequence to a squarer, a second phase detector, and a divider.
[0020] Both the carrier digital oscillator and the subcarrier digital oscillator generate two orthogonal carriers that enter the first mixer and the second mixer respectively. Therefore, there are two first mixers and two second mixers, and two first low-pass filters and two second low-pass filters.
[0021] The first phase detector is connected to the first loop filter, and the first loop filter is connected to the carrier digital oscillator to form a frequency-locked loop.
[0022] The divider is connected to a second loop filter, which in turn is connected to a subcarrier digital oscillator to form a frequency-locked loop.
[0023] The specific working process of this utility model's frequency-locked loop structure for unified S-band measurement and control signals is as follows: First, a set of bandpass filters is used to perform frequency domain filtering on the corresponding components. Then, the time domain signal corresponding to the filtered result is used as the input of the two-way frequency-locked loop of this utility model. It should be noted that... Figure 1 In this architecture, the carrier digital oscillator and the subcarrier digital oscillator need to operate simultaneously under the same clock frequency reference. The subcarrier tracking loop... For BPSK signals, the acquired signals, in addition to noise, contain unknown random interference, and there will be deviations in estimating the code rate of the BPSK signal. This causes the data length entering the phase-locked loop each time to not equal the sampling rate / code rate, potentially capturing edge transitions. To ensure that the phase-locked loop is unaffected by the code rate when tracking the BPSK signal, after the input signal is mixed with a local carrier and low-pass filtered to obtain the baseband signal, the baseband signal is first squared, then its phase is estimated, and finally the phase result is divided by 2. This process eliminates the influence of the information data.
Claims
1. A frequency-locked loop structure suitable for unified S-band measurement and control signals, characterized in that, It includes a frequency-locked loop with a carrier digital oscillator and a frequency-locked loop with a subcarrier digital oscillator, and a bandpass filter is connected to the front end of both the frequency-locked loop with the carrier digital oscillator and the frequency-locked loop with the subcarrier digital oscillator. The carrier digital oscillator is connected to the first mixer, the first mixer is connected to the first low-pass filter, and the first low-pass filter is connected to the first phase detector. The subcarrier digital oscillator is connected to a second mixer, which is connected to a second low-pass filter. The second low-pass filter is connected in sequence to a squarer, a second phase detector, and a divider.
2. The frequency-locked loop structure suitable for unified S-band measurement and control signals according to claim 1, characterized in that, Both the carrier digital oscillator and the subcarrier digital oscillator generate two orthogonal carriers, which are respectively fed into the first mixer and the second mixer.
3. The frequency-locked loop structure suitable for unified S-band measurement and control signals according to claim 1, characterized in that, There are two mixers, the first mixer and the second mixer.
4. A frequency-locked loop structure suitable for unified S-band measurement and control signals according to claim 1, characterized in that, There are two low-pass filters, the first and the second.
5. A frequency-locked loop structure suitable for unified S-band measurement and control signals according to claim 1, characterized in that, The first phase detector is connected to the first loop filter, and the first loop filter is connected to the carrier digital oscillator to form a frequency-locked loop.
6. A frequency-locked loop structure suitable for unified S-band measurement and control signals according to claim 1, characterized in that, The divider is connected to a second loop filter, which in turn is connected to a subcarrier digital oscillator to form a frequency-locked loop.