Pad structure and LED display screen lamp panel

Abstract

The application provides a kind of pad structure and LED display screen lamp panel, pad structure includes circuit board and first exhaust hole and second exhaust hole on circuit board.The circuit board includes substrate layer, conductive layer and solder mask layer.The conductive layer is arranged on the surface of the substrate layer, and the solder mask layer is covered on the substrate layer and the conductive layer, and the ground pad and the peripheral pad are formed by selective windowing.The peripheral pad is arranged around the outer peripheral area of the ground pad.The first exhaust hole is arranged inside the ground pad, and the second exhaust hole is arranged between the ground pad and the peripheral pad.The first exhaust hole and the second exhaust hole are spaced apart in space, and both of them penetrate the thickness direction of the entire circuit board.The gas generated by the flux volatilization and the gas generated by the chemical reaction can be quickly discharged through the two exhaust holes, reducing the risk of gas accumulation, ensuring the reliable combination of solder and pad, and fundamentally avoiding the generation of welding defects such as floating high and false welding.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of pad structures, and more particularly to a pad structure and an LED display screen lamp panel. BACKGROUND

[0002] In the process of welding a square flat leadless package (QFN) chip, the solvent in the flux will volatilize quickly under the high-temperature environment of welding, and a certain amount of gas will also be generated by the chemical reaction occurring during the welding process. Due to the special structure of the QFN chip, the gap between the bottom of the chip and the printed circuit board (PCB) is small, and the flux is often wrapped in the gap between the chip and the PCB, forming a relatively closed space. In this case, the gas generated by volatilization and the gas generated by chemical reaction are difficult to find a smooth exhaust passage, resulting in the gas being forced to slowly discharge outward through the flux wrapped area. If the gas is not completely discharged in time during the welding process, the residual gas will accumulate in the narrow space between the chip and the PCB, forming a local high-pressure area. This gas accumulation phenomenon will hinder the full contact of the solder and the pad, thereby affecting the metal metallurgical bonding of the welding interface, and ultimately leading to welding defects such as chip floating or false welding, which seriously affects the reliability and service life of the product. CONTENT OF THE UTILITY MODEL

[0003] The application provides a pad structure and an LED display screen lamp panel to solve the technical problem of the welding defects such as floating or false welding that easily occur in the welding of a square flat leadless package chip in the prior art.

[0004] To achieve the above-mentioned purpose, the technical scheme adopted by the application is:

[0005] A pad structure is provided, comprising:

[0006] A circuit board comprising a substrate layer, a conductive layer, and a solder mask layer; the conductive layer is arranged on the substrate layer, and the solder mask layer is arranged on the substrate layer and the conductive layer; the solder mask layer has an opening on the conductive layer to form a ground pad and a peripheral pad, and the peripheral pad is arranged around the outer periphery of the ground pad;

[0007] A first exhaust hole is arranged in the ground pad;

[0008] A second exhaust hole is arranged between the ground pad and the peripheral pad, and is arranged in a spaced-apart manner with the first exhaust hole;

[0009] The first exhaust hole and the second exhaust hole both penetrate through the circuit board.

[0010] As a further improvement of the above technical scheme:

[0011] Optionally, the pad structure includes a printed solder layer applied to the ground pad and the peripheral pad, wherein the coating contour of the printed solder layer is smaller than the planar contour of the corresponding ground pad and the peripheral pad.

[0012] Optionally, the coating contour of the printed solder layer is spaced apart from the port contour of the first vent hole located on the ground pad.

[0013] Optionally, the distance between the coating contour of the printed solder layer and the port contour of the first vent hole ranges from 0.05mm to 0.2mm.

[0014] Optionally, the second vent hole is located on the outer periphery of the port on the solder resist layer, which is made of the solder resist layer material.

[0015] Optionally, the number of the second vent holes is at least two, and each second vent hole is arranged around the outer periphery of the grounding pad.

[0016] Optionally, the conductive layer is further provided with an organic coating layer, which is applied to the ground pad and the peripheral pad.

[0017] The beneficial effects of the pad structure provided in this application are as follows:

[0018] The pad structure provided in this application includes a circuit board and a first vent and a second vent disposed on the circuit board. The circuit board includes a substrate layer as a base support, a conductive layer for electrical connection, and a solder mask layer for protection. The conductive layer is disposed on the surface of the substrate layer, and the solder mask layer covers the substrate layer and the conductive layer, forming a ground pad and a peripheral pad through selective windowing. The peripheral pad is arranged around the outer periphery of the ground pad, forming a typical QFN chip soldering layout.

[0019] A first vent is located inside the grounding pad, and a second vent is located between the grounding pad and the outer pads. The first and second vents are spaced appropriately and both extend across the entire thickness of the circuit board. The first vent primarily vents gas from the central area of ​​the chip, while the second vent effectively guides gas from the chip's edges. During soldering, gases generated by flux evaporation and chemical reactions can be quickly expelled through these two vents, reducing the risk of gas accumulation and ensuring a reliable bond between the solder and the pads. This fundamentally prevents soldering defects such as solder float and cold solder joints.

[0020] This application also provides an LED display board, including a square flat leadless package chip and the above-mentioned pad structure. The electrodes of the square flat leadless package chip are in contact with the printed solder layer on the ground pad and the peripheral pad, respectively. The first vent is located within the projection range of the ground electrode of the square flat leadless package chip on the circuit board, and the second vent is located within the projection range of the square flat leadless package chip on the circuit board. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0022] Figure 1 A partially enlarged structural diagram of the pad structure provided in this application;

[0023] Figure 2 A partial cross-sectional view of the pad structure provided in this application. Figure 1 ;

[0024] Figure 3 A schematic diagram of the front view of the pad structure provided in this application;

[0025] Figure 4 A partial cross-sectional view of the pad structure provided in this application. Figure 2 ;

[0026] Figure 5 This is a partial cross-sectional structural diagram of the LED display panel provided in this application.

[0027] The following are the labeling elements in the figure:

[0028] 1. Circuit board; 11. Substrate layer;

[0029] 12. Conductive layer; 121. Grounding pad;

[0030] 122. Outer pads; 13. Solder mask layer;

[0031] 2. First vent; 3. Second vent;

[0032] 4. Printed solder layer; 5. Organic coating layer;

[0033] 6. Square flat leadless packaged chip. Detailed Implementation

[0034] The embodiments of this utility model are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this utility model, and should not be construed as limiting this utility model.

[0035] In the description of this utility model, it should be understood that the terms "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.

[0036] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this utility model, "a plurality of" means two or more, unless otherwise explicitly specified.

[0037] In this utility model, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model according to the specific circumstances.

[0038] Furthermore, the technical solutions of the various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such combination of technical solutions does not exist and is not within the scope of this utility model.

[0039] In subsequent descriptions, the direction closer to the operator is generally defined as the proximal end, and the direction farther from the operator is defined as the distal end.

[0040] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0041] To address soldering defects such as floating and cold solder joints caused by poor gas venting during the soldering process of square flat no-lead package chips, such as...Figure 1 and Figure 2 As shown, this application provides a pad structure, including a circuit board 1 and a first vent hole 2 and a second vent hole 3 disposed on the circuit board 1.

[0042] The circuit board 1 includes a substrate layer 11 as a basic support, a conductive layer 12 for electrical connection, and a solder mask layer 13 for protection. The conductive layer 12 is disposed on the surface of the substrate layer 11, and the solder mask layer 13 covers the substrate layer 11 and the conductive layer 12, and forms a ground pad 121 and a peripheral pad 122 by selectively opening windows. The peripheral pad 122 is arranged around the outer periphery of the ground pad 121, forming a typical QFN chip soldering layout.

[0043] The key improvement of this application lies in the following: a first vent 2 is provided inside the grounding pad 121, and a second vent 3 is provided in the area between the grounding pad 121 and the outer pad 122. The first vent 2 and the second vent 3 are spatially spaced at a reasonable distance, and both extend through the thickness direction of the entire circuit board 1. The first vent 2 is mainly responsible for venting gas from the central area of ​​the chip, while the second vent 3 effectively guides gas from the edge area of ​​the chip. During the soldering process, gases generated by flux evaporation and chemical reactions can be quickly discharged through these two vents, reducing the risk of gas accumulation and ensuring a reliable bond between the solder and the pad, fundamentally avoiding soldering defects such as solder float and cold solder joints.

[0044] like Figure 3 and Figure 4 As shown, in one specific embodiment of this application, the pad structure includes a printed solder layer 4 disposed on the surfaces of the ground pad 121 and the peripheral pad 122. The coverage area of ​​the printed solder layer 4 is strictly smaller than the actual planar contours of the corresponding ground pad 121 and the peripheral pad 122 to ensure that an appropriate gap is maintained between the edge of the printed solder layer 4 and the pad boundary, thereby effectively preventing solder overflow during the soldering process.

[0045] like Figure 3 and Figure 4 As shown, in one specific embodiment of this application, the edge contour of the printed solder layer 4 maintains a safe distance from the opening edge of the first vent hole 2 on the surface of the ground pad 121. This distance control ensures that the opening area of ​​the first vent hole 2 is not covered or blocked when the printed solder layer 4 is applied, thereby maintaining the unobstructed venting channel. By controlling the application position and shape of the printed solder layer 4, effective coverage of the solder on the ground pad 121 is ensured, while avoiding vent hole blockage caused by solder penetration. While ensuring soldering quality, the gas emission function of the first vent hole 2 is retained, allowing the gas generated during the soldering process to be smoothly discharged through the first vent hole 2, effectively preventing soldering defects caused by gas accumulation.

[0046] In one specific embodiment of this application, the distance between the coating outline of the printed solder layer 4 and the port outline of the first vent hole 2 is in the range of 0.05mm-0.2mm, so as to ensure that there is a sufficient safe distance between the printed solder layer 4 and the first vent hole 2, effectively preventing the solder from flowing into the vent hole during the soldering process, while also ensuring that the coverage area of ​​the solder on the grounding pad 121 is large enough to form a reliable solder connection.

[0047] like Figure 3 and Figure 4 As shown, in one specific embodiment of this application, the outer periphery of the port of the second vent 3 located on the solder mask layer 13 is surrounded and sealed by a continuous and complete solder mask layer 13 material. By forming a complete closed ring of solder mask layer 13 at the opening edge of the second vent 3, the penetration path of molten solder into the interior of the second vent 3 during the soldering process is effectively blocked, thereby preserving the gas emission function of the second vent 3, avoiding the vent blockage problem caused by solder leakage, and without affecting the normal soldering quality of the pad area.

[0048] like Figure 3 and Figure 4 As shown, in one specific embodiment of this application, the number of second vent holes 3 is at least two, and each second vent hole 3 is arranged around the outer periphery of the grounding pad 121. By increasing the number of second vent holes 3, the gas exhaust efficiency during the welding process is improved, ensuring that gases generated from different directions can be quickly exhausted. In practical applications, the number and distribution density of the second vent holes 3 can be flexibly adjusted according to the actual package size to ensure reliable gas exhaust performance under various welding conditions.

[0049] like Figure 3 and Figure 4 As shown, in one specific embodiment of this application, an organic coating layer 5 is further disposed on the surface of the conductive layer 12, which uniformly covers the surface areas of the ground pad 121 and the peripheral pad 122. This organic coating layer 5 is preferably formed using an OSP (Organic Solderability Protectant) coating process, which chemically forms an organic protective film with antioxidant properties on the surface of the copper pad. This OSP coating effectively prevents oxidation of the pad surface before soldering while maintaining good solderability. During the soldering process, the organic coating layer 5 decomposes and volatilizes at high temperatures, leaving no residue that affects soldering quality. By employing the OSP process for the organic coating layer 5, the solderability and long-term reliability of the pads can be improved without increasing additional process complexity.

[0050] like Figure 5As shown, this application provides an LED display panel, including a square flat leadless package chip 6 and the pad structure described in the above embodiment. The square flat leadless package chip 6 is electrically connected to the ground pad 121 and peripheral pad 122 in the pad structure through its electrodes, specifically, the chip electrodes form reliable physical contact with the printed solder layer 4. The first vent 2 is completely located within the vertical projection area of ​​the ground electrode of the square flat leadless package chip 6 on the circuit board 1; at the same time, the arrangement of the second vent 3 ensures that its entirety is within the projection outline of the square flat leadless package chip 6 on the circuit board 1, which not only ensures effective soldering between the chip and the pad, but also ensures that the gas generated during the soldering process can be smoothly discharged through the first vent 2 and the second vent 3, thereby improving the soldering quality and reliability of the LED display panel.

[0051] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A pad structure, characterized in that, include: A circuit board (1) includes a substrate layer (11), a conductive layer (12), and a solder mask layer (13); the conductive layer (12) is disposed on the substrate layer (11), and the solder mask layer (13) is disposed on the substrate layer (11) and the conductive layer (12). The solder mask layer (13) has an opening located on the conductive layer (12) to form a ground pad (121) and a peripheral pad (122). The peripheral pad (122) surrounds the outer periphery of the ground pad (121). The first vent (2) is located inside the grounding pad (121); The second vent (3) is located between the grounding pad (121) and the peripheral pad (122), and is spaced apart from the first vent (2); Both the first vent (2) and the second vent (3) penetrate the circuit board (1).

2. The pad structure as described in claim 1, characterized in that, The printed solder layer (4) is applied to the ground pad (121) and the peripheral pad (122), and the coating contour of the printed solder layer (4) is smaller than the planar contour of the corresponding ground pad (121) and the peripheral pad (122).

3. The pad structure as described in claim 2, characterized in that, The coating outline of the printed solder layer (4) is spaced apart from the port outline of the first vent hole (2) located on the ground pad (121).

4. The pad structure as described in claim 3, characterized in that, The distance between the coating outline of the printed solder layer (4) and the port outline of the first vent hole (2) is in the range of 0.05mm-0.2mm.

5. The pad structure as described in any one of claims 1 to 4, characterized in that, The second vent (3) is located on the outer periphery of the port of the solder resist layer (13), which is made of the solder resist layer (13) material.

6. The pad structure as described in any one of claims 1 to 4, characterized in that, The number of the second vent (3) is at least two, and each second vent (3) is arranged around the outer periphery of the grounding pad (121).

7. The pad structure as described in any one of claims 1 to 4, characterized in that, An organic coating layer (5) is also provided on the conductive layer (12), and the organic coating layer (5) is applied to the grounding pad (121) and the peripheral pad (122).

8. An LED display screen light panel, characterized in that, The package includes a square flat leadless chip (6) and a pad structure as described in any one of claims 2 to 7. The electrodes of the square flat leadless chip (6) are in contact with the printed solder layer (4) on the ground pad (121) and the peripheral pad (122), respectively. The first vent (2) is located within the projection range of the ground electrode of the square flat leadless chip (6) on the circuit board (1), and the second vent (3) is located within the projection range of the square flat leadless chip (6) on the circuit board (1).

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