Semiconductor devices, chips and apparatuses
By optimizing the geometric relationship between the terminal trench and the cell trench, the electric field depletion effect was enhanced, the problem of insufficient voltage withstand capability of the device was solved, the voltage withstand capability and reliability of the device were improved and the cost was reduced.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- BYD CO LTD
- Filing Date
- 2025-06-30
- Publication Date
- 2026-07-14
AI Technical Summary
The electric field depletion effect in the device's terminal region and cell region is weak, resulting in poor voltage withstand capability of the device.
By controlling the functional relationship between the minimum distance between the outer edge of the terminal trench and the outer edge of the cell trench in the vertical and horizontal directions, and the width of the cell trench in the horizontal direction, the electric field depletion effect of the terminal region and the cell region is optimized to improve the withstand voltage and reliability of the device.
It enhances electric field stability, improves device withstand voltage and yield, and reduces manufacturing costs.
Smart Images
Figure CN224503850U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor technology, and in particular to semiconductor devices, chips and equipment. Background Technology
[0002] In related technologies, the electric field depletion effect in the device terminal region and cell region is weak, resulting in poor voltage withstand capability of the device. Therefore, how to optimize it has become an urgent problem to be solved in this field. Summary of the Invention
[0003] The semiconductor devices, chips, and apparatus provided in this application at least partially solve the above-mentioned problems. A first aspect of this application provides a semiconductor device, the semiconductor device comprising:
[0004] Cell region, wherein the cell region includes cell trenches;
[0005] A terminal area is disposed on the outer periphery of the cell area. The terminal area includes a terminal groove. In the planar direction, the terminal groove is disposed close to the groove of the cell area. The distance between the outer edge of the terminal groove and the outer edge of the cell groove in the vertical direction, the minimum distance between the outer edge of the terminal groove and the outer edge of the cell groove in the horizontal direction, and the width of the cell groove in the horizontal direction conform to a determined functional relationship.
[0006] Optionally, the minimum vertical distance between the outer edge of the terminal groove and the outer edge of the cell groove conforms to a nonlinear rational function relationship with the minimum horizontal distance between the outer edge of the terminal groove and the outer edge of the cell groove.
[0007] Optionally, the minimum vertical distance between the outer edge of the terminal groove and the outer edge of the cell groove conforms to a nonlinear rational function relationship with the width of the cell groove in the horizontal direction.
[0008] Optionally, the minimum vertical distance between the outer edge of the terminal groove and the outer edge of the cell groove, the minimum horizontal distance between the outer edge of the terminal groove and the outer edge of the cell groove, and the width of the cell groove in the horizontal direction conform to the following functional relationship:
[0009]
[0010] Where x is the minimum vertical distance between the outer edge of the terminal groove and the outer edge of the cell groove.
[0011] y is the minimum horizontal distance between the outer edge of the terminal groove and the outer edge of the cell groove, and a is the horizontal width of the cell groove.
[0012] Optionally, the cell region includes a plurality of cell grooves, which are arranged sequentially along the horizontal direction.
[0013] Optionally, the length of the cell groove in the vertical direction is greater than its length in the horizontal direction.
[0014] Optionally, the terminal area includes a plurality of terminal trenches, and the plurality of terminal trenches form an annular trench field limiting ring.
[0015] Optionally, the terminal trench is arranged around the plurality of cell trenches.
[0016] Optionally, the terminal trench is arranged around the plurality of cell trenches.
[0017] A semiconductor chip, the semiconductor chip comprising the semiconductor device as described in any of the preceding claims.
[0018] An apparatus comprising a semiconductor device as described in any one of the preceding claims, or comprising a semiconductor chip as described in any one of the preceding claims.
[0019] This invention enhances the electric field depletion effect in a region by controlling the relationship between the minimum vertical distance x between the outer edge of the terminal trench and the outer edge of the cell trench, the minimum horizontal distance y between the outer edge of the terminal trench and the outer edge of the cell trench, and the width a of the cell trench in the horizontal direction. This effectively improves the electric field stability in the region, thereby increasing the withstand voltage and reliability of the device, improving the yield of the device in applications, and greatly reducing manufacturing costs.
[0020] Other features and advantages of this application will be described in detail in the following detailed description section. Attached Figure Description
[0021] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0022] To gain a more complete understanding of this application and its beneficial effects, the following description will be provided in conjunction with the accompanying drawings, wherein the same reference numerals in the following description denote the same parts.
[0023] Figure 1 This is a schematic diagram of the structure of a semiconductor device provided in an exemplary embodiment of this disclosure;
[0024] Figure 2This is a schematic diagram of the structure of another semiconductor device provided in an exemplary embodiment of this disclosure. Detailed Implementation
[0025] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the protection scope of this application.
[0026] See Figures 1 to 2 In a first aspect, this application provides a semiconductor device, see [link to relevant documentation]. Figure 1 The semiconductor device includes: a cell region, the cell region including a cell trench; and a terminal region, the terminal region being disposed on the outer periphery of the cell region, the terminal region including a terminal trench. In a planar direction, the terminal trench is disposed close to the cell region trench. The minimum vertical distance between the outer edge of the terminal trench and the outer edge of the cell trench, the minimum horizontal distance between the outer edge of the terminal trench and the outer edge of the cell trench, and the width of the cell trench in the horizontal direction conform to a defined functional relationship.
[0027] The planar direction can be the transverse cross-sectional direction of the device (i.e., the top view direction), and the terminal trench is located close to the cell region trench, which can be as follows: Figure 1 The wrap-around arrangement shown can also mean that the terminal trenches are respectively arranged around the cell region trench; no specific limitation is made here. Furthermore, see... Figure 1 , Figure 2 The minimum vertical distance between the outer edge of the terminal groove and the outer edge of the cell groove can be x, the minimum horizontal distance between the outer edge of the terminal groove and the outer edge of the cell groove can be y, the width of the cell groove in the horizontal direction can be a, and the determined functional relationship can be a linear functional relationship, a nonlinear rational functional relationship, an exponential functional relationship, a power functional relationship, or an exponential linear functional relationship, without further specific limitations. See also Figure 1 The minimum distance is the shortest distance between the edge of the cell region trench and the edge of the terminal trench, with the vertical and horizontal directions being x and y in the figure, respectively.
[0028] This invention enhances the electric field depletion effect in a region by controlling the relationship between the minimum vertical distance x between the outer edge of the terminal trench and the outer edge of the cell trench, the minimum horizontal distance y between the outer edge of the terminal trench and the outer edge of the cell trench, and the width a of the cell trench in the horizontal direction. This effectively improves the electric field stability in the region, thereby increasing the withstand voltage and reliability of the device, improving the yield of the device in applications, and greatly reducing manufacturing costs.
[0029] As an optional implementation, the minimum vertical distance between the outer edge of the terminal groove and the outer edge of the cell groove conforms to a nonlinear rational function relationship with the minimum horizontal distance between them. See also Figure 1 , Figure 2 The minimum vertical distance between the outer edge of the terminal groove and the outer edge of the cell groove can be x, and the minimum horizontal distance between the outer edge of the terminal groove and the outer edge of the cell groove can be y. The nonlinear rational function relationship refers to the fact that x and y conform to a definite nonlinear functional relationship, which will not be elaborated here.
[0030] As an optional implementation, the minimum vertical distance between the outer edge of the terminal groove and the outer edge of the cell groove conforms to a nonlinear rational function relationship with the horizontal width of the cell groove. See also Figure 1 and Figure 2 The minimum vertical distance between the outer edge of the terminal groove and the outer edge of the cell groove can be x, and the width of the cell groove in the horizontal direction can be a. The nonlinear rational function relationship refers to the fact that x and y conform to a definite nonlinear functional relationship, which will not be elaborated here.
[0031] As an optional implementation, the minimum vertical distance between the outer edge of the terminal groove and the outer edge of the cell groove, the minimum horizontal distance between the outer edge of the terminal groove and the outer edge of the cell groove, and the width of the cell groove in the horizontal direction conform to the following functional relationship:
[0032]
[0033] Where x is the minimum vertical distance between the outer edge of the terminal groove and the outer edge of the cell groove.
[0034] y is the minimum horizontal distance between the outer edge of the terminal groove and the outer edge of the cell groove, and a is the horizontal width of the cell groove.
[0035] As an optional implementation method, see [link to implementation details]. Figure 1 andFigure 2 The cell region includes a plurality of cell trenches, which are arranged sequentially along the horizontal direction. Optionally, the length of the cell trenches in the vertical direction is greater than their length in the horizontal direction. Optionally, the terminal region includes a plurality of terminal trenches, which form an annular trench field limiting ring. Optionally, the terminal trenches are arranged around the plurality of cell trenches. Optionally, the terminal trenches are arranged to surround the plurality of cell trenches.
[0036] In this application, SGT MOS can be used as an example to explain the above principles, but it should not be construed as a limitation of the present invention. The termination structure adopted by SGT MOS is an annular trench termination, in which the termination trench surrounds the strip cell trench. Therefore, the distance between the cell trench and the termination trench has two directions, namely the minimum vertical distance x between the outer edge of the termination trench and the outer edge of the cell trench and the minimum horizontal distance y between the outer edge of the termination trench and the outer edge of the cell trench, where a is the distance between the cell trench and the trench. In the direction parallel to the unit cell trenches, the minimum horizontal distance y between the outer edge of the terminal trench and the outer edge of the unit cell trench can be consistent with the spacing between the unit cell trenches to ensure that the depletion conditions of the terminal region and the unit cell region are the same. In the direction perpendicular to the unit cell trenches, if the spacing x is also consistent with the spacing y of the unit cell trenches, the depletion effect of the terminal region will be weakened, and the electric field distribution will be unstable, introducing instability factors. By optimizing the relationship between x and y, it can be made to be 75% of the unit cell spacing y (with special design a=y=0.5*pitch), which can optimize the depletion effect in this direction, thereby optimizing the overall BV withstand voltage of the device and enhancing the robustness of the device. The specific calculation derivation formula is as follows:
[0037] Let b be the vertical depth of the SG poly, a be the trench width of the unit cell region, y be the minimum trench distance in the Y direction, x be the trench spacing in the X direction, and λ be the exhaust volume factor of the poly per unit area. λ is calculated using the smallest repeating unit region 2 in the X direction as the calculation unit, i.e., the Si volume of the pitch length, and the exhaust volume factors in the X and Y directions are compared.
[0038] For region 1 in the Y direction: SG poly depletion occurs on both the left and right sides. The volume of this region is V = (y + a) * y * b; the area of the SG poly on both sides is S = 2 * (y + a) * b, and the depletion coefficient is λy = V / S = y / 2. For region 2 in the X direction: SG poly depletion occurs only in the groove region on the cell side. The volume of this region is V = (y + a) * x * b; the area of the SG poly on both sides is S = ((y + a) + a) * b, and the depletion coefficient is λx = V / S = (y + a) * x / (y + 2a). When the depletion coefficients in both directions are equal, then λx = λy, i.e., y / 2 = (y + a) * x / (y + 2a). When x = y(y + 2a) / (2 * (y + a)), the depletion effect in both directions is close. When a = y, x = (3 / 4) * y, i.e., Ter - X = 75% * Ter - Y.
[0039] The present invention also provides a semiconductor chip, the semiconductor chip comprising the semiconductor device as described in any one of the preceding claims.
[0040] The present invention also provides an apparatus comprising a semiconductor device as described in any one of the preceding claims, or comprising a semiconductor chip as described in any one of the preceding claims.
[0041] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.
[0042] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.
[0043] The embodiments, implementation methods, and related technical features of this application can be combined and substituted for each other without conflict.
[0044] The above are merely preferred embodiments of this application and are not intended to limit this application in any way. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of this application without departing from the scope of the technical solution of this application shall still fall within the scope of the technical solution of this application.
Claims
1. A semiconductor device, characterized in that, The semiconductor device includes: Cell region, wherein the cell region includes cell trenches; A terminal area is disposed on the outer periphery of the cell area. The terminal area includes a terminal groove. In the planar direction, the terminal groove is disposed close to the groove of the cell area. The minimum vertical distance between the outer edge of the terminal groove and the outer edge of the cell groove, the minimum horizontal distance between the outer edge of the terminal groove and the outer edge of the cell groove, and the width of the cell groove in the horizontal direction conform to a defined functional relationship.
2. The semiconductor device according to claim 1, characterized in that, The minimum vertical distance between the outer edge of the terminal groove and the outer edge of the cell groove is related to the minimum horizontal distance between the outer edge of the terminal groove and the outer edge of the cell groove by a nonlinear rational function.
3. The semiconductor device according to claim 1, characterized in that, The minimum vertical distance between the outer edge of the terminal groove and the outer edge of the cell groove conforms to a nonlinear rational function relationship with the width of the cell groove in the horizontal direction.
4. The semiconductor device according to claim 2 or 3, characterized in that, The minimum vertical distance between the outer edge of the terminal groove and the outer edge of the cell groove, the minimum horizontal distance between the outer edge of the terminal groove and the outer edge of the cell groove, and the width of the cell groove in the horizontal direction conform to the following functional relationship: Where x is the minimum vertical distance between the outer edge of the terminal groove and the outer edge of the cell groove. y is the minimum horizontal distance between the outer edge of the terminal groove and the outer edge of the cell groove, and a is the horizontal width of the cell groove.
5. The semiconductor device according to claim 1, characterized in that, The cell region includes a plurality of cell grooves, which are arranged sequentially along the horizontal direction.
6. The semiconductor device according to claim 5, characterized in that, The length of the cell groove in the vertical direction is greater than its length in the horizontal direction.
7. The semiconductor device according to claim 5, characterized in that, The terminal area includes multiple terminal trenches, which together form an annular trench field limiting ring.
8. The semiconductor device according to claim 5, characterized in that, The terminal grooves are arranged around the plurality of cell grooves.
9. The semiconductor device according to claim 5 or 7, characterized in that, The terminal groove is arranged to surround the plurality of cell grooves.
10. A semiconductor chip, characterized in that, The semiconductor chip includes the semiconductor device as described in any one of claims 1 to 9.
11. A device, characterized in that, The device includes a semiconductor device as described in any one of claims 1 to 9, or a semiconductor chip as described in claim 10.