一种显示屏通用老化板

Abstract

本实用新型公开了一种显示屏通用老化板，包括主板本体，设有直流电源插座、电源开关、程序烧录口；排针阵列，包含平行排列的四组双排排针，分别为第一排双排排针CN1‑1、第二排双排排针CN1‑2、第三排双排排针CN1‑3、第四排双排排针CN1‑4；单片机，其输入输出接口通过第一排双排排针CN1‑1引出；连接器模块，包含0.5mm间距40针连接器和1.0mm间距30针连接器；电容模块，位于第三排双排排针CN1‑3与第四排双排排针CN1‑4之间；CN1‑2各引脚与连接器模块引脚直接导通；CN1‑3连接电容模块；CN1‑4串联在电容模块与连接器模块之间；所述连接器模块用于连接显示屏接口，以执行显示屏老化测试；显示屏接口为并行接口、SPI接口或IIC接口。本实用新型能够兼容多类型显示屏老化测试并提升效率。

Claims

1. A display panel universal burn-in board, characterized by, include: The motherboard itself is equipped with a DC power socket, a power switch, and a program programming port; The pin array consists of four parallel rows of double-row pins, namely the first row of double-row pins CN1-1, the second row of double-row pins CN1-2, the third row of double-row pins CN1-3, and the fourth row of double-row pins CN1-4. The microcontroller's input / output interfaces are brought out through the first row of double-row pin headers CN1-1; The connector module includes a 40-pin connector with a 0.5mm pitch and a 30-pin connector with a 1.0mm pitch. The capacitor module is located between the third row of double-row pin headers CN1-3 and the fourth row of double-row pin headers CN1-4; The pin definitions for CN1-1 are as follows: pin 1 is grounded, pin 2 is connected to the power supply, pins 3 to 10 correspond to microcontroller pins P0.0 to P0.7, pins 11 to 18 correspond to microcontroller pins P2.7 to P2.0, pins 19 to 26 correspond to microcontroller pins P3.0 to P3.7, and pins 27 to 34 correspond to microcontroller pins P1.0 to P1.

7. Each pin of CN1-2 is directly connected to the pin of the connector module; CN1-3 connects to the capacitor module; CN1-4 is connected in series between the capacitor module and the connector module; The connector module is used to connect to the display screen interface to perform display screen aging tests; the display screen interface is a parallel interface, SPI interface or IIC interface.

2. The display panel universal burn-in board of claim 1, wherein, The connector module has multiple groups, each group is independently configured with a pin header array and a capacitor module.

3. The display panel universal burn-in board of claim 1, wherein, Jumper caps or DuPont wires are installed on the pin header array. Jumper caps are used to directly connect the corresponding pins of adjacent pin headers, while DuPont wires are used to bridge non-adjacent pins.

4. The display panel universal burn-in board of claim 3, wherein, The jumper cap is suitable for 2.54-pitch jumper headers and is used to short the matching pins of the first and second rows of jumper headers.

5. The universal aging board for display screens according to claim 1, characterized in that, The connector module is compatible with at least one of parallel interface, serial peripheral interface, and IIC interface, and the interface type is configured by jumper caps or DuPont wires.

6. The display panel universal burn-in board of claim 1, wherein, The display screen interface is a parallel interface, SPI interface, or IIC interface.

7. The display panel universal burn-in board of claim 1, wherein, The power switch controls the on / off state of the DC power supply, the DC power socket is connected to the DC power supply, and the DC power supply supplies power to the display screen to be aged through the display screen interface.

8. The display panel universal burn-in board of claim 1, wherein, The motherboard body is equipped with multiple current-limiting resistor arrays, each with two resistance values ​​of 50Ω and 500Ω, which are connected in series between the connector and the header pins.

9. The display panel universal burn-in board of claim 1, wherein, The capacitor module supports plug-and-play replacement of electrolytic or ceramic capacitors with capacitance values ​​ranging from 0.1μF to 10μF.

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