基于多路开关和继电器的多通道电阻测试电路
By using a multi-channel resistance test circuit based on multiplexers and relays, and utilizing analog multiplexers and normally open relays, efficient and low-cost multi-channel resistance testing is achieved, solving the problems of low efficiency and insufficient accuracy in existing technologies, and supporting 64-channel synchronous testing.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- GLORYMV ELECTRONICS
- Filing Date
- 2025-06-27
- Publication Date
- 2026-07-17
AI Technical Summary
Existing resistance testing circuits are inefficient in multi-channel testing, and cascaded designs are complex and affect accuracy, failing to meet the needs of rapid and accurate testing of a large number of resistors.
A multi-channel resistance test circuit based on multiplexers and relays is adopted. By using analog multiplexers and normally open relays, combined with constant voltage source chips and operational amplifiers, multi-channel resistance testing is achieved through time-division multiplexing, supporting synchronous testing of up to 64 channels.
It achieves low-cost, high-efficiency multi-channel resistance testing. It has a simple structure, can quickly complete the measurement of resistance values, saves controller GPIO resources, and reduces hardware costs.
Smart Images

Figure CN224518848U_ABST
Abstract
Claims
1. A multi-channel resistance test circuit based on multiplexers and relays, characterized in that: This includes an analog multiplexer, power supply, standard resistor Rn, amplifier circuit, and microcontroller; The number of analog multiplexers is multiple; each analog multiplexer corresponds to one or more normally open relays, and the analog multiplexer is used to control whether the multiple normally open relays are closed or not; the power supply is connected to one end of each normally open relay corresponding to the analog multiplexer through a standard resistor Rn, and the other end of each normally open relay is grounded after passing through a test contact. When testing the resistor under test, the test contact is connected to both ends of the resistor under test; a terminal is led out between the standard resistor Rn and the normally open relay and connected to the input terminal of the amplifier circuit. The output terminal of the amplifier circuit is connected to the ADC sampling port of the microcontroller to collect the voltage signal and convert it into a resistance value.
2. The multi-channel resistance test circuit based on multiplexers and relays as claimed in claim 1, wherein: The output of the microcontroller is connected to each analog multiplexer to control the analog multiplexer to drive the normally open relay.
3. The multi-channel resistance test circuit based on multiplexers and relays as claimed in claim 2, wherein: The analog multiplexer uses a CD4051 multiplexer chip, which has eight output channels, each corresponding to a normally open relay. The analog multiplexer has three address switching inputs: A, B, and C. The GPIO port of the microcontroller is connected to the three address switching inputs of the analog multiplexer to control the analog multiplexer to select one of its eight normally open relays.
4. The multi-channel resistance test circuit based on multiplexer and relay according to any one of claims 1 to 3, characterized in that: The test circuit also includes a constant voltage source chip, and the power supply is connected to a standard resistor Rn after passing through a voltage regulator circuit.
5. The multi-channel resistance test circuit based on multiplexers and relays as described in claim 4, characterized in that: The constant voltage source chip uses the LT141AIS8-5 chip to provide stable test current and voltage.
6. The multi-channel resistance test circuit based on multiplexer and relay as claimed in any one of claims 1 to 3, wherein: The amplifier circuit includes an operational amplifier, which amplifies the input voltage signal and sends it to the ADC sampling port of the microcontroller.
7. The multi-channel resistance test circuit based on multiplexers and relays as defined in claim 3, characterized by: Each of the analog multiplexers has a chip select signal input terminal INH, which is connected to the GPIO port of the microcontroller. The chip select signal input terminal INH is used to select one of the multiple analog multiplexers to be enabled and used, so as to realize time-division selection.