显示面板及显示装置
By employing a cross-design of metal materials to prepare array substrate spacers and organic materials to prepare color filter substrate spacers in liquid crystal display panels, the problem of display defects caused by spacer height deviations has been solved, improving production efficiency and display effect.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- BOE TECHNOLOGY GROUP CO LTD
- Filing Date
- 2025-07-31
- Publication Date
- 2026-07-17
AI Technical Summary
In existing LCD panels, height deviations in the spacers cause display defects and limit production capacity.
The spacers for the array substrate are made of metal materials and are cross-designed with the spacers for the color filter substrate made of organic materials. By precisely controlling the height of the spacers, the height deviation is reduced, and the spacers are prepared on different production lines to improve production efficiency.
This reduces the risk of display panel defects, improves production capacity and the contact reliability of spacers, and enhances display performance.
Smart Images

Figure CN224519090U_ABST
Abstract
Claims
1. A display panel, characterized by, include: An array substrate includes a first substrate and a circuit structure layer, a planarization layer, and a first metal layer sequentially disposed along a direction away from the first substrate; the circuit structure layer includes multiple gate signal lines and multiple data signal lines, the multiple gate signal lines extending along a first direction and the multiple data signal lines extending along a second direction; the first metal layer includes multiple first spacers. A color filter substrate, disposed opposite to the array substrate, includes a second substrate and a plurality of second spacers disposed on the second substrate; wherein the extending direction of the second spacers intersects the extending direction of the first spacers, and one second spacer abuts against at least one first spacer.
2. The display panel according to claim 1, characterized in that, The first spacer extends along the first direction, and the orthographic projection of the first spacer on the first substrate passes through the orthographic projection of the data signal line on the first substrate along the first direction; The second spacer extends along the second direction, and the orthographic projection of the second spacer on the array substrate at least partially coincides with the data signal line.
3. The display panel according to claim 2, characterized in that, The circuit structure layer also includes multiple first signal lines, which are alternately arranged along the second direction, and an adjacent first signal line and a gate signal line form a signal line group. The orthographic projection of the first spacer onto the first substrate is located between the orthographic projections of the first signal line and the gate signal line of the signal line group onto the first substrate.
4. The display panel according to claim 3, characterized in that, The first metal layer includes multiple sets of the first spacers, each set including multiple first spacers spaced apart along the second direction, and the orthographic projection of the multiple first spacers in a set on the first substrate is located between the orthographic projections of the first signal line and the gate signal line of the signal line group on the first substrate. One of the second spacers abuts against a group of one or more of the first spacers.
5. The display panel according to any one of claims 2 to 4, characterized in that, The dimension of the first spacer along the first direction is smaller than the spacing between two adjacent data signal lines along the first direction; and / or, The dimension of the second spacer along the second direction is smaller than the spacing between two adjacent gate signal lines along the second direction.
6. The display panel according to claim 1, characterized in that, The first spacer extends along the second direction, and the orthographic projection of the first spacer on the first substrate at least partially coincides with the orthographic projection of the data signal line on the first substrate; The second spacer extends along the first direction and abuts against at least one of the first spacers adjacent to it along the first direction.
7. The display panel according to claim 6, characterized in that, The circuit structure layer also includes multiple first signal lines, which are alternately arranged along the second direction, and an adjacent first signal line and a gate signal line form a signal line group. The orthographic projection of the first spacer on the first substrate passes through the orthographic projection of the signal line group on the substrate along the second direction and at least partially overlaps with the orthographic projection of a gate signal line on the first substrate.
8. The display panel according to claim 6, characterized in that, The dimension of the first spacer along the second direction is greater than the spacing between two adjacent gate signal lines along the second direction, and the orthographic projection of the first spacer on the first substrate at least partially overlaps with the orthographic projection of the plurality of gate signal lines on the first substrate.
9. The display panel according to any one of claims 6 to 8, characterized in that, The circuit structure layer also includes multiple first signal lines, which are alternately arranged along the second direction, and an adjacent first signal line and a gate signal line form a signal line group. The orthographic projection of the second spacer onto the first substrate lies between the orthographic projections of the first signal line and the gate signal line of the signal line group onto the first substrate.
10. The display panel of claim 1, wherein, Also includes: A first electrode layer is disposed on the side of the planar layer away from the first substrate; A first insulating layer is disposed on the side of the first electrode layer away from the first substrate; The second electrode layer is disposed on the side of the first insulating layer away from the first substrate, and includes a plurality of second electrodes; A first transistor, wherein the control electrode of the first transistor is electrically connected to the gate signal line, the first electrode is electrically connected to the data signal line, and the second electrode is electrically connected to the second electrode; The first metal layer is disposed between the first electrode layer and the first insulating layer, and is electrically connected to the first electrode layer.
11. The display panel of claim 1, wherein, Also includes: A first electrode layer is disposed on the side of the planar layer away from the first substrate; A first insulating layer is disposed on the side of the first electrode layer away from the first substrate; The second electrode layer is disposed on the side of the first insulating layer away from the first substrate, and includes a plurality of second electrodes; A first transistor, wherein the control electrode of the first transistor is electrically connected to the gate signal line, the first electrode is electrically connected to the data signal line, and the second electrode is electrically connected to the second electrode; The first metal layer is disposed on the side of the second electrode layer away from the first substrate and is electrically insulated from the second electrode layer.
12. A display device comprising: include: The display panel as described in any one of claims 1 to 11; A backlight module is disposed on the backlight side of the display panel.