一种EEPROM数据迁移装置

Abstract

本实用新型公开了一种EEPROM数据迁移装置，包括：主控单元，其内置读写I2C时序；按键控制电路，其与主控单元连接，用于按键控制开始读写操作；指示电路，其与主控单元连接，用于在EEPROM数据迁移过程中发出指示；第一数据接口，其与主控单元连接，且用于连接第一主控芯片的程序烧录接口，第一EEPROM芯片的SDA引脚、SCL引脚和电源引脚分别连接第一主控芯片的程序烧录接口；第二数据接口，其与主控单元连接，且用于连接第二主控芯片的程序烧录接口，第二EEPROM芯片的SDA引脚、SCL引脚和电源引脚分别连接第二主控芯片的程序烧录接口。本实用新型方便实现EEPROM数据迁移。

Claims

1. An EEPROM data migration apparatus, comprising: The EEPROM data migration device is used to migrate data from a first EEPROM chip on a first control motherboard to a second EEPROM chip on a second control motherboard. The first main control chip on the first control motherboard has a reserved program programming interface, and the second main control chip on the second control motherboard has a reserved program programming interface. The EEPROM data migration device includes: The main control unit has built-in read / write I2C timings; A button control circuit, which is connected to the main control unit, is used to control the start of read / write operations via button presses; An indicator circuit, connected to the main control unit, is used to issue instructions during EEPROM data migration. The first data interface is connected to the main control unit and is used to connect to the program programming interface of the first main control chip. The SDA pin, SCL pin and power pin of the first EEPROM chip are respectively connected to the program programming interface of the first main control chip. The second data interface is connected to the main control unit and is used to connect to the program programming interface of the second main control chip. The SDA pin, SCL pin and power pin of the second EEPROM chip are respectively connected to the program programming interface of the second main control chip.

2. The EEPROM data migration device according to claim 1, characterized in that, The first data interface includes at least a first pin I, a first pin II, and a first pin III; The second data interface includes at least a second pin I, a second pin II, and a second pin III, wherein both the first pin III and the second pin III receive electrical energy output by the EEPROM data migration device; The programming interface includes at least an SDA interface, an SCL interface, and a power interface; The SDA pin, SCL pin, and power pin of the first EEPROM chip are respectively connected to the SDA interface, SCL interface, and power interface in the program burning interface of the first main control chip. The SDA pin, SCL pin, and power pin of the second EEPROM chip are respectively connected to the SDA interface, SDA interface, and power interface in the program burning interface of the second main control chip. When the first data interface is connected to the program programming interface of the first main control chip, the SDA interface, SCL interface and power interface of the program programming interface of the first main control chip are respectively connected to the first pin I, the first pin II and the first pin III. When the second data interface is connected to the programming interface of the second main control chip, the SDA interface, SCL interface and power interface of the programming interface of the second main control chip are respectively connected to the second pin I, the second pin II and the second pin III.

3. The EEPROM data migration apparatus of claim 2, wherein, The first control motherboard and the second control motherboard are also respectively provided with a third data interface; The third data interface includes at least third pin I, third pin II, and third pin III; The third pin I of the third data interface on the first control motherboard is connected to the SDA pin of the first EEPROM chip and the SDA interface in the program burning interface of the first main control chip. The third pin II of the third data interface on the first control motherboard is connected to both the SCL pin of the first EEPROM chip and the SCL interface in the program burning interface of the first main control chip. The third pin III of the third data interface on the first control motherboard is connected to both the power pin of the first EEPROM chip and the power interface in the program burning interface of the first main control chip. The first pin 1, the first pin 2, and the first pin 3 of the first data interface are respectively connected to the first pin 1, the second pin 2, and the third pin 3 of the third data interface on the first control motherboard; The third pin I of the third data interface on the second control motherboard is connected to the SDA pin of the second EEPROM chip and the SDA interface in the program burning interface of the second main control chip. The third pin II of the third data interface on the second control motherboard is connected to both the SCL pin of the second EEPROM chip and the SCL interface in the program burning interface of the second main control chip. The third pin III of the third data interface on the second control motherboard is connected to both the power pin of the second EEPROM chip and the power interface in the program burning interface of the second main control chip. The first pin I, the first pin II, and the first pin III of the second data interface are respectively connected to the first pin I, the second pin II, and the third pin III of the third data interface on the second control motherboard.

4. The EEPROM data migration apparatus of claim 3, wherein, The first data interface, the second data interface, and the third data interface are each connectors with multiple pins; the EEPROM data migration device further includes: The first pin ribbon cable is used to connect the first data interface and the third data interface on the first control motherboard. The second pin ribbon cable is used to connect the second data interface and the third data interface on the second control motherboard.

5. The EEPROM data migration apparatus of claim 1, wherein, The button control circuit includes: A jog button has one end connected to the power supply via a current-limiting resistor and the other end connected to the ground of the main control unit. The common connection point of the jog button and the current-limiting resistor is connected to an input / output terminal of the main control unit.

6. The EEPROM data migration apparatus of claim 1, wherein, The indicating circuit also includes: At least one indicator branch, the indicator branch including an indicator light, the negative terminal of the indicator light being grounded and the positive terminal being connected to another input / output terminal of the main control unit through a current-limiting resistor.

7. The EEPROM data migration apparatus of claim 1, wherein, The EEPROM data migration device further includes: The USB connector is connected to the main control unit. When an external device connects to the main control unit via the USB connector, the external device provides power to at least the electrical components in the EEPROM data migration device.

8. The EEPROM data migration apparatus of claim 7, wherein, The external device is a laptop, which communicates with the main control unit.

9. The EEPROM data migration apparatus of claim 1, wherein, The EEPROM data migration device further includes: A DIP switch, which is communicatively connected to the main control unit.

10. The EEPROM data migration device according to claim 1, characterized in that, The SDA pin of the first EEPROM chip is pulled up to the power supply terminal of the first EEPROM chip through a first pull-up resistor; The SCL pin of the first EEPROM chip is pulled up to the power supply end of the first EEPROM chip through a second pull-up resistor; The SDA pin of the second EEPROM chip is pulled up to the power supply end of the second EEPROM chip through a third pull-up resistor; The SCL pin of the second EEPROM chip is pulled up to the power supply end of the second EEPROM chip through a fourth pull-up resistor.

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