一种提高焊接元器件阻抗仿真精度的模型结构

By introducing a solder paste module into the simulation model of soldering components, the impedance data deviation problem caused by ignoring the presence of solder paste in the existing technology is solved, the simulation accuracy is improved, and the accuracy of signal integrity design is ensured.

CN224519426UActive Publication Date: 2026-07-17EMDOOR ELECTRONICS TECH

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
EMDOOR ELECTRONICS TECH
Filing Date
2025-05-30
Publication Date
2026-07-17

AI Technical Summary

Technical Problem

Existing impedance simulation models for soldering components ignore the presence of solder paste, resulting in significant deviations between impedance data and actual test results, thus affecting simulation accuracy.

Method used

A solder paste module is introduced into the simulation model, with its length and width set to be greater than that of the surface mount connector pin module, and it covers the main conductive area of ​​the pin in the vertical direction with a height of 4 to 6 mil. This ensures that the size of the solder paste module is consistent with that of the pad module, simulating the actual soldering state.

Benefits of technology

It significantly reduced the deviation of impedance data, improved simulation accuracy by 86.59%, and provided a more reliable basis for the signal integrity design of PCB boards.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN224519426U_ABST
    Figure CN224519426U_ABST
Patent Text Reader

Abstract

本实用新型涉及一种提高焊接元器件阻抗仿真精度的模型结构,包括若干焊盘模块和对应的若干表贴连接器引脚模块,表贴连接器引脚模块的底部贴合于所述焊盘模块的上表面,每个焊盘模块的上表面还配置有一个锡膏模块,锡膏模块的长度、宽度均大于表贴连接器引脚模块,以使得锡膏模块包裹表贴连接器引脚模块的外周轮廓,且锡膏模块的高度为4mil至6mil。本实用新型的焊接元器件的阻抗仿真模型,通过在焊盘模块上表面配置锡膏模块,并使锡膏模块的长度与宽度均大于表贴连接器引脚模块,能够有效包裹引脚模块的外周轮廓,形成更贴近实际焊接状态的三维仿真结构,从而可减少传统仿真中因忽略锡膏存在导致的阻抗数据偏差。
Need to check novelty before this filing date? Find Prior Art