A battery management system and its hardwired switch sleep circuit in a vehicle

Abstract

This utility model discloses a battery management system and its hard-wired switch sleep circuit in a vehicle. The sleep circuit includes a drive branch and a ground branch. The input terminal of the drive branch is connected to the output terminal of the power management chip of the battery management system, and the output terminal of the drive branch is connected to the input terminal of the ground branch. The output terminal of the ground branch is connected to the sleep control terminal of the power management chip of the battery management system. The drive branch is used to send a ground control signal to the input terminal of the ground branch when it is determined that the hard-wired switch is stuck, so as to control the output terminal of the ground branch to output a sleep signal to the sleep control terminal of the power management chip. Compared with the prior art, even when the hard-wired switch is stuck, this utility model can enable the low-voltage battery management system to quickly enter sleep mode.

Description

Technical Field

[0001] This utility model relates to the field of battery management technology, and in particular to a battery management system and its hardwired switch sleep circuit in a vehicle. Background Technology

[0002] Currently, lithium batteries are integrated power supply devices that combine power source and controller, supplying power to the vehicle's low-voltage system. Due to prolonged parking or improper maintenance, lithium battery charge can be depleted. When the battery charge falls below a certain threshold, the LBMS (Low-Voltage Battery Management System) locks the battery, entering a dormant state to prevent external discharge and avoid over-discharge of the 12V lithium battery, which could prevent the vehicle from starting. When the user needs to use the vehicle, pressing a hard-wired switch provides a low-level signal to the LBMS for a certain period, waking it up and allowing the lithium battery to supply power to the vehicle. However, if the hard-wired switch is stuck, the LBMS cannot enter a dormant state, leading to continuous battery depletion, over-discharge, and ultimately, the inability to start the vehicle. Summary of the Invention

[0003] This utility model provides a battery management system and its hardwired switch sleep circuit in a vehicle to solve the problem that the low-voltage battery management system cannot be put into sleep mode when the hardwired switch is stuck.

[0004] In one embodiment, a hardwired switch sleep circuit for a battery management system includes:

[0005] The driving branch (10) and the grounding branch (20) are connected. The input terminal of the driving branch (10) is connected to the output terminal of the power management chip (30) of the battery management system. The output terminal of the driving branch (10) is connected to the input terminal of the grounding branch (20). The output terminal of the grounding branch (20) is connected to the sleep control terminal of the power management chip (30) of the battery management system.

[0006] The drive branch (10) is used to send a ground control signal to the input terminal of the ground branch (20) when it is determined that the hard-wired switch is stuck, so as to control the output terminal of the ground branch (20) to output a sleep signal to the sleep control terminal of the power management chip (30).

[0007] The technical effect of this embodiment is that the drive branch (10) determines that the hard-wired switch is stuck, and drives the output terminal of the grounding branch (20) to output a low-level sleep signal to the sleep control terminal of the power management chip (30), thereby enabling the power management chip (30) to control the entire battery management system to enter a sleep state according to the sleep signal. Compared with the prior art, even when the hard-wired switch is stuck, the low-voltage battery management system can quickly enter sleep mode.

[0008] In one embodiment, the drive branch (10) includes:

[0009] The main control chip and the latch are configured such that the input terminal of the main control chip is used as the input terminal of the drive branch (10), the output terminal of the main control chip is connected to the input terminal of the latch, and the output terminal of the latch is used as the output terminal of the drive branch (10).

[0010] The technical effect of this embodiment is that the main control chip determines that the hard-wired switch is stuck, and uses the latch to drive the output terminal of the grounding branch (20) to output a low-level sleep signal to the sleep control terminal of the power management chip (30), thereby enabling the power management chip (30) to control the entire battery management system to enter a sleep state according to the sleep signal. Compared with the prior art, even when the hard-wired switch is stuck, the low-voltage battery management system can quickly enter sleep mode.

[0011] In one embodiment, the grounding branch (20) includes:

[0012] The grounding switch has its control terminal as the input terminal of the grounding branch (20), the input terminal of the grounding switch is connected to the ground, and the output terminal of the grounding switch is the output terminal of the grounding branch (20).

[0013] The technical effect of this embodiment is: the drive branch (10) determines that the hard wire switch is stuck, and drives the output terminal of the grounding switch to output a low-level sleep signal to the sleep control terminal of the power management chip (30), so that the power management chip (30) controls the entire battery management system to enter the sleep state according to the sleep signal.

[0014] In one embodiment, the latch is configured to send a disconnect control signal to the input of the ground branch (20) after the main control chip is woken up, so as to prevent the output of the ground branch (20) from outputting a sleep signal to the sleep control terminal of the power management chip (30).

[0015] The technical effect of this embodiment is: the drive branch (10) determines that the hard-wired switch is stuck, and drives the output of the ground branch (20) to output a low-level sleep signal to the sleep control terminal of the power management chip (30), so that the power management chip (30) controls the entire battery management system to enter the sleep state according to the sleep signal; when the main control chip in the battery management system wakes up from the sleep state, the main control chip controls the latch to send a disconnect control signal to the input of the ground branch (20) to prevent the output of the ground branch (20) from outputting the sleep signal.

[0016] In one embodiment, the grounding switch is configured to be in an on state after receiving a grounding control signal sent by the drive branch (10) and output a sleep signal to the sleep control terminal of the power management chip (30); and to be in an off state after receiving a disconnection control signal sent by the drive branch (10) and avoid outputting a sleep signal to the sleep control terminal of the power management chip (30).

[0017] The technical effect of this embodiment is: the drive branch (10) determines that the hard-wired switch is stuck, and drives the output terminal of the grounding switch to output a low-level sleep signal to the sleep control terminal of the power management chip (30), so that the power management chip (30) controls the entire battery management system to enter the sleep state according to the sleep signal; after the control chip in the drive branch (10) wakes up from the sleep state, the drive branch (10) sends a disconnect control signal to the grounding switch, so that the grounding switch is in the off state, ensuring that the battery management system works normally and does not enter the sleep state.

[0018] In one embodiment, the grounding switch is either N-type or P-type. When the grounding switch is N-type, the control terminal of the grounding switch is configured to receive a high-level grounding control signal, thereby connecting the input terminal of the grounding switch to ground. When the grounding switch is P-type, the control terminal of the grounding switch is configured to receive a low-level grounding control signal, thereby connecting the input terminal of the grounding switch to ground.

[0019] The technical effect of this embodiment is as follows: when the grounding switch is of type N, the grounding control signal sent by the output terminal of the latch is a high-level signal, which can control the grounding switch to close, so that the output terminal of the grounding switch is connected to ground; when the grounding switch is of type P, the grounding control signal sent by the output terminal of the latch is a low-level signal, which can control the grounding switch to close, so that the output terminal of the grounding switch is connected to ground.

[0020] In one embodiment, the grounding switch is a transistor, a field-effect transistor, or an insulated-gate bipolar transistor.

[0021] The technical effect of this embodiment is: the drive branch (10) determines that the hard-wired switch is stuck, and drives the output terminal of the transistor, field-effect transistor or insulated gate bipolar transistor to output a low-level sleep signal to the sleep control terminal of the power management chip (30), so that the power management chip (30) controls the entire battery management system to enter the sleep state according to the sleep signal.

[0022] In one embodiment, the hardwired switch sleep circuit further includes:

[0023] The input terminal of the level conversion circuit is connected to the output terminal of the hardwired switch, and the output terminal of the level conversion circuit is connected to the sleep control terminal of the power management chip (30).

[0024] The technical effect of this embodiment is: the driving branch (10) obtains the high-level signal output by the level conversion circuit for a preset time, and determines that the hard-wired switch is stuck, and drives the output terminal of the grounding branch (20) to output a low-level sleep signal to the sleep control terminal of the power management chip (30), so that the power management chip (30) controls the entire battery management system to enter the sleep state according to the sleep signal.

[0025] In one embodiment, a battery management system is provided, the battery management system including the hardwired switch sleep circuit described in any embodiment.

[0026] The technical effect of this embodiment is that the drive branch (10) of the hard-wired switch sleep circuit determines that the hard-wired switch is stuck, and drives the output terminal of the grounding branch (20) to output a low-level sleep signal to the sleep control terminal of the power management chip (30), thereby enabling the power management chip (30) to control the entire battery management system to enter a sleep state according to the sleep signal. Compared with the prior art, even when the hard-wired switch is stuck, the low-voltage battery management system can quickly enter sleep mode.

[0027] In one embodiment, a vehicle is provided, the vehicle including the aforementioned battery management system.

[0028] The technical effect of this embodiment is as follows: A hard-wired switch sleep circuit is provided in the vehicle's battery management system. The drive branch (10) of this hard-wired switch sleep circuit determines that the hard-wired switch is stuck, and drives the output terminal of the ground branch (20) to output a low-level sleep signal to the sleep control terminal of the power management chip (30), thereby enabling the power management chip (30) to control the entire battery management system to enter a sleep state according to the sleep signal. Compared with the prior art, even when the hard-wired switch is stuck, the low-voltage battery management system can quickly enter sleep mode. Attached Figure Description

[0029] To more clearly illustrate the technical solutions of the embodiments of this utility model, the drawings used in the description of the embodiments of this utility model will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0030] Figure 1 This is a schematic diagram of a hard-wired switch sleep circuit in one embodiment of the present invention;

[0031] The symbols are explained as follows:

[0032] 10. Drive branch; 20. Grounding branch; 30. Power management chip. Detailed Implementation

[0033] To make the technical problems, technical solutions, and beneficial effects solved by this application clearer, the following detailed description is provided in conjunction with embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0034] In one embodiment, a hardwired switch sleep circuit for a battery management system includes:

[0035] The driving branch (10) and the grounding branch (20) are connected. The input terminal of the driving branch (10) is connected to the output terminal of the power management chip (30) of the battery management system. The output terminal of the driving branch (10) is connected to the input terminal of the grounding branch (20). The output terminal of the grounding branch (20) is connected to the sleep control terminal of the power management chip (30) of the battery management system.

[0036] The drive branch (10) is used to send a ground control signal to the input terminal of the ground branch (20) when it is determined that the hard-wired switch is stuck, so as to control the output terminal of the ground branch (20) to output a sleep signal to the sleep control terminal of the power management chip (30).

[0037] The operation of this hard-wired switch sleep circuit includes:

[0038] The power management chip (30) of the battery management system acquires a high-level signal for a preset duration at its sleep control terminal and sends the high-level signal for the preset duration to the drive branch (10). The drive branch (10) determines that the hard-wired switch is stuck based on the high-level signal for the preset duration, and then sends a ground control signal to the input terminal of the ground branch (20). The output terminal of the ground branch (20) is controlled to output a low-level sleep signal to the sleep control terminal of the power management chip (30). The power management chip (30) controls the entire battery management system to enter a sleep state based on the sleep signal.

[0039] In this embodiment, the power management chip (30) is an SBC (System Basis Chip), which is a highly integrated key component responsible for providing power management, communication interface, security monitoring and other functions for the entire battery management system.

[0040] In this embodiment, the hard-wired switch sleep circuit uses the drive branch (10) to determine if the hard-wired switch is stuck, and drives the output of the ground branch (20) to output a low-level sleep signal to the sleep control terminal of the power management chip (30), thereby enabling the power management chip (30) to control the entire battery management system to enter a sleep state according to the sleep signal. Compared with the prior art, even when the hard-wired switch is stuck, the low-voltage battery management system can quickly enter sleep mode.

[0041] In one embodiment, the drive branch (10) includes:

[0042] The main control chip and the latch are configured such that the input terminal of the main control chip is used as the input terminal of the drive branch (10), the output terminal of the main control chip is connected to the input terminal of the latch, and the output terminal of the latch is used as the output terminal of the drive branch (10).

[0043] The working process of the aforementioned drive branch (10) includes:

[0044] The main control chip obtains a high-level signal for a preset duration sent by the sleep control terminal of the power management chip (30) at its input terminal, determines that the hard-wired switch is stuck, and sends an enable signal to the input terminal of the latch. Based on the enable signal, the latch sends a ground control signal to the input terminal of the grounding branch (20) through its output terminal, thereby controlling the output terminal of the grounding branch (20) to output a low-level sleep signal to the sleep control terminal of the power management chip (30).

[0045] In this embodiment, the specific model of the latch is not limited. For example, the model of the latch can be SN74HCS174QDRQ1.

[0046] In this embodiment, the main control chip is an MCU (Micro Controller Unit), which is usually the existing main control chip in the battery management system of a 12V lithium battery, to perform the hardwired switch jamming judgment and latch enable control.

[0047] In this embodiment, the hard-wired switch sleep circuit uses the main control chip to determine if the hard-wired switch is stuck. It then uses a latch to drive the output of the grounding branch (20) to output a low-level sleep signal to the sleep control terminal of the power management chip (30), thereby enabling the power management chip (30) to control the entire battery management system to enter sleep mode based on the sleep signal. Compared to existing technologies, this allows the low-voltage battery management system to quickly enter sleep mode even when the hard-wired switch is stuck.

[0048] In one embodiment, the grounding branch (20) includes:

[0049] The grounding switch has its control terminal as the input terminal of the grounding branch (20), the input terminal of the grounding switch is connected to the ground, and the output terminal of the grounding switch is the output terminal of the grounding branch (20).

[0050] The working process of the aforementioned grounding switch includes:

[0051] The control terminal of the grounding switch receives the grounding control signal sent by the output terminal of the latch. This grounding control signal can control the grounding switch to close, so that the output terminal of the grounding switch is connected to ground, and then control the output terminal of the grounding switch to output a low-level sleep signal to the sleep control terminal of the power management chip (30).

[0052] In this embodiment, a controllable power switch or an optocoupler can be used.

[0053] In this embodiment, the hard-wired switch sleep circuit uses the drive branch (10) to determine that the hard-wired switch is stuck, and drives the output terminal of the grounding switch to output a low-level sleep signal to the sleep control terminal of the power management chip (30), so that the power management chip (30) controls the entire battery management system to enter the sleep state according to the sleep signal.

[0054] In one embodiment, the latch is configured to send a disconnect control signal to the input of the ground branch (20) after the main control chip is woken up, so as to prevent the output of the ground branch (20) from outputting a sleep signal to the sleep control terminal of the power management chip (30).

[0055] In this embodiment, the hard-wired switch sleep circuit uses the drive branch (10) to determine that the hard-wired switch is stuck, and drives the output of the ground branch (20) to output a low-level sleep signal to the sleep control terminal of the power management chip (30), so that the power management chip (30) controls the entire battery management system to enter the sleep state according to the sleep signal; when the main control chip in the battery management system wakes up from the sleep state, the main control chip controls the latch to send a disconnect control signal to the input of the ground branch (20) to prevent the output of the ground branch (20) from outputting a sleep signal.

[0056] In one embodiment, the grounding switch is configured to be in an on state after receiving a grounding control signal sent by the drive branch (10) and output a sleep signal to the sleep control terminal of the power management chip (30); and to be in an off state after receiving a disconnection control signal sent by the drive branch (10) and avoid outputting a sleep signal to the sleep control terminal of the power management chip (30).

[0057] In this embodiment, the hard-wired switch sleep circuit uses the drive branch (10) to determine that the hard-wired switch is stuck, and drives the output terminal of the grounding switch to output a low-level sleep signal to the sleep control terminal of the power management chip (30), so that the power management chip (30) controls the entire battery management system to enter the sleep state according to the sleep signal. After the control chip in the drive branch (10) wakes up from the sleep state, the drive branch (10) sends a disconnect control signal to the grounding switch, so that the grounding switch is in the off state, ensuring that the battery management system works normally and does not enter the sleep state.

[0058] In one embodiment, the grounding switch is either N-type or P-type. When the grounding switch is N-type, the control terminal of the grounding switch is configured to receive a high-level grounding control signal, thereby connecting the input terminal of the grounding switch to ground. When the grounding switch is P-type, the control terminal of the grounding switch is configured to receive a low-level grounding control signal, thereby connecting the input terminal of the grounding switch to ground.

[0059] In this embodiment of the hard-wired switch sleep circuit, when the grounding switch is of type N, the grounding control signal sent by the output terminal of the latch is a high-level signal, which can control the grounding switch to close, so that the output terminal of the grounding switch is connected to ground; when the grounding switch is of type P, the grounding control signal sent by the output terminal of the latch is a low-level signal, which can control the grounding switch to close, so that the output terminal of the grounding switch is connected to ground.

[0060] In one embodiment, the grounding switch is a transistor, a field-effect transistor, or an insulated-gate bipolar transistor.

[0061] In this embodiment, the hard-wired switch sleep circuit uses the drive branch (10) to determine that the hard-wired switch is stuck, and drives the output terminal of the transistor, field-effect transistor or insulated gate bipolar transistor to output a low-level sleep signal to the sleep control terminal of the power management chip (30), so that the power management chip (30) controls the entire battery management system to enter the sleep state according to the sleep signal.

[0062] In one embodiment, the hardwired switch sleep circuit further includes:

[0063] The input terminal of the level conversion circuit is connected to the output terminal of the hardwired switch, and the output terminal of the level conversion circuit is connected to the sleep control terminal of the power management chip (30).

[0064] The operation of the aforementioned level conversion circuit includes:

[0065] The input terminal of the level conversion circuit receives a low-level signal sent by the hard-wired switch for a preset duration, performs level conversion on the low-level signal, outputs a high-level signal for a preset duration from the output terminal of the level conversion circuit, and sends the high-level signal for a preset duration to the drive branch (10).

[0066] In this embodiment, the level conversion circuit can be implemented using a conventional level conversion chip. For example, the level conversion chip model can be 74HC245, 74LVC4245, etc.

[0067] In this embodiment, the hard-wired switch sleep circuit uses the driving branch (10) to obtain a high-level signal output by the level conversion circuit for a preset duration, and determines that the hard-wired switch is stuck. It then drives the output terminal of the grounding branch (20) to output a low-level sleep signal to the sleep control terminal of the power management chip (30), thereby enabling the power management chip (30) to control the entire battery management system to enter a sleep state according to the sleep signal.

[0068] In one embodiment, a battery management system is provided, which includes the hard-wired switch sleep circuit described in any of the preceding embodiments. The battery management system may also include existing modules such as a battery voltage monitoring module, a current detection module, and an overcharge protection module, which will not be detailed in this embodiment.

[0069] In this embodiment, the battery management system uses the drive branch (10) of the hard-wired switch sleep circuit to determine if the hard-wired switch is stuck, and drives the output of the ground branch (20) to output a low-level sleep signal to the sleep control terminal of the power management chip (30), thereby enabling the power management chip (30) to control the entire battery management system to enter a sleep state according to the sleep signal. Compared with the prior art, even when the hard-wired switch is stuck, the low-voltage battery management system can quickly enter sleep mode.

[0070] In one embodiment, a vehicle is provided, the vehicle including the aforementioned battery management system.

[0071] In this embodiment, the vehicle's battery management system includes a hard-wired switch sleep circuit. The drive branch (10) of this sleep circuit determines if the hard-wired switch is stuck and drives the output of the ground branch (20) to output a low-level sleep signal to the sleep control terminal of the power management chip (30). This allows the power management chip (30) to control the entire battery management system to enter a sleep state based on the sleep signal. Compared to existing technologies, this allows the low-voltage battery management system to quickly enter sleep mode even when the hard-wired switch is stuck.

[0072] In this application, "multiple" refers to two or more.

[0073] In this application, unless otherwise expressly defined, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection between two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0074] The terms “first,” “second,” “third,” “fourth,” etc., in this application (if present) are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0075] In this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, in this application, the character " / " generally indicates that the preceding and following related objects have an "or" relationship.

[0076] Unless otherwise specified, all steps in this application may be performed sequentially or randomly. For example, if the method includes steps A and B, it means that the method may include steps A and B performed sequentially, or it may include steps B and A performed sequentially. For example, if the method may also include step C, it means that step C may be added to the method in any order. For example, the method may include steps A, B, and C, or it may include steps A, C, and B, or it may include steps C, A, and B, etc.

[0077] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A hardwire switch hibernation circuit for a battery management system, the circuit comprising: The hard-wired switch sleep circuit includes: The system includes a drive branch and a ground branch. The input terminal of the drive branch is connected to the output terminal of the power management chip of the battery management system. The output terminal of the drive branch is connected to the input terminal of the ground branch. The output terminal of the ground branch is connected to the sleep control terminal of the power management chip of the battery management system. The drive branch is used to send a ground control signal to the input terminal of the ground branch when it is determined that the hard-wired switch is stuck, so as to control the output terminal of the ground branch to output a sleep signal to the sleep control terminal of the power management chip.

2. The hardwire switch hibernate circuit of claim 1, wherein, The driving branch includes: The system includes a main control chip and a latch. The input terminal of the main control chip serves as the input terminal of the drive branch, and the output terminal of the main control chip is connected to the input terminal of the latch. The output terminal of the latch serves as the output terminal of the drive branch.

3. The hardwire switch hibernate circuit of claim 1, wherein, The grounding branch includes: A grounding switch, wherein the control terminal of the grounding switch serves as the input terminal of the grounding branch, the input terminal of the grounding switch is connected to ground, and the output terminal of the grounding switch serves as the output terminal of the grounding branch.

4. The hardwire switch hibernation circuit of claim 2, wherein, The latch is configured to send a disconnect control signal to the input of the ground branch after the main control chip is woken up, so as to prevent the output of the ground branch from outputting a sleep signal to the sleep control terminal of the power management chip.

5. The hardwire switch hibernation circuit of claim 3, wherein, The grounding switch is configured to be in an ON state after receiving a grounding control signal sent by the drive branch, and to output a sleep signal to the sleep control terminal of the power management chip; and to be in an OFF state after receiving a disconnection control signal sent by the drive branch, so as to avoid outputting a sleep signal to the sleep control terminal of the power management chip.

6. The hardwire switch hibernation circuit of claim 3, wherein, The grounding switch is either N-type or P-type. When the grounding switch is N-type, the control terminal of the grounding switch is configured to receive a high-level grounding control signal, thereby connecting the input terminal of the grounding switch to ground. When the grounding switch is P-type, the control terminal of the grounding switch is configured to receive a low-level grounding control signal, thereby connecting the input terminal of the grounding switch to ground.

7. The hardwire switch hibernate circuit of claim 6, wherein, The grounding switch is a transistor, field-effect transistor, or insulated-gate bipolar transistor.

8. The hardwire switch hibernation circuit of any one of claims 1 to 7, wherein, The hard-wired switch sleep circuit also includes: A level conversion circuit, wherein the input terminal of the level conversion circuit is connected to the output terminal of a hardwired switch, and the output terminal of the level conversion circuit is connected to the sleep control terminal of the power management chip.

9. A battery management system, characterized by, The battery management system includes a hard-wired switch sleep circuit as described in any one of claims 1 to 8.

10. A vehicle characterized by comprising: The vehicle includes the battery management system as described in claim 9.

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