A chip-scale packaged LED structure

By introducing copper foil pads and a full-coverage encapsulation layer into chip-scale packaged LEDs, the problems of poor airtightness and thermal conductivity are solved, resulting in better heat dissipation and airtightness, product compatibility and stability, and reduced development costs.

CN224521511UActive Publication Date: 2026-07-17SUZHOU LEITING OPTOELECTRONICS TECH CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
SUZHOU LEITING OPTOELECTRONICS TECH CO LTD
Filing Date
2025-07-23
Publication Date
2026-07-17

AI Technical Summary

Technical Problem

Existing chip-scale packaged LEDs suffer from poor hermetic bonding and thermal conductivity.

Method used

Design a chip-level packaged LED structure, including a flip chip and two spaced copper foil pads. The copper foil pads are connected to the positive and negative electrodes of the flip chip respectively. The outer periphery is wrapped with encapsulating colloid, and the bottom surface of the encapsulating colloid is flush with the bottom surface of the copper foil pads. The structure adopts a copper, nickel, silver and gold layer structure, and the electrodes are connected using solder paste or conductive adhesive. The encapsulating colloid is selected from epoxy adhesive or silicone.

Benefits of technology

The product's heat dissipation and airtightness have been improved. The product thickness is 0.1-0.15mm. It is compatible with CSP products on the market, with lower development costs, more stable quality, and better compatibility.

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Abstract

This utility model belongs to the field of LED technology and relates to a chip-level packaged LED structure, including a flip chip and two copper foil pads arranged at intervals below the flip chip. The two copper foil pads are respectively connected to the positive and negative electrodes of the flip chip. The structure formed by the connection of the flip chip and the two copper foil pads is surrounded by an encapsulating colloid, and the bottom surface of the encapsulating colloid is flush with the bottom surface of the two copper foil pads. This utility model has good heat dissipation and airtightness, can be directly replaced by CSP products on the market without affecting customer end-user use, and has advantages in development cost, better quality and stability, and better practicality, compatibility and performance.
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Description

Technical Field

[0001] This utility model belongs to the field of LED technology, specifically relating to a chip-level packaged LED structure. Background Technology

[0002] With the development of CSP LED (Chip Scale Package Light Emitting Diode) devices, the application environments of chip-scale packaged LEDs are becoming more and more diverse, and the market's requirements for chip-scale packaged LEDs are also becoming increasingly stringent.

[0003] Currently, the thickness of existing chip-level packaged LEDs is 0.15-0.2mm. The principle is that the colloid completely covers the flip chip, exposing the positive and negative electrodes on the bottom of the chip. The flip chip electrodes are the solder pads of the product. Due to the influence of its product structure characteristics, there are problems with poor airtightness and thermal conductivity. Utility Model Content

[0004] The purpose of this invention is to address the defects and shortcomings in the existing technology by designing a chip-level packaged LED structure that is simple in structure, stable and reliable, and can improve the heat dissipation and airtightness of the product.

[0005] To achieve the above objectives, the technical solution adopted by this utility model is: a chip-level packaged LED structure, including a flip chip and two copper foil pads arranged at intervals below the flip chip. The two copper foil pads are respectively connected to the positive electrode and the negative electrode of the flip chip. The outer periphery of the structure formed by the connection of the flip chip and the two copper foil pads is wrapped with an encapsulating colloid. The bottom surface of the encapsulating colloid is flush with the bottom surface of the two copper foil pads.

[0006] Preferably, both copper foil pads include a copper layer, a nickel layer, a silver layer, and a gold layer.

[0007] Preferably, the outer end of the copper foil pad protrudes from the flip chip.

[0008] Preferably, the positive and negative electrodes of the flip chip are both connected to their respective copper foil pads via die bond adhesive.

[0009] Preferably, the die bond adhesive is selected from solder paste or conductive adhesive.

[0010] Preferably, the encapsulating colloid is epoxy resin or silicone.

[0011] Preferably, the encapsulating colloid is a transparent colloid, a mist colloid, or a fluorescent colloid.

[0012] After adopting the above technical solution, the chip-level packaged LED structure provided by this utility model has the following beneficial effects:

[0013] This invention improves product heat dissipation through the structural design of copper foil pads; the full-coverage encapsulation layer design ensures full bonding with the copper foil pads, thereby enhancing the product's airtightness; furthermore, the product thickness is 0.1-0.15mm, and the pads and product dimensions are compatible with commercially available CSP products for direct replacement, without affecting customer end-user use. It also offers advantages in development cost, more stable quality, and superior practicality, compatibility, and performance. Attached Figure Description

[0014] Figure 1 This is a schematic diagram of a chip-level packaged LED structure according to the present invention;

[0015] Figure 2 This is a schematic diagram illustrating the manufacturing process of a chip-level packaged LED structure according to this utility model.

[0016] Among them: flip chip 1, copper foil pad 2, encapsulating colloid 3, die bond adhesive 4. Detailed Implementation

[0017] The present invention will now be described in further clear and complete detail with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit the present invention or its application or use. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort are within the scope of protection of the present invention.

[0018] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to this application. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0019] Unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps described in these embodiments do not limit the scope of this invention. It should also be understood that, for ease of description, the dimensions of the various parts shown in the drawings are not drawn to actual scale. Techniques, methods, and devices known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and devices should be considered part of the specification. In all examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limitations. Therefore, other examples of exemplary embodiments may have different values. It should be noted that similar reference numerals and letters in the following drawings denote similar items; therefore, once an item is defined in one drawing, it need not be further discussed in subsequent drawings.

[0020] In the description of this utility model, it should be understood that the directional terms such as "front, back, up, down, left, right", "horizontal, vertical, horizontal" and "top, bottom" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this utility model and simplifying the description. Unless otherwise stated, these directional terms do not indicate or imply that the device or element referred to must have a specific orientation or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on the scope of protection of this utility model. The directional terms "inner" and "outer" refer to the inner and outer contours of each component itself.

[0021] For ease of description, spatial relative terms such as "above," "on top of," "on the upper surface of," "above," etc., are used herein to describe the spatial positional relationship of a device or feature as shown in the figures to other devices or features. It should be understood that spatial relative terms are intended to encompass different orientations in use or operation beyond the orientation of the device as described in the figures. For example, if the device in the figures were inverted, a device described as "above" or "on top of" other devices or structures would subsequently be positioned as "below" or "under" other devices or structures. Thus, the exemplary term "above" can include both "above" and "below." The device may also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatial relative descriptions used herein will be interpreted accordingly.

[0022] Furthermore, it should be noted that the use of terms such as "first" and "second" to define components is merely for the purpose of distinguishing the corresponding components. Unless otherwise stated, the above terms have no special meaning and therefore cannot be construed as limiting the scope of protection of this utility model.

[0023] This utility model discloses a chip-level packaged LED structure, such as... Figure 1 As shown, it includes a flip chip 1 and two copper foil pads 2 arranged at intervals below the flip chip 1. The two copper foil pads 2 are respectively connected to the positive electrode and the negative electrode of the flip chip 1. The outer periphery of the structure formed by the connection of the flip chip 1 and the two copper foil pads 2 is wrapped with an encapsulating colloid 3. The bottom surface of the encapsulating colloid 3 is flush with the bottom surface of the two copper foil pads 2.

[0024] The two copper foil pads 2 each include a copper layer, a nickel layer, a silver layer, and a gold layer. The outer end of the copper foil pad 2 protrudes from the flip chip 1. The positive and negative electrodes of the flip chip 1 are connected to their respective copper foil pads 2 through die bond adhesive 4. The die bond adhesive 4 is selected from solder paste or conductive adhesive. The encapsulating colloid 3 is selected from epoxy adhesive or silicone adhesive. The encapsulating colloid 3 is a transparent colloid, a mist colloid, or a fluorescent colloid.

[0025] When manufacturing a chip-level packaged LED structure according to this utility model, such as... Figure 2 As shown, the bottom surface of the double-layer copper foil substrate (BT / FR4 / CEM-3) is completely etched to remove the copper foil and expose the substrate. The front surface is etched into the designed layout shape. A flip chip (the appropriate size flip chip is selected according to the product size design) is die-bonded to the layout position of the PCB. The chip is connected to the bottom substrate through reflow soldering or eutectic soldering. After die bonding, the semi-finished product undergoes a potting process. An encapsulating adhesive layer (epoxy or silicone) is sealed to the front surface of the PCB substrate using a mold, and the chip is completely wrapped. (This encapsulating adhesive layer can be made into a transparent adhesive, a mist adhesive, or a fluorescent adhesive.) The cured adhesive is then baked for a long time to ensure complete bonding between the adhesive and the substrate. The molded product is then ground to remove the substrate on the back of the substrate, exposing the copper foil pads on the surface of the substrate. The subsequent processes include cutting, testing, and tape-and-reel packaging of the entire product.

[0026] In summary, the chip-level packaged LED structure provided by this utility model has good heat dissipation and airtightness, can be directly replaced by CSP products on the market without any impact on customer terminal use, and has advantages in development cost, better quality and stability. It has the advantages of better practicality, better compatibility and better effect, and has great market value, and is worthy of widespread promotion and application.

[0027] The above description is only a preferred embodiment of the present utility model, but the protection scope of the present utility model is not limited thereto. Any equivalent substitutions or changes made by those skilled in the art within the technical scope disclosed in the present utility model, based on the technical solution and the inventive concept of the present utility model, should be included within the protection scope of the present utility model.

Claims

1. A chip-level packaged LED structure, characterized in that: It includes a flip chip (1) and two copper foil pads (2) arranged at intervals below the flip chip (1). The two copper foil pads (2) are respectively connected to the positive electrode and the negative electrode of the flip chip (1). The outer periphery of the structure formed by the connection of the flip chip (1) and the two copper foil pads (2) is wrapped with an encapsulating colloid (3). The bottom surface of the encapsulating colloid (3) is flush with the bottom surface of the two copper foil pads (2).

2. The chip-level packaged LED structure according to claim 1, characterized in that: Both copper foil pads (2) include a copper layer, a nickel layer, a silver layer, and a gold layer.

3. The chip-level packaged LED structure according to claim 1, characterized in that: The outer end of the copper foil pad (2) protrudes from the flip chip (1).

4. The chip-level packaged LED structure according to claim 1, characterized in that: The positive and negative electrodes of the flip chip (1) are connected to their respective copper foil pads (2) by die bond adhesive (4).

5. The chip-level packaged LED structure according to claim 4, characterized in that: The die bond adhesive (4) is selected from solder paste or conductive adhesive.

6. The chip-level packaged LED structure according to claim 1, characterized in that: The encapsulating colloid (3) is selected from epoxy resin or silicone.

7. The chip-level packaged LED structure according to claim 1, characterized in that: The encapsulating colloid (3) is a transparent colloid, a mist colloid, or a fluorescent colloid.