一种可承载大电流的半导体产品封装结构

Abstract

本实用新型公开了一种可承载大电流的半导体产品封装结构，涉及半导体技术领域，包括基岛、支撑杆和管脚，包括基岛、支撑杆、左管脚、右管脚和封装外壳，支撑杆固定设置在基岛的一侧，左管脚、右管脚分别通过引线与基岛上的芯片连接，基岛与支撑杆、左管脚和右管脚的一端封装于封装外壳的内部，支撑杆、左管脚和右管脚的另一端延伸到封装外壳的一侧外部，支撑杆设置于基岛纵向中心线左侧预设偏移量位置，右管脚具有加宽结构，右管脚宽度在0.76～2.0mm范围内，且右管脚的纵向方向尺寸满足焊接至少两根直径≥0.5mm的引线。本实用新型的电流承载能力显著提升，提升了抗热应力能力，空间利用率最大化，电流分布均匀性改善，热管理效率提升。

Claims

1. A semiconductor product packaging structure capable of carrying high current, comprising a base island (1), a support rod (2), a left pin (3), a right pin (4), and a packaging shell (5), wherein the support rod (2) is fixedly disposed on one side of the base island (1), the left pin (3) and the right pin (4) are respectively connected to a chip on the base island (1) via leads (6), one end of the base island (1) and the support rod (2), the left pin (3), and the right pin (4) are encapsulated inside the packaging shell (5), and the other end of the support rod (2), the left pin (3), and the right pin (4) extends to the outside of one side of the packaging shell (5), characterized in that, The support rod (2) is set at a preset offset position to the left of the longitudinal center line of the base island (1). The right tube (4) has a widened structure. The width of the right tube (4) is in the range of 0.76~2.0mm, and the longitudinal dimension of the right tube (4) meets the requirement of welding at least two leads (6) with a diameter ≥0.5mm.

2. The semiconductor product package structure capable of carrying large current according to claim 1, wherein: The lead wire (6) connected to the right pin (4) is an aluminum wire.

3. The semiconductor product package structure capable of carrying large current according to claim 1, wherein: The preset offset is 0.2~0.5mm.

4. The semiconductor product packaging structure capable of carrying high current according to claim 1, characterized in that: The width of the right pin (4) is 1.0~1.5mm.

5. The semiconductor product package structure capable of carrying large current according to claim 2, wherein: The aluminum wire adopts a flat structure design, and its cross-sectional area is positively correlated with the width of the right pin (4).

6. The semiconductor product package structure capable of carrying large current according to claim 1, wherein: The packaging structure adopts the standard package size of TO252 and TO220, and maximizes space utilization through an asymmetrical support layout.

7. A semiconductor product packaging structure capable of carrying high current according to any one of claims 1-6, characterized in that: The support rod (2) is arranged on the left side of the longitudinal center line of the base island (1), and the preset offset is calculated according to the length of the base island (1) according to the following formula: where L is the length of the island (1) and Wmax is the maximum width of the right pin (4) after expansion, is the height of the island (1). The right pin (4) has a gradually widened structure, and its width increases linearly from the base island (1) end to the pin end, forming an optimized current density distribution.

Images