一种贴片式MOS管封装结构

By assembling the frame and the pin socket, the problems of loose heat sink position and pin connection deviation in MOSFET packaging are solved, realizing accurate connection between MOSFET and pin, reducing the package defect rate and improving packaging efficiency.

CN224521656UActive Publication Date: 2026-07-17REASUNOS SEMICON TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
REASUNOS SEMICON TECH CO LTD
Filing Date
2025-08-06
Publication Date
2026-07-17

AI Technical Summary

Technical Problem

In the current MOSFET packaging process, the heat sink and the MOSFET are loosely positioned, making packaging inconvenient and causing pin connection deviations, resulting in a high probability of defective products.

Method used

The assembly frame, pin sockets, and chip slots are combined to restrict the mounting positions of the MOSFETs and surface mount pins. The assembly mechanism ensures accurate connection. The auxiliary components are integrated with the MOSFETs as a whole, and the epoxy molding compound frame is used to improve mechanical strength.

Benefits of technology

It achieves accurate connection between MOSFETs and pins, reduces the probability of defective products in packaging, and makes the packaging process faster and more convenient.

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Abstract

本实用新型公开了一种贴片式MOS管封装结构，包括塑封壳体，所述塑封壳体的内部分别设有MOS管芯片、贴片引脚、陶瓷绝缘板和散热片，贴片引脚的钎焊端均穿出塑封壳体的内部，还包括组装机构；组装机构：其包括组装框架、引脚插孔和芯片槽，所述组装框架设置于塑封壳体的内部，组装框架的内部设有与MOS管芯片配合安装的芯片槽，组装框架的前后侧面分别设有与贴片引脚配合安装的引脚插孔，该贴片式MOS管封装结构，通过组装框架、引脚插孔和芯片槽的配合，对MOS管和贴片引脚的安装位置进行限制，保证MOS管与引脚的准确连接，降低封装不良品出现的概率，将辅助部件与MOS管在封装时组合为整体，使贴片式MOS管的封装更加快速方便。
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Claims

1. A patch type MOS tube packaging structure, comprising a plastic sealing shell (1), the inside of the plastic sealing shell (1) is respectively provided with a MOS tube core chip (2), a patch pin (3), a ceramic insulating plate (4) and a heat sink (5), the soldering end of the patch pin (3) penetrates the inside of the plastic sealing shell (1), characterized in that: It also includes an assembly mechanism (6); Assembly mechanism (6): It includes an assembly frame (61), pin sockets (63) and chip slots (66). The assembly frame (61) is located inside the plastic encapsulation housing (1). The assembly frame (61) has a chip slot (66) that is installed in conjunction with the MOS transistor chip (2). The front and rear sides of the assembly frame (61) are respectively provided with pin sockets (63) that are installed in conjunction with the surface mount pins (3). The pin sockets (63) are all connected to the chip slots (66). The ceramic insulating plate (4) and the heat sink (5) are both located inside the assembly frame (61).

2. The patch MOSFET package structure of claim 1, wherein: The assembly frame (61) includes a lower frame (611) and an upper frame (612). Both the lower frame (611) and the upper frame (612) are located inside the plastic encapsulation housing (1). The upper surface of the lower frame (611) is provided with a chip slot (66), and the front surface of the lower frame (611) and the rear side of the upper frame (612) are provided with pin sockets (63).

3. The surface-mount MOS transistor package structure according to claim 2, characterized in that: The assembly mechanism (6) also includes an insulating groove (64), which is respectively disposed on the lower surface of the lower frame (611) and the upper surface of the upper frame (612), and the ceramic insulating plate (4) is located inside the insulating groove (64).

4. The patch MOSFET package structure of claim 3, wherein: The assembly mechanism (6) also includes slots (65), which are respectively located inside the insulating groove (64). The left end of the upper slot (65) and the right end of the lower slot (65) are both open structures, and the insert plates of the heat sink (5) are all inserted into the inside of the slots (65).

5. The patch MOSFET package structure of claim 4, wherein: The assembly mechanism (6) also includes a connecting baffle (67), which is respectively disposed on the left end of the lower frame (611) and the right end of the upper frame (612). The connecting baffle (67) is installed in conjunction with the opening of the slot (65).

6. The patch MOSFET package structure of claim 5, wherein: The assembly mechanism (6) also includes an adhesive applicator (62), which is respectively located on the right side of the lower frame (611) and the left side of the upper frame (612). The adhesive applicator (62) is installed in conjunction with the connecting baffle (67).

7. The patch MOSFET package structure of claim 2, wherein: Both the lower frame (611) and the upper frame (612) are epoxy molding compound frames.