一种VDMOS陶瓷封装结构

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By using a sealant layer and nano-silver sintered adhesive in the packaging structure of the VDMOS transistor, combined with the design of a metal frame and a tube cap, the problem of silver ion migration under high temperature and high humidity conditions was solved, thereby achieving device stability and reliability, simplifying the packaging process and reducing costs.

CN224521671UActive Publication Date: 2026-07-17HUATONGXINDIAN (NANCHANG) ELECTRONIC TECH CO LTD

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Patent Information

Authority / Receiving Office: CN · China
Patent Type: Utility models(China)
Current Assignee / Owner: HUATONGXINDIAN (NANCHANG) ELECTRONIC TECH CO LTD
Filing Date: 2025-07-21
Publication Date: 2026-07-17

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Abstract

本实用新型公开了一种VDMOS陶瓷封装结构，涉及半导体器件封装技术领域，该VDMOS陶瓷封装结构包括承载体，所述承载体的一面设置填充材料，所述填充材料背向所述承载体的一面连接元器件，所述承载体朝向所述元器件的一面连接金属框架，所述金属框架背向所述承载体的一面连接管盖，所述管盖与所述金属框架围合形成封装区，所述封装区内设置密封胶层，所述密封胶层用于密封所述元气件及所述填充材料，通过密封胶层密封元器件及填充材料，形成一定厚度的连续屏障避免水汽侵蚀，本实用新型能够解决现有技术中高温高湿带电环境下容易发生银离子迁移的问题。

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Claims

1. A VDMOS ceramic package structure, characterized in that, include: A carrier body has a filling material on one side, a component is connected to the side of the filling material facing away from the carrier body, a metal frame is connected to the side of the carrier body facing the component, and a tube cap is connected to the side of the metal frame facing away from the carrier body. The tube cap and the metal frame enclose an encapsulation area, and a sealing layer is provided in the encapsulation area. The sealing layer is used to seal the component and the filling material.

2. The VDMOS ceramic package structure of claim 1, wherein, The carrier includes a tube base, one side of which is connected to a heat sink. The tube base is made of copper or aluminum, and the heat sink is made of an AL2O3 ceramic substrate, an ALN ceramic substrate, or a BeO ceramic substrate.

3. The VDMOS ceramic package structure of claim 2, wherein, The heat sink has several grooves on the side facing away from the tube base. A fixing block is installed in the groove. A filling material is installed on the side of the fixing block facing away from the groove. Components are connected to the side of the filling material facing away from the fixing block.

4. The VDMOS ceramic package structure of claim 3, wherein, The components include two resistors and two chips. The resistors are coaxially arranged with the heat sink, and the two chips are located on opposite sides of the resistors.

5. The VDMOS ceramic package structure of claim 3, wherein, The metal frame is electrically connected to the chip via a first connection line, and the chip is electrically connected to the resistor via a second connection line.

6. The VDMOS ceramic packaging structure according to claim 5, characterized in that the filling material is nano-silver sintered adhesive, the sealant is epoxy resin or silicone, and the thickness of the sealant layer is greater than the height of the first connecting line and the second connecting line.

7. The VDMOS ceramic package structure of claim 1, wherein, The side of the heat sink facing away from the tube base is electroplated or sintered with the metal frame.