封装芯片及电子设备

Abstract

本申请涉及封装芯片技术领域，公开了一种封装芯片及电子设备。本申请的封装芯片的导热涂料包括绝缘围坝涂料和非绝缘涂料，非绝缘涂料具有更好的导热效果，从而提高芯片的散热效果，以提高芯片的性能。绝缘围坝涂料能够包裹非绝缘涂料，从而避免非绝缘涂料溅射到封装芯片中的其他电子器件上，以降低电子器件短路和被电压击穿的风险，提高封装芯片的使用效果。

Claims

1. A packaged chip, characterized in that, Includes the chip, substrate, and shielding cover; Along the thickness direction of the packaged chip, the shielding cover is disposed on the substrate and forms a first receiving cavity with the substrate, and the chip is disposed in the first receiving cavity; The chip includes a first surface and a second surface that are opposite to each other along the thickness direction of the packaged chip. The first surface of the chip is filled with a thermally conductive coating between itself and the shielding cover. The second surface of the chip is fixedly connected to the substrate. The thermally conductive coating includes an insulating damming coating and a non-insulating coating. The insulating damming coating is applied to the first surface and forms a frame-like structure on the first surface. The insulating dam coating, the first surface, and the shielding cover form a first subspace, and the non-insulating coating fills the first subspace.

2. The packaged chip of claim 1, wherein, The insulating dam coating includes rigid insulating adhesive and thermally conductive soft adhesive; The thermally conductive soft adhesive and the rigid insulating adhesive are arranged sequentially along the direction from the inside to the outside of the first subspace.

3. The chip package of claim 2, wherein, The rigid insulating adhesive includes UV-curable adhesive, encapsulating adhesive, and filler adhesive.

4. The chip package of claim 2, wherein, The thermally conductive soft adhesive includes a highly thermally conductive gel.

5. The chip package of claim 1, wherein, The chip includes a processor chip, and along the thickness direction of the packaged chip, the surface of the processor chip near the substrate is the second surface of the chip.

6. The chip package of claim 5, wherein, The second surface of the chip is connected to the substrate via a first solder joint. Along the thickness direction of the packaged chip, a first thermally conductive filler is filled between the second surface of the chip and the substrate, so that the first thermally conductive filler wraps around the first solder joint.

7. The chip package of claim 5, wherein the first and second dielectric layers are formed of a material selected from the group consisting of silicon dioxide, silicon nitride, silicon oxynitride, and silicon carbide. The chip also includes a memory chip, and the memory chip and the processor chip are stacked together along the thickness direction of the packaged chip; The memory chip and the processor chip are connected by a second solder joint.

8. The chip package of claim 7, wherein, Along the thickness direction of the packaged chip, a second thermally conductive filler is filled between the processor chip and the memory chip, and the second thermally conductive filler wraps around the second solder joint.

9. The chip package of claim 1, wherein, The first receiving cavity also includes electronic devices, which are arranged circumferentially around the chip on the substrate, and the surface of the electronic devices is coated with an insulating layer.

10. The chip package of claim 9, wherein, The thickness of the insulating layer is 10 micrometers to 30 micrometers.

11. The chip package of claim 1, wherein The non-insulating coating includes fluorescent materials.

12. The chip package of claim 1, wherein, The thermally conductive coating has a dimension of 0.01 mm to 0.05 mm along the thickness direction of the packaged chip.

13. An electronic device, comprising: The packaged chip includes any one of claims 1-9.

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