Microelectromechanical system structure, semiconductor device, and electronic apparatus
By forming protrusions on the insulating layer of the substrate wafer and using Al-Ge eutectic bonding technology, the problem of uneven thickness caused by excessive etching in MEMS structures is solved, thereby improving the flatness and performance of the device wafer.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- NINGBO SEMICON INT CORP
- Filing Date
- 2025-07-30
- Publication Date
- 2026-07-21
AI Technical Summary
MEMS structures suffer from over-etching during manufacturing, which leads to uneven wafer thickness and affects performance.
A protrusion is formed on the insulating layer of the substrate wafer to avoid forming a protrusion on the second surface of the device wafer. The package wafer is bonded to the substrate wafer through the first and second bonding layers. Al-Ge eutectic bonding technology is used to achieve hermeticity and electrical interconnection.
This reduces excessive etching of the device wafer, ensures a horizontal structure on the second surface, improves the thickness uniformity of the device wafer, and enhances the performance and reliability of the microelectromechanical system structure.
Smart Images
Figure CN224530623U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor technology, specifically to a microelectromechanical system structure, semiconductor device, and electronic device. Background Technology
[0002] MEMS (Micro-Electro-Mechanical Systems) structures integrate microelectronics, microfabrication, and precision mechanics, and achieve sensing functions by constructing micron- or even nanometer-scale mechanical structures and electronic circuits on substrate materials such as silicon wafers.
[0003] The fabrication process of MEMS structures involves multiple deep etching processes, which can lead to over-etching and affect the performance of MEMS structures. Therefore, how to improve over-etching and enhance the performance of MEMS structures has become a pressing technical problem for those skilled in the art. Utility Model Content
[0004] To address the aforementioned issues, embodiments of this application provide a microelectromechanical system (MEMS) structure, device, and electronic device to improve over-etching and enhance the performance of MEMS structures.
[0005] In a first aspect, embodiments of this application provide a microelectromechanical system structure, including:
[0006] The packaged wafer includes: a device wafer and a first bonding layer;
[0007] The device wafer has a first surface and a second surface opposite to each other; the second surface is the surface away from the top surface of the packaged wafer and has a horizontal structure; the first bonding layer is located on the second surface;
[0008] The substrate wafer located below the packaging wafer includes:
[0009] Insulating layer;
[0010] The boss is located on the insulating layer, and the position of the boss corresponds to the position of the first bonding layer;
[0011] The second bonding layer is partially located on the protrusion; the substrate wafer and the package wafer are bonded through the first bonding layer and the second bonding layer.
[0012] Secondly, embodiments of this application provide a semiconductor device, including the microelectromechanical system structure as described in the first aspect.
[0013] Thirdly, embodiments of this application provide an electronic device, including the semiconductor device of the second aspect.
[0014] The microelectromechanical system structure provided in this application includes: a packaged wafer, comprising: a device wafer and a first bonding layer; the device wafer has a first surface and a second surface opposite to each other; the second surface is a surface away from the top surface of the packaged wafer and has a horizontal structure; the first bonding layer is located on the second surface; a substrate wafer located below the packaged wafer, the substrate wafer including: an insulating layer; a boss located on the insulating layer, the position of the boss corresponding to the position of the first bonding layer; a second bonding layer, a portion of the second bonding layer located on the boss; the substrate wafer and the packaged wafer are bonded through the first bonding layer and the second bonding layer.
[0015] As can be seen, in the microelectromechanical system structure provided by this embodiment, protrusions are formed on the insulating layer of the substrate wafer, thereby avoiding the formation of protrusions on the second surface of the device wafer. This prevents the second surface from being affected by the etching process used to form the protrusions. In related technologies, forming protrusions on the second surface of the device wafer can lead to unevenness of the final second surface due to insufficient uniformity of the etching process, resulting in uneven thickness of the device wafer and thus affecting the performance of the microelectromechanical system structure. Therefore, the technical solution provided by this embodiment can reduce excessive etching of the second surface of the device wafer, making the second surface of the device wafer a horizontal structure, improving the uneven thickness of the device wafer, and enhancing the performance of the microelectromechanical system structure. Attached Figure Description
[0016] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.
[0017] Figure 1 This is a schematic diagram of the microelectromechanical system structure provided in this embodiment of the present invention;
[0018] Figure 2 This is a flowchart illustrating a method for forming a microelectromechanical system structure according to an embodiment of the present invention.
[0019] Figure 3 This is another schematic flowchart of the method for forming a microelectromechanical system structure provided in this embodiment of the present invention;
[0020] Figure 4 This is a schematic diagram of the first structure obtained in the method for forming the microelectromechanical system structure provided in this embodiment of the present invention;
[0021] Figure 5This is another schematic flowchart of the method for forming a microelectromechanical system structure provided in this embodiment of the present invention;
[0022] Figure 6 This is a schematic diagram of the second structure obtained in the method for forming the microelectromechanical system structure provided in this embodiment of the present invention;
[0023] Figure 7 This is a schematic diagram of the third structure obtained in the method for forming the microelectromechanical system structure provided in this embodiment of the present invention;
[0024] Figure 8 This is a schematic diagram of the fourth structure obtained in the method for forming the microelectromechanical system structure provided in this embodiment of the present invention;
[0025] Figure 9 This is a schematic diagram of the fifth structure obtained in the method for forming the microelectromechanical system structure provided in this embodiment of the present invention;
[0026] Figure 10 This is a schematic diagram of the sixth structure obtained in the method for forming the microelectromechanical system structure provided in this embodiment of the present invention;
[0027] Figure 11 This is a schematic diagram of the seventh structure obtained in the method for forming the microelectromechanical system structure provided in this embodiment of the present invention;
[0028] Figure 12 This is a schematic diagram of the first structure obtained from related technologies;
[0029] Figure 13 This is a schematic diagram of the second structure obtained from related technologies;
[0030] Figure 14 This is a schematic diagram of the third structure obtained from related technologies;
[0031] Figure 15 This is a schematic diagram of the fourth structure obtained from related technologies;
[0032] Figure 16 This is a schematic diagram of the fifth structure obtained from related technologies;
[0033] Figure 17 This is a schematic diagram of the sixth structure obtained from related technologies;
[0034] Figure 18 This is a schematic diagram of the seventh structure obtained from related technologies;
[0035] Figure 19 This is a schematic diagram of the final MEMS structure obtained from related technologies. Detailed Implementation
[0036] Microelectromechanical systems (MEMS) structures combine mechanical components (such as microcantilever beams and diaphragms) and electronic components, forming three-dimensional structures on semiconductor substrates using microfabrication techniques. Because MEMS structures typically have complex three-dimensional structures, multiple deep etching processes are required to form microcantilever beams, diaphragms, microchannels, and other micromechanical structures. During these etching processes, over-etching can easily occur due to factors such as non-uniform etching rates, mask precision limitations, and the stability of the etching equipment.
[0037] Over-etching can cause deviations between the dimensions of MEMS structures and their design dimensions. This is mainly manifested in over-etching of the device wafers within the MEMS structure, resulting in uneven wafer thickness. For example, the width and length of a microcantilever beam structure may become narrower, and the thickness of a diaphragm structure may be reduced. This alters the mechanical properties of the micromechanical structure, making it unable to meet the design requirements for resonant frequency, sensitivity, and other performance indicators.
[0038] To address the aforementioned issues, this invention provides a microelectromechanical system (MEMS) structure comprising a device wafer with a horizontal surface (i.e., a second surface with a horizontal structure), thereby improving the thickness uniformity of the device wafer and enhancing the performance of the MEMS structure.
[0039] Please refer to Figure 1 , Figure 1 This is a schematic diagram of the microelectromechanical system structure provided in an embodiment of the present invention.
[0040] like Figure 1 As shown, the microelectromechanical system structure includes:
[0041] The packaged wafer 1 includes: a device wafer 11 and a first bonding layer 12;
[0042] The device wafer 11 has a first surface 111 and a second surface 112 opposite to each other; the second surface 112 is a surface away from the top surface T of the packaged wafer 1 and has a horizontal structure; the first bonding layer 12 is located on the second surface 112;
[0043] The substrate wafer 2 is located below the packaged wafer 1, and the substrate wafer 2 includes:
[0044] Insulation layer 21;
[0045] A boss 22 is located on the insulating layer 21, and the position of the boss 22 corresponds to the position of the first bonding layer 12;
[0046] The second bonding layer 23 is partially located on the boss 22; the substrate wafer 2 and the package wafer 1 are bonded through the first bonding layer 12 and the second bonding layer 23.
[0047] The packaging wafer 1 is a crucial component used to protect the MEMS structure and enable its interface with the external environment. The specific function and form of the packaging wafer 1 vary depending on the specific MEMS device and application.
[0048] It should be noted that, from the perspective of the initial process of manufacturing MEMS structures, the top surface T can also be called the back surface or ground of the packaged wafer 1. That is, in the initial process of manufacturing the packaged wafer 1, the top surface T is in contact with the ground or a plane of a certain platform, so that the packaged wafer 1 can be processed.
[0049] The first bonding layer 12 and the second bonding layer 23 can be made of metallic materials. For example, the first bonding layer 12 can be made of germanium (Ge), and the second bonding layer 23 can be made of aluminum (Al). When using germanium and aluminum to make the first bonding layer 12 and the second bonding layer 23, the bonding process used is Al-Ge eutectic bonding technology.
[0050] Al-Ge eutectic bonding utilizes a eutectic alloy formed from aluminum and germanium at a specific temperature. This alloy transforms into a liquid state at a relatively low temperature (typically below the melting point of the materials), thereby achieving bonding between wafers. This bonding method achieves excellent hermeticity, making it suitable for MEMS devices requiring a vacuum or specific gas environment. Furthermore, Al-Ge eutectic bonding enables electrical interconnection, simplifying the packaging process.
[0051] For example, devices such as MEMS accelerometers and gyroscopes typically require high-precision packaging and hermeticity, and Al-Ge eutectic bonding can meet these requirements.
[0052] Of course, in other embodiments, the first bonding layer 12 and the second bonding layer 23 can also be made of other metal materials, such as gold or germanium, and bonded using a gold-germanium eutectic bonding process, or copper or tin, and bonded using a copper-tin eutectic bonding process, as long as the packaging requirements of the MEMS structure can be met.
[0053] like Figure 1 As shown, there are multiple bosses 22 and first bonding layers 12. The position of the boss 22 corresponds to the position of the first bonding layer 12 in that each boss 22 and each corresponding first bonding layer 12 partially overlap in the direction X perpendicular to the top surface T.
[0054] The partially overlapping design helps to evenly distribute the stress generated during the bonding process. If the first bonding layer 12 completely aligns with the boss 22, it may lead to stress concentration, which could affect the bonding quality and device reliability. Partial overlap can effectively disperse stress and reduce cracks or fractures caused by stress concentration.
[0055] The insulating layer 21 can be made of silicon dioxide (SiO2), silicon nitride (Si3N4), silicon oxynitride (SiON), or polyimide (PI).
[0056] When silicon dioxide (SiO2) is used to form the insulating layer 21, it can be formed by thermal oxidation or CVD (Chemical Vapor Deposition) for electrical isolation, etch stop layer or sacrificial layer.
[0057] The insulating layer 21 formed using silicon nitride (Si3N4) has properties such as high hardness and corrosion resistance, and is often used as a protective layer or structural insulating layer.
[0058] An insulating layer 21, formed using silicon oxynitride (SiON), with an adjustable refractive index between SiO2 and Si3N4, is used for optical or stress-reducing layers.
[0059] The insulating layer 21 formed using polyimide can be used in flexible MEMS or applications requiring stress buffering, and can be formed by spin coating or printing.
[0060] The second bonding layer 23 is located on each protrusion 22, and each second bonding layer 23 partially covers the corresponding protrusion 22, such as... Figure 1 As shown, the portion of the second bonding layer 23 that does not cover the boss 22 is located in the area where the first bonding layer 12 and the boss 22 do not overlap.
[0061] As can be seen, in the microelectromechanical system structure provided by this embodiment, a protrusion 22 is formed on the insulating layer 21 of the substrate wafer 2, thereby avoiding the formation of the protrusion 22 on the second surface 112 of the device wafer 11, so that the second surface 112 is not affected by the etching process used to form the protrusion 22. In related technologies, forming the protrusion 22 on the second surface 112 of the device wafer 11 can lead to unevenness of the final second surface 112 due to insufficient uniformity of the etching process, resulting in uneven thickness of the device wafer 11, which in turn affects the performance of the microelectromechanical system structure. Therefore, the technical solution provided by this embodiment can reduce the over-etching of the second surface 112 of the device wafer 11, making the second surface 112 of the device wafer 11 a horizontal structure, improving the uneven thickness of the device wafer 11, and improving the performance of the microelectromechanical system structure.
[0062] Please continue to refer to this. Figure 1 ,like Figure 1 As shown, in one embodiment, the packaged wafer 1 may further include: a cap wafer 13; the cap wafer 13, the device wafer 11, and the substrate wafer 2 are sequentially bonded together;
[0063] The cap wafer 13 is bonded to the first surface 111 of the device wafer 11, and the second surface 112 of the device wafer 11 is bonded to the substrate wafer 2 through the first bonding layer 12 and the second bonding layer 23.
[0064] The cap wafer is an important component in MEMS structures (mainly the packaging wafer 1) used to protect the device wafer 11 (primarily protecting the micromechanical structures formed inside it). It is usually located on top of the device wafer 11 and is bonded to the device wafer 11 through a bonding process, forming multiple sealed cavities, thereby protecting the internal micromechanical structures from the influence of the external environment (such as dust, humidity, mechanical shock, etc.).
[0065] Optionally, such as Figure 1 As shown, a dielectric layer 14 can also be formed between the device wafer 11 and the cap wafer 13. The dielectric layer 14 is usually made of materials such as silicon dioxide, silicon nitride, aluminum oxide, and silicon carbide. Its main functions are to provide electrical isolation, protect the micromechanical structure, enhance mechanical strength and thermal stability, and play a key role in the manufacturing and packaging process of MEMS structures.
[0066] like Figure 1 As shown, the substrate wafer 2 may also include a silicon substrate 20. In the MEMS structure, the silicon substrate 20 not only serves as the structural basis but also, through its electrical, thermal, and mechanical properties, works in conjunction with the insulating layer 21 to achieve the multifunctionality of the MEMS structure. Its design can comprehensively consider material properties, process compatibility, and target applications (such as inertial sensors, pressure sensors, etc.).
[0067] Please continue to refer to this. Figure 1 In one embodiment, the cap wafer 13 has at least one groove on one side surface near the first surface 111; the device wafer 11 is bonded to the cap wafer 13 such that the first surface 111 closes at least one groove to form at least one cavity A; the device wafer 11 includes at least one micromechanical structure 113; the micromechanical structure 113 corresponds to the cavity A.
[0068] The position of the first bonding layer 12 corresponds to the position where the cavity A is not formed.
[0069] The micromechanical structure 113 included in the device wafer 11 can be manufactured using microfabrication technology and has a size at the micrometer or even nanometer level. It can achieve high-precision physical quantity sensing and mechanical motion control and is the core part of the MEMS structure to realize its functions.
[0070] Micromechanical structures 113 are capable of sensing or responding to changes in external physical quantities and converting these changes into electrical signals or other measurable outputs. These micromechanical structures 113 play an important role in fields such as sensors, actuators, signal processing, and optical applications, providing miniaturized, high-performance solutions for a variety of high-tech applications.
[0071] Micromechanical structure 113 can be, for example, Figure 1 The interdigitated electrode structure is shown. In other embodiments, the micromechanical structure 113 can also be a cantilever beam structure, a diaphragm structure, a micromotor structure, etc., and the specific type of the micromechanical structure 113 can be determined based on the specific function and application scenario of the MEMS structure.
[0072] There is typically at least one cavity A between the cap wafer 13 and the device wafer 11. The micromechanical structure 113 is located above the cavity A (on the bottom surface of the package wafer 1). The cavity A provides space for the micromechanical structure 113 (such as an interdigital electrode structure, a cantilever beam structure, etc.) to move. At the same time, the cavity A can also isolate chemical substances in the external environment to prevent them from corroding the micromechanical structure 113.
[0073] To ensure the functionality of the MEMS structure, such as Figure 1 As shown, the interior of the insulating layer 21 includes a wiring layer 24; the number of wiring layers 24 matches the number of the second bonding layers 23, and the wiring layers 24 are in contact with the second bonding layers 23.
[0074] The wiring layer 24 mainly serves to provide electrical interconnection, signal processing and control, reduce signal interference, and provide input and output connections. Its materials are usually metals or alloys such as aluminum, copper, and gold.
[0075] In some embodiments, the boss 22 partially overlaps with the projected area of the wiring layer 24 in the direction X perpendicular to the top surface T of the package wafer 1, in order to reduce the device size.
[0076] In other embodiments, the projected area of the boss 22 does not overlap with the projected area of the wiring layer 24 included inside the insulating layer 21 in a direction perpendicular to the top surface T of the packaged wafer 1.
[0077] The boss 22 and the wiring layer 24 can also be designed not to overlap. Since the insulating layer 21 itself has a low dielectric constant, if the wiring layer 24 does not overlap with the boss 22, the coupling capacitance between the metal interconnect and the boss can be effectively reduced, and the mechanical stress caused by the pressing or thermal expansion of the boss 22 can be avoided from concentrating on the wiring layer 24. At the same time, the non-overlapping design also allows the boss 22 array to be arranged more densely without interfering with the setting of the wiring layer 24 below.
[0078] It is evident that the non-overlapping design of the boss 22 and the wiring layer 24 can achieve multiple advantages in MEMS packaging, such as optimized electrical performance, enhanced structural reliability, simplified process, and high-density integration.
[0079] This utility model embodiment also provides a method for forming a microelectromechanical system structure, used to manufacture the microelectromechanical system structure of any of the foregoing embodiments.
[0080] Please refer to Figure 2 , Figure 2 This is a flowchart illustrating a method for forming a microelectromechanical system structure provided in an embodiment of this utility model.
[0081] like Figure 2 As shown, the method includes the following steps:
[0082] Step S101: Provide a packaging wafer including a device wafer, the device wafer having a second surface with a horizontal structure, and a first bonding layer formed on the second surface.
[0083] Step S102: Provide an initial substrate wafer, the initial substrate wafer including an insulating layer and bosses located on the insulating layer.
[0084] The process of forming the boss is transferred to the processing of the substrate wafer, and the boss is formed on the insulating layer; this avoids the problem of over-etching the second surface of the device wafer when forming the boss in the device wafer.
[0085] Step S103: Form a second bonding layer on the insulating layer that partially covers the boss to obtain the substrate wafer.
[0086] Step S104: The packaged wafer and the substrate wafer are bonded through the first bonding layer and the second bonding layer to obtain the microelectromechanical system structure.
[0087] As can be seen, in the method for forming a microelectromechanical system structure provided by this embodiment, the formation process of the protrusion 22 is integrated into the formation process of the substrate wafer 2, thereby avoiding the fabrication of the protrusion 22 during the formation of the device wafer 11, that is, avoiding the formation of the protrusion 22 on the initial second surface of the initial device wafer, so that the final formed second surface 112 is not affected by the etching process used when forming the protrusion 22. It is understood that when the protrusion 22 is formed on the initial second surface of the initial device wafer, insufficient uniformity of the etching process will lead to unevenness of the surface of the final device wafer's second surface, causing uneven thickness of the device wafer, and thus affecting the performance of the microelectromechanical system structure. Therefore, the technical solution provided by this embodiment can reduce excessive etching of the second surface 112 of the device wafer 11, making the second surface 112 of the device wafer 11 a horizontal structure, improving the uneven thickness of the device wafer 11, and improving the performance of the microelectromechanical system structure.
[0088] Figure 3 This is another schematic flowchart illustrating the method for forming a microelectromechanical system structure provided in this embodiment of the present invention, as shown below. Figure 3 As shown, to obtain the second surface 112 of the horizontal structure, in one embodiment, step S101 may include the following steps:
[0089] Step S1011: Provide an initial package wafer, the initial package wafer including an initial device wafer, the initial device wafer having a first surface and an initial second surface opposite to each other, and the initial second surface being the surface away from the top surface of the initial package wafer.
[0090] During the manufacturing process, the top surface of the initial packaged wafer is the surface that contacts the ground or a planar structure.
[0091] The initial second surface is an untreated surface.
[0092] Step S1012: Planarize the initial second surface to form a second surface with a horizontal structure.
[0093] After planarization of the initial second surface, the resulting second surface 112 is the surface that is far from the top surface T of the packaged wafer 1.
[0094] For example, the initial planarization of the second surface can be performed based on a preset thickness H2 of the device. The preset thickness H2 refers to the thickness used to form the micromechanical structure 113. The dimensions of the micromechanical structure 113 are typically at the micrometer or even nanometer level, and its performance (such as sensitivity, accuracy, response speed, etc.) requires extremely high dimensional accuracy. By precisely controlling the thickness of the final formed device wafer 11, it can be ensured that the dimensions of the micromechanical structure 113 meet the design requirements. For example, the thickness of a microcantilever beam in an accelerometer or a pressure-sensitive diaphragm in a pressure sensor directly affects its mechanical properties (such as bending stiffness, sensitivity, etc.).
[0095] Step S1013: A first bonding material layer is formed on the second surface, and the first bonding material layer is patterned to form a first bonding layer, thereby obtaining a pre-processed device wafer to form a packaged wafer.
[0096] The first bonding material layer can be a metallic germanium (Ge) material layer.
[0097] The results obtained in step S1012 can be used as a reference. Figure 4 , Figure 4 This is a schematic diagram of the first structure obtained in the method for forming the microelectromechanical system structure provided in this embodiment of the present invention.
[0098] like Figure 4 As shown, after planarization, the micromechanical structure 113 has not yet been formed, so the resulting structure is: the device wafer 15 after preliminary processing. In the device wafer 15 after preliminary processing, the second surface 112 is a horizontal structure at this time, which is also the second surface 112 of the device wafer 11 that is ultimately formed later.
[0099] Figure 4 Since it is no longer necessary to form bosses 22 on the pre-processed device wafer 15, the thickness of the pre-processed device wafer 15 is the device preset thickness H2.
[0100] As can be seen, since it is not necessary to form protrusions 22 on the device wafer 15 after preliminary processing, the second surface 112 obtained after planarization process is a horizontal structure, which ensures that the thickness of the finally formed device wafer 11 is uniform and improves the performance of MEMS structure.
[0101] In one embodiment, the step of patterning the first bonding material layer in step S1013 to form the first bonding layer 12 and obtain the pre-processed device wafer 15 is achieved by chemical mechanical polishing and / or by grinding.
[0102] Chemical mechanical polishing (CMP) can achieve extremely high surface smoothness, typically reaching nanometer-level roughness. This is crucial for subsequent micromachining processes (such as photolithography and etching), as a smooth surface improves the precision and uniformity of photolithography. CMP removes material uniformly, ensuring consistent thickness across the entire wafer surface, which is essential for the dimensional accuracy of micromechanical structures.
[0103] Grinding processes offer high material removal rates, removing large amounts of material in a short time. This is highly effective for initial wafer thinning or removing thicker layers of excess material, allowing for rapid attainment of the desired device thickness.
[0104] When planarizing the initial second surface of the initial device wafer, grinding or chemical mechanical polishing can be used alone, or a combination of both can be used to give full play to their respective advantages and achieve efficient wafer planarization.
[0105] In one embodiment, the packaged wafer 1 further includes a cap wafer 13; the cap wafer 13 has at least one groove on a side surface near the first surface 111; the cap wafer 13 is bonded to the first surface 111 such that the first surface 111 closes the at least one groove to form at least one cavity A; please refer to Figure 5 , Figure 5 This is another schematic flowchart of the method for forming a microelectromechanical system structure provided in this embodiment of the present invention.
[0106] like Figure 5 As shown, the method may include:
[0107] Step S201: Provide an initial package wafer, the initial package wafer including an initial device wafer, the initial device wafer having opposing first surfaces and initial second surfaces, and the initial second surface being the surface away from the top surface of the initial package wafer.
[0108] Step S202: Planarize the initial second surface according to the preset thickness of the device to form a second surface with a horizontal structure.
[0109] The structure obtained in step S202 can be referenced further. Figure 4 .
[0110] Step S203: A first bonding material layer is formed on the second surface, and the first bonding material layer is patterned to form a first bonding layer, so as to obtain a device wafer with a second surface and a packaged wafer.
[0111] The structure obtained in step S203 can be referenced. Figure 6 , Figure 6This is a schematic diagram of the second structure obtained in the method for forming the microelectromechanical system structure provided in this embodiment of the present invention.
[0112] like Figure 6 As shown, a plurality of first bonding layers 12 are formed on the second surface 112, such that the first bonding layers 12 are spaced apart on the second surface 112.
[0113] In one embodiment, the process of patterning the first bonding material layer and forming the first bonding layer 12 in step S203 can be achieved by a wet etching process.
[0114] Since wet etching removes material uniformly through chemical reactions, it does not cause surface damage due to high-energy ion bombardment like dry etching. Therefore, wet etching can achieve a smoother and defect-free surface, further reducing damage to the second surface 112 and ensuring the surface flatness of the second surface 112.
[0115] Step S204: A micromechanical structure is formed inside the planarized device wafer to obtain the device wafer, with the micromechanical structure located above the cavity.
[0116] The structure obtained in step S204 can be referenced. Figure 7 , Figure 7 This is a schematic diagram of the third structure obtained in the method for forming the microelectromechanical system structure provided in this embodiment of the present invention.
[0117] like Figure 7 As shown, after the first bonding layer 12 is formed, the pre-processed device wafer 15 is further processed to form a micromechanical structure 113 inside the pre-processed device wafer 15, thereby obtaining the final device wafer 11.
[0118] Micromechanical structures 113 are formed inside the pre-processed device wafer 15, enabling the construction of movable or sensitive three-dimensional micro / nano structures within the final device wafer 11. This achieves monolithic integration of mechanical functions and circuitry, improving the performance, reliability, and system integration of the MEMS structure. Simultaneously, because the second surface 112 of the device wafer 11 is not over-etched due to the protrusion 22 formation process, the thickness of the device wafer 11 is uniform, further enhancing the performance of the final MEMS structure.
[0119] While fabricating device wafer 11, substrate wafer 2 can also be fabricated. The fabrication of substrate wafer will be described below.
[0120] Please continue to refer to this. Figure 5 The method may also include the following steps:
[0121] Step S205: Provide an initial insulating layer; the initial insulating layer includes at least one wiring layer.
[0122] The top surfaces of each wiring layer 24 are located on the same horizontal plane L.
[0123] The initial insulating layer 26 in step S205 can be referenced. Figure 8 , Figure 8 This is a schematic diagram of the fourth structure obtained in the method for forming the microelectromechanical system structure provided in this embodiment of the present invention.
[0124] like Figure 8 As shown, multiple wiring layers 24 are formed in the initial insulating layer 26. Each wiring layer 24 is located on the same horizontal plane L.
[0125] The pre-set thickness H1 of the boss is used to ensure that the thickness of the formed boss 22 meets the expected design requirements.
[0126] For example, the preset thickness H1 of the boss can be 1.5μm-2μm. Among them, the reserved thickness H from the same horizontal plane L to the top surface B of the initial insulating layer 26 can be 3μm.
[0127] A 2μm pre-set thickness H1 for the boss can provide sufficient sensitivity while ensuring mechanical strength. For example, in accelerometers or pressure sensors, a thinner boss formed based on the pre-set thickness H1 can respond more sensitively to changes in external physical quantities, while avoiding the degradation of mechanical performance caused by excessive thickness.
[0128] The reserved thickness H between the same horizontal plane L and the top surface B of the initial insulating layer 26 can be 3μm. This can provide sufficient electrical isolation to prevent interference between electrical signals, ensure the electrical performance of the device, and enable the finally formed insulating layer 21 to reduce heat conduction to a certain extent and improve the thermal stability of the device.
[0129] Figure 8 Located below the initial insulating layer 26 is the silicon substrate 20. The silicon substrate 20 serves as the base of the entire MEMS structure, providing mechanical support for the upper structures (such as the initial insulating layer 26) and ensuring the structural integrity of the device during manufacturing and use. Of course, the silicon substrate 20 not only serves as the structural foundation in the MEMS structure, but also, through its electrical, thermal, and mechanical properties, works in conjunction with the insulating layer to achieve the device's multifunctionality.
[0130] Step S206: Pattern the initial insulating layer to form the patterned insulating layer and the bosses located on the patterned insulating layer.
[0131] When patterning the initial insulating layer 26, there is a height difference between the removed portion and the remaining portion of the initial insulating layer 26. The higher portion forms multiple bosses 22, while the lower portion is the patterned insulating layer 210, such that each boss 22 is located on the patterned insulating layer 210. The thickness of the removed portion is the preset thickness H1 of the boss.
[0132] The process of forming the boss 22 is transferred to the processing of the initial substrate wafer, thereby ensuring the functional realization of the MEMS structure while avoiding excessive etching of the second surface 112, thus ensuring the performance improvement of the final MEMS structure.
[0133] The results obtained in step S206 can be used as a reference. Figure 9 , Figure 9 This is a schematic diagram of the fifth structure obtained in the method for forming the microelectromechanical system structure provided in this embodiment of the present invention.
[0134] like Figure 9 As shown, the final thickness of the boss 22 is the preset thickness H1 (e.g., 1.5 μm).
[0135] Step S207: For each wiring layer, etching begins from the top surface of the patterned insulating layer and continues until etching stops at the top surface of the wiring layer, forming contact vias to obtain the final insulating layer and the initial substrate wafer.
[0136] Since the wiring layer 24 and the boss 22 partially overlap, and the number of wiring layers 24 corresponds to the number of bosses 22, in order to achieve the electrical connection function, contact vias 27 can be formed at each non-overlapping position of the wiring layer 24 and the boss 22 to facilitate the filling of metal material, so that the subsequently formed second bonding layer 23 and the wiring layer 24 can contact each other.
[0137] The structure obtained in step S207 can be referenced. Figure 10 , Figure 10 This is a schematic diagram of the sixth structure obtained in the method for forming the microelectromechanical system structure provided in this embodiment of the present invention.
[0138] like Figure 10 As shown, etching begins on the top surface of the patterned insulating layer 210 and stops at the top surface of the wiring layer 24 (at the horizontal line L), thereby obtaining a number of contact vias 27 equal to the number of wiring layers 24, forming the final insulating layer 21 (the boss 22 is located on the final insulating layer 21).
[0139] Optionally, in a direction perpendicular to the plane of the insulating layer 21, the boss 22 partially overlaps with the projected area of the wiring layer 24.
[0140] Step S208: A second bonding layer is formed in the contact via, in a predetermined area on the insulating layer, and on a portion of the top surface of the boss, so that the second bonding layer contacts the wiring layer.
[0141] The preset area S is determined according to the position of the contact via 27 to ensure sufficient and stable contact between the formed second bonding layer 23 and the wiring layer 24.
[0142] The contact between the second bonding layer 23 and the wiring layer 24 on the substrate wafer 2 can achieve the synergistic functions of mechanical fixation, electrical conduction, hermetic sealing and stress buffering, ensuring the reliability, electrical signal integrity and long-term stability of the micromechanical structure 113 in dynamic working environment.
[0143] The structure obtained in step S208 can be referenced. Figure 11 , Figure 11 This is a schematic diagram of the seventh structure obtained in the method for forming a microelectromechanical system structure provided in this embodiment of the present invention.
[0144] like Figure 11 As shown, a second bonding layer material (e.g., aluminum material) is filled into the contact via 27 so that the second bonding layer material can cover the preset area S of the insulating layer 21 and part of the boss 22, thus obtaining the final second bonding layer 23.
[0145] Figure 11 In addition to the second bonding layer 23, the insulating layer 21 also includes a functional layer 01. The functional layer 01 is the core of the MEMS structure to realize specific functions. Its design depends on the application requirements (such as sensing, driving, optics, etc.) and works in conjunction with the insulating layer 21 and the silicon substrate 20 to ensure device performance, reliability and manufacturability.
[0146] The spacing between functional layer 01 and device wafer 11 is equal to the sum of the thicknesses of boss 22 and first bonding layer 12. For example, the thicknesses of boss 22 and first bonding layer 12 can be designed and determined based on the designed inter-plate capacitance (i.e., the capacitance between device wafer 11 and functional layer 01).
[0147] Step S209: The packaged wafer and the substrate wafer are bonded through the first bonding layer and the second bonding layer to obtain the microelectromechanical system structure.
[0148] The structure of step S209 can be referenced further. Figure 1 .
[0149] To further illustrate the method for forming a microelectromechanical system structure provided in this embodiment of the present invention, and to improve the over-etching of the second surface 112, the implementation process of related technologies for forming a microelectromechanical system structure will be described below.
[0150] First, the process of manufacturing packaged wafers in the relevant technologies will be explained.
[0151] S1: Grinding the initial device wafer.
[0152] Please refer to the structure obtained in S1. Figure 12 , Figure 12 This is a schematic diagram of the first structure obtained from related technologies.
[0153] Figure 12 The structure shown is the structure of the device wafer 3 after grinding. The thickness of the device wafer 3 after grinding is equal to the preset thickness of the boss H1 plus the preset thickness of the device H2. The device wafer 3 after grinding has a first device surface 31 and a second device surface 32, which are opposite to the top surface T1 (the bottom surface in contact with the ground) of the device wafer 3 after grinding.
[0154] Since the method for forming the microelectromechanical system structure provided in this embodiment of the invention does not require forming a boss 22 on the second surface 112 of the device wafer 11, it is not necessary to reserve a pre-defined thickness for the boss in the initial device wafer. Figure 4 As shown, the thickness of the device wafer 15 after preliminary processing is only the device preset thickness H2, thereby avoiding the surface flatness damage of the initial second surface caused by the etching process used to form the protrusion 22, so that the final second surface 112 is a horizontal structure.
[0155] S2: The device wafer 3 after grinding is patterned according to the preset thickness H1 of the boss to form the boss 4 on the device.
[0156] Please refer to the structure obtained in S2. Figure 13 , Figure 13 This is a schematic diagram of the second structure obtained from related technologies.
[0157] like Figure 13 As shown, the second device surface 32 of the device wafer 3 after grinding can be etched using a dry etching process to form the protrusion 4 on the device.
[0158] Dry etching process can affect the surface flatness of the first and second device surface 321 obtained after the first etching.
[0159] S3: A first metal bonding layer 5 is formed on the boss 4 on the device.
[0160] Please refer to the structure obtained in S3. Figure 14 , Figure 14 This is a schematic diagram of the third structure obtained from related technologies.
[0161] like Figure 14As shown, a first metal bonding layer 5 is formed on the boss 4 on the device. When forming the first metal bonding layer 5, a dry etching process is continued, which causes further flatness impact on the surface 321 of the first second device and damages the flatness of the surface 321 of the first second device.
[0162] In this embodiment of the invention, since the first bonding layer 12 is directly formed on the second surface 112 (e.g., ... Figure 6 (As shown), thus avoiding excessive etching of the second surface 112 during the formation of the boss 22. Furthermore, in some embodiments, the method for forming the microelectromechanical system structure provided by this invention can also employ wet etching to form the first bonding layer 12, thereby further reducing excessive surface etching of the final second surface 112 compared to... Figure 14 The second surface 112 obtained in this embodiment of the present invention can have a high degree of flatness, making the second surface 112 a horizontal structure, thereby improving the performance of the microelectromechanical system structure.
[0163] S4: Form the original micromechanical structure 6, obtain the device wafer, and complete the preparation of the packaged wafer.
[0164] Please refer to the structure obtained in S4. Figure 15 , Figure 15 This is a schematic diagram of the fourth structure obtained from related technologies.
[0165] like Figure 15 As shown, after the second device surface 32 is subjected to a second dry etching process, the original micromechanical structure 6 is formed. Because the second device surface 32 is subjected to a second dry etching process, the flatness of the final second device surface 322 is damaged, which in turn affects the performance of the original micromechanical structure 6 formed.
[0166] Next, the process of manufacturing the substrate wafer in the relevant technology will be explained.
[0167] S1': Provides a raw initial substrate wafer, the raw initial substrate wafer including a raw initial insulating layer 71, the raw initial insulating layer including at least one wiring layer 24.
[0168] Please refer to the structure obtained in S1'. Figure 16 , Figure 16 This is a schematic diagram of the fifth structure obtained from related technologies.
[0169] like Figure 16 As shown, each wiring layer 24 is also located on the same horizontal plane. Since the protrusions 4 on the device in the related technology have been completed in the preparation of the packaged wafer, the process of forming the bonding layer is mainly carried out in the processing of the original initial substrate wafer.
[0170] like Figure 8 As shown, in this embodiment of the invention, the fabrication of the protrusion 22 is transferred to the formation process of the substrate wafer 2. In order not to change the performance of the final MEMS structure, the requirements for forming the protrusion 22 are retained while the formation process of the protrusion 22 is transferred. For example, refer to... Figure 12 The structure shown is based on the pre-set thickness H1 of the bosses in the thickness of the device wafer 3 after grinding. Figure 8 In the structure shown, the thickness of the initial insulating layer 26 is reserved with a pre-set thickness H1 of the same thickness for the boss. That is, the reserved thickness H from the same horizontal plane L to the top surface B of the initial insulating layer 26 includes the pre-set thickness H1 of the boss, which facilitates the formation of the boss 22 later.
[0171] and then Figure 9 In the process, a boss 22 with a thickness of the preset boss thickness H1 can be formed. The substrate wafer 2 is not involved in the processing of the device wafer 11, so the influence of the surface flatness caused by the formation of the boss 22 can be ignored.
[0172] S2': For each wiring layer 24, etch the original initial insulating layer down to the top surface of the wiring layer 24 to form the original contact via 8.
[0173] Please refer to the structure obtained in S2'. Figure 17 , Figure 17 This is a schematic diagram of the sixth structure obtained from related technologies.
[0174] like Figure 17 As shown, each wiring layer 24 is etched to form an original contact via 8, so that the subsequently formed second metal bonding layer can contact the wiring layer 24.
[0175] S3': Each second metal bonding layer 9 is formed inside the original contact via 8 and on the original etched insulating layer 711.
[0176] Please refer to the structure obtained in S3'. Figure 18 , Figure 18 This is a schematic diagram of the seventh structure obtained from related technologies.
[0177] like Figure 18 As shown, each second metal bonding layer 9 is formed inside the original contact via and on the original etched insulating layer 711.
[0178] S4': Bond the first metal bonding layer 5 and the second metal bonding layer 9 to obtain the original MEMS structure.
[0179] Please refer to the structure obtained in S4'. Figure 19 , Figure 19 This is a schematic diagram of the final MEMS structure obtained from related technologies.
[0180] like Figure 19As shown, in the obtained original MEMS structure, the surface flatness of the final second device surface 322 is damaged, which will affect the overall performance of the original MEMS structure.
[0181] and Figure 1 Compared with the MEMS structure obtained in the embodiment of this utility model, the flatness of the final second device surface 322 in the original MEMS structure is lower than the flatness of the second surface 112 in the MEMS structure obtained in the embodiment of this utility model. Therefore, the MEMS structure obtained in the embodiment of this utility model can have higher performance.
[0182] This utility model embodiment also provides a semiconductor device, including the microelectromechanical system structure as described in any of the foregoing embodiments.
[0183] Semiconductor devices can be: MEMS sensors, such as accelerometers, pressure sensors, gyroscopes, temperature sensors, etc.; MEMS actuators, such as micromirror arrays, micropumps, micromotors, microvalves; and MEMS resonators, such as microelectromechanical resonators, surface acoustic wave filters, and bulk acoustic wave filters.
[0184] Because the formation process of the boss 22 is integrated into the formation process of the substrate wafer 2 in the microelectromechanical system structure provided by this utility model embodiment, the boss 22 is avoided in the process of forming the device wafer 11. This reduces the excessive etching of the second surface 112 of the device wafer 11, making the second surface 112 of the device wafer 11 a horizontal structure, improving the uneven thickness of the device wafer 11, improving the performance of the microelectromechanical system structure, and thus improving the performance of the semiconductor device.
[0185] This utility model embodiment also provides an electronic device, including the semiconductor device as described in the above embodiment.
[0186] Electronic devices can be portable devices such as mobile phones and tablets.
[0187] Since the semiconductor device includes the microelectromechanical system (MEMS) structure provided in this embodiment of the invention, and the second surface 112 of the device wafer 11 in the MEMS structure provided in this embodiment of the invention is a horizontal structure, the thickness non-uniformity of the device wafer 11 is improved, thereby enhancing the performance of the MEMS structure. This, in turn, improves the performance of the semiconductor device including the MEMS structure, and also improves the performance of the electronic device including the semiconductor device.
[0188] The foregoing describes multiple embodiments of the present invention. The optional methods described in each embodiment can be combined and cross-referenced without conflict, thereby extending to a variety of possible embodiments. These can all be considered as embodiments disclosed or made public by the present invention.
[0189] While this application discloses the above information, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of this application; therefore, the scope of protection of this application shall be determined by the scope defined in the claims.
Claims
1. A microelectromechanical system structure, characterized in that, include: The packaged wafer includes: a device wafer and a first bonding layer; The device wafer has a first surface and a second surface opposite to each other; the second surface is a surface away from the top surface of the packaged wafer and has a horizontal structure; the first bonding layer is located on the second surface; A substrate wafer located below the packaged wafer, the substrate wafer comprising: Insulating layer; A boss located on the insulating layer, and the position of the boss corresponds to the position of the first bonding layer; A second bonding layer is partially located on the protrusion; the substrate wafer and the package wafer are bonded together through the first bonding layer and the second bonding layer.
2. The microelectromechanical system structure as described in claim 1, characterized in that, The insulating layer includes a wiring layer; the number of wiring layers matches the number of the second bonding layers, and the wiring layers are in contact with the second bonding layers.
3. The microelectromechanical system structure as described in claim 2, characterized in that, In a direction perpendicular to the top surface of the packaged wafer, the boss partially overlaps with the projected area of the wiring layer.
4. The microelectromechanical system structure according to any one of claims 1-3, characterized in that, The packaging wafer further includes: a cap wafer; the cap wafer, the device wafer, and the substrate wafer are sequentially bonded together; The cap wafer and the device wafer are bonded to a first surface, and the second surface of the device wafer and the substrate wafer are bonded through the first bonding layer and the second bonding layer.
5. The microelectromechanical system structure as described in claim 4, characterized in that, The cap wafer has at least one groove on one side surface near the first surface; the device wafer is bonded to the cap wafer such that the first surface closes the at least one groove to form at least one cavity; the device wafer includes at least one micromechanical structure; the micromechanical structure corresponds to the cavity; The position of the first bonding layer corresponds to the position where no cavity is formed.
6. The microelectromechanical system structure as described in claim 5, characterized in that, The materials of the first bonding layer and the second bonding layer are metallic materials; the metallic materials include aluminum.
7. The microelectromechanical system structure as described in claim 6, characterized in that, The thickness of the boss is determined based on the preset thickness of the boss.
8. The microelectromechanical system structure as described in claim 5, characterized in that, The micromechanical structure is at least one of the following: interdigitated electrode structure, cantilever beam structure, diaphragm structure, and micromotor structure.
9. A semiconductor device, characterized in that, Including the microelectromechanical system structure as described in any one of claims 1-8.
10. An electronic device, characterized in that, Includes the semiconductor device as described in claim 9.