A burn-in circuit and a burn-in device

Abstract

The utility model relates to the technical field of accelerating card burning write, disclose a kind of burning write circuit and burning write device, and burning write circuit includes power supply unit, PCIE slot unit for splicing acceleration card, Type-C interface unit, ethernet interface unit and protocol conversion unit;Power supply unit is separately connected with ethernet interface unit, protocol conversion unit and PCIE slot unit electricity;Protocol conversion unit is separately connected with ethernet interface unit and Type-C interface unit electricity;When actually using, the connection between server and acceleration card is realized by the utility model, and the burning of acceleration card can be realized without being directly inserted on server, so that acceleration card is not frequently plugged in server, to avoid damaging server;In addition, the host business operation of server is not affected in the process of burning.

Description

Technical Field

[0001] This utility model relates to the field of accelerator card programming technology, specifically to a programming circuit and programming device. Background Technology

[0002] When using servers, accelerator cards are often used to reduce the CPU load on the server, thereby optimizing overall performance and enabling the server to run more efficiently.

[0003] Existing accelerator cards require programming during use. Since programming requires a programming voltage, they must be inserted into a server motherboard, making them unsuitable for operation outside of a server environment. This leads to the following problems: 1. When the accelerator card is in the prototyping and verification stage, there is a risk of damaging the server if it is inserted into the server motherboard for burning and debugging. Second: The burning process will consume the server's computing resources, affecting the continuity of business processing. Utility Model Content

[0004] In view of the shortcomings of the prior art, the present invention provides a programming circuit and programming device. The technical problem to be solved is that existing accelerator cards need to be directly plugged into the server for programming.

[0005] To solve the above technical problems, in the first aspect, this utility model provides the following technical solution: a programming circuit, including a power supply unit, a PCIE slot unit for inserting an accelerator card, a Type-C interface unit, an Ethernet interface unit, and a protocol conversion unit; The power supply unit is electrically connected to the Ethernet interface unit, the protocol conversion unit and the PCIe slot unit respectively, and is used to provide operating voltage to the Ethernet interface unit and the protocol conversion unit, and to provide power voltage for the PCIe slot unit for accelerator card burning. The protocol conversion unit is electrically connected to the Ethernet interface unit and the Type-C interface unit respectively. It is connected to the server through the Ethernet interface unit and to the accelerator card through the Type-C interface unit.

[0006] In one embodiment of the first aspect, the power supply unit includes a power interface, which includes a first voltage connection terminal, a second voltage connection terminal, and a ground terminal. The first voltage connection terminal is used to connect to a 12V DC voltage, the second voltage connection terminal is used to connect to a 3.3V DC voltage, and the ground terminal is used for grounding. The first voltage connection terminal is electrically connected to the PCIe slot unit. The second voltage connection terminal is electrically connected to the protocol conversion unit, the Ethernet interface unit, and the PCIe slot unit, respectively.

[0007] In one embodiment of the first aspect, the power supply unit further includes a voltage conversion unit electrically connected to the first voltage connection terminal, which outputs a 3.3V DC voltage based on the 12V DC voltage input to the first voltage connection terminal. The 3.3V DC voltage output from the voltage conversion unit is respectively input to the protocol conversion unit, the Ethernet interface unit, and the PCIe slot unit.

[0008] In one embodiment of the first aspect, the voltage conversion unit includes a power chip U2 of model number TPS56C215RNNR; Pins 2 and 11 of the power chip U2 are used to input 12V DC voltage, and are grounded through capacitors C11, C12, C13, C14, C15 and C16 respectively. They are also electrically connected to pin 15 of the power chip U2 through resistor R7, and pin 15 of the power chip U2 is also grounded through resistor R6. The fourteenth pin of the power chip U2 is grounded through capacitor C561, the eighteenth pin of the power chip U2 is grounded through resistor R12, the seventeenth pin of the power chip U2 is grounded through capacitor C562, and is also grounded in sequence through resistor R10 and resistor R12. Pins 3, 4, 5, 8, 9, 10, and 12 of the power chip U2 are all grounded; The first pin of the power chip U2 is electrically connected to one end of capacitor C10. The other end of capacitor C10 is electrically connected to the sixth and seventh pins of the power chip and one end of inductor L1. The other end of inductor L1 is used to output a 3.3V DC voltage and is grounded through capacitors C17, C18, C19, C20, C21 and C558. It is also electrically connected to one end of resistor R8, one end of resistor C23 and one end of resistor R13. The other end of capacitor C23 is electrically connected to one end of resistor R9. The other end of resistor R9 is electrically connected to the other end of resistor R8, the thirteenth pin of power chip U2 and one end of resistor R11. The other end of resistor R11 is grounded. The other end of resistor R13 is electrically connected to the sixteenth pin of power chip U2.

[0009] In one embodiment of the first aspect, the power interface includes 24 terminals arranged in two rows of twelve columns. The power interface's terminals 10 and 11 are the first voltage connection terminals; Terminals 1, 2, 12, 13, 21, 22, and 23 of the power interface are the second voltage connection terminals; Terminals 3, 5, 7, 24, 19, 18, 17, 16, and 15 of the power interface are grounding terminals.

[0010] In one embodiment of the first aspect, the Ethernet interface unit includes an RJ45 interface J10 of model HR911130A; The RJ45 interface J10 has a 3.3V DC input at pin 14. Pin 13 of the RJ45 interface J10 is electrically connected to the protocol conversion unit through resistor R405 and grounded through capacitor C555. Pin 11 of the RJ45 interface J10 is electrically connected to the protocol conversion unit through resistor R407 and grounded through capacitor C556. Pin 12 of the RJ45 interface J10 is grounded. The first pin of the RJ45 interface J10 is grounded through capacitors C559 and C560 respectively. Pins 9, 8, 6, 5, 7, 4, 3, and 2 of the RJ45 interface J10 are electrically connected to the protocol conversion unit, respectively. Pins 16 and 15 of the RJ45 interface J10 are both grounded.

[0011] In one embodiment of the first aspect, the protocol conversion unit includes a PHY chip U1 of model RTL8211E, a logic gate U1 of model SN74LVC1G11DBVR, and a voltage conversion chip U3 of model SN74AVC1T45DBVR. Pins 13, 14, 16-17, and 22-27 of the PHY chip U1 are electrically connected to the Type-C interface unit, respectively. Pins 42 and 43 of the PHY chip U1 are used to receive clock signals; Pins 47 and 49 of the PHY chip U1 are both grounded; Pins 1, 2, 4, 5, 7, 8, 10, 11, 34, and 35 of the PHY chip U1 are electrically connected to the Ethernet interface unit, respectively. The B4 terminal of the Type-C interface unit is electrically connected to one end of capacitor C558, one end of resistor R417, one end of resistor R418, one end of capacitor C561, pin 5 of logic gate U2, and pin 6 of voltage conversion chip U3, respectively. The other end of capacitor C558 is grounded, the other end of resistor R417 is electrically connected to pin 6 of logic gate U2, the other end of resistor R418 is electrically connected to pin 3 of logic gate U2 and terminal A11 of the Type-C interface unit, pin 1 of logic gate U2 is electrically connected to terminal B11 of the Type-C interface unit, pin 2 of logic gate U2 is grounded, and pin 4 of logic gate U2 is electrically connected to pin 4 of voltage conversion chip U3. Pins 5 and 2 of the voltage conversion chip U3 are both grounded. Pin 3 of the voltage conversion chip U3 is electrically connected to pin 29 of the PHY chip U1. Pin 1 of the voltage conversion chip U3 is electrically connected to one end of capacitor C562, the other end of resistor R416, and the other end of resistor R414. The other ends of capacitors C562 and C561 are both grounded. The other end of resistor R414 is used to input a 3.3V DC voltage.

[0012] In one embodiment of the first aspect, the clock generation signal is generated by a crystal oscillator circuit.

[0013] In one embodiment of the first aspect, the crystal oscillator circuit includes a crystal oscillator Y1, a capacitor C17, a capacitor C19, and a resistor R19; one end of the resistor R19 is electrically connected to one end of the capacitor C17, pin 1 of the crystal oscillator Y1, and pin 42 of the PHY chip U1, respectively; the other end of the resistor R19 is electrically connected to one end of the capacitor C19, pin 3 of the crystal oscillator Y1, and pin 43 of the PHY chip U1, respectively; the other ends of the capacitor C17, the other ends of the capacitor C19, pin 4 of the crystal oscillator Y1, and pin 2 of the crystal oscillator Y1 are all grounded.

[0014] Secondly, this utility model also provides a programming device, including a programming adapter board, the programming adapter board is provided with the above-mentioned programming circuit, the programming adapter board is also provided with an accelerator card power supply interface, the accelerator card power supply interface includes a 12V power supply terminal and a 3.3V power supply terminal; On the programming adapter board, the Type-C interface unit is located in the upper left corner of the programming adapter board, the Ethernet interface unit is below the Type-C interface unit, the PCIe slot unit is to the right of the Type-C interface unit, and the accelerator card power supply interface is on the right side of the programming adapter board and is located below the PCIe slot unit.

[0015] Compared with the prior art, the advantages of this utility model are as follows: In actual use, the connection between the server and the accelerator card is realized through this utility model, and the accelerator card can be programmed without being directly inserted into the server. This avoids the need to frequently insert and remove the accelerator card from the server, thus preventing damage to the server; in addition, the programming process does not affect the operation of the server's host business. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the programming circuit in the embodiment; Figure 2 This is a circuit diagram of the power interface in the embodiment; Figure 3 This is a circuit diagram of the voltage conversion unit in the embodiment; Figure 4 This is a circuit diagram of the Ethernet interface unit in the embodiment; Figure 5 This is a circuit diagram of the Type-C interface unit in the embodiment; Figure 6 This is a circuit diagram of the protocol conversion unit in the embodiment; Figures 7a-7c This is a circuit diagram of the PCIe slot unit in the embodiment; Figure 8 This is a schematic diagram of the programming device in the embodiment. Detailed Implementation

[0017] The present invention will now be described in further detail with reference to the accompanying drawings. These drawings are simplified schematic diagrams, illustrating only the basic structure of the present invention, and therefore only show the components relevant to the present invention.

[0018] Example 1 like Figure 1 As shown, this embodiment provides a programming circuit, including a power supply unit 1, a PCIe slot unit 2 for inserting an accelerator card, a Type-C interface unit 5, an Ethernet interface unit 3, and a protocol conversion unit 4; wherein the circuit of the PCIe slot unit 2 is as follows: Figure 7a , Figure 7b and Figure 7c As shown, it should be noted that the circuit of PCIe slot unit 2 is shown in three separate figures in order to make the circuit of PCIe slot unit 2 clear. The power supply unit 2 is electrically connected to the Ethernet interface unit 4, the protocol conversion unit 4 and the PCIe slot unit 2 respectively, and is used to provide working voltage to the Ethernet interface unit 3 and the protocol conversion unit 4, and to provide power voltage for the PCIe slot unit 3 for accelerator card burning. Protocol conversion unit 4 is electrically connected to Ethernet interface unit 3 and Type-C interface unit 2 respectively. It is connected to the server through Ethernet interface unit 3 and to the accelerator card through Type-C interface unit 5.

[0019] In practical use, this utility model enables the connection between the server and the accelerator card. The accelerator card can be programmed without being directly inserted into the server, thus avoiding frequent insertion and removal of the accelerator card from the server and preventing damage to the server. In addition, the programming process does not affect the operation of the server.

[0020] Specifically, in this embodiment, the power supply unit 1 includes a power interface, which includes a first voltage connection terminal, a second voltage connection terminal, and a ground terminal. The first voltage connection terminal is used to connect to a 12V DC voltage, the second voltage connection terminal is used to connect to a 3.3V DC voltage, and the ground terminal is used for grounding. The first voltage connection terminal is electrically connected to the PCIe slot unit 2. The second voltage connection terminal is electrically connected to the protocol conversion unit 4, the Ethernet interface unit 3, and the PCIe slot unit 2, respectively.

[0021] In this embodiment, the power interface circuit is as follows: Figure 2 As shown, it includes 24 terminals, which are arranged in two rows of twelve columns; Terminals 10 and 11 of the power interface are the first voltage connection terminals; Terminals 1, 2, 12, 13, 21, 22, and 23 of the power interface are the second voltage connection terminals; Terminals 3, 5, 7, 24, 19, 18, 17, 16, and 15 of the power interface are grounding terminals.

[0022] for Figure 3 The power interface circuit shown is a commonly used interface, and therefore it is compatible with most power inputs.

[0023] In addition, when an external 3.3V DC voltage is not required, the power supply unit 1 of this invention also includes a voltage conversion unit. The voltage conversion unit is electrically connected to the first voltage connection terminal and outputs a 3.3V DC voltage based on the 12V DC voltage input from the first voltage connection terminal. The 3.3V DC voltage output from the voltage conversion unit is input to the protocol conversion unit 4, the Ethernet interface unit 3, and the PCIE slot unit 2, respectively.

[0024] More specifically, the circuit of the voltage conversion unit is as follows: Figure 3 As shown, it includes a power chip U2 with the model number TPS56C215RNNR; Pins 2 and 11 of the power chip U2 are used to input 12V DC voltage, and are grounded through capacitors C11, C12, C13, C14, C15 and C16 respectively. They are also electrically connected to pin 15 of the power chip U2 through resistor R7, and pin 15 of the power chip U2 is also grounded through resistor R6. Pin 14 of power chip U2 is grounded through capacitor C561, pin 18 of power chip U2 is grounded through resistor R12, pin 17 of power chip U2 is grounded through capacitor C562, and is also grounded through resistors R10 and R12 in sequence. Pins 3, 4, 5, 8, 9, 10, and 12 of the power chip U2 are all grounded; Pin 1 of power chip U2 is electrically connected to one end of capacitor C10. The other end of capacitor C10 is electrically connected to pins 6 and 7 of the power chip and one end of inductor L1. The other end of inductor L1 is used to output 3.3V DC voltage and is grounded through capacitors C17, C18, C19, C20, C21 and C558. It is also electrically connected to one end of resistor R8, one end of resistor C23 and one end of resistor R13. The other end of capacitor C23 is electrically connected to one end of resistor R9. The other end of resistor R9 is electrically connected to the other end of resistor R8, pin 13 of power chip U2 and one end of resistor R11. The other end of resistor R11 is grounded. The other end of resistor R13 is electrically connected to pin 16 of power chip U2.

[0025] In one implementation, other power supply chips of different models can be selected to convert 12V DC voltage to 3.3V DC voltage, depending on actual needs.

[0026] Specifically, in this embodiment, the circuit of the Ethernet interface unit 3 is as follows: Figure 4 As shown, it includes the RJ45 interface J10, model number HR911130A; Pin 14 of RJ45 interface J10 receives a 3.3V DC voltage. Pin 13 of RJ45 interface J10 is electrically connected to protocol conversion unit 4 through resistor R405 and grounded through capacitor C555. Pin 11 of RJ45 interface J10 is electrically connected to protocol conversion unit 4 through resistor R407 and grounded through capacitor C556. Pin 12 of RJ45 interface J10 is grounded. Pin 1 of RJ45 interface J10 is grounded through capacitors C559 and C560 respectively. Pins 9, 8, 6, 5, 7, 4, 3, and 2 of the RJ45 interface J10 are electrically connected to the protocol conversion unit 4, respectively. Pins 16 and 15 of the RJ45 interface J10 are both grounded.

[0027] Specifically, in this embodiment, the circuit of the Type-C interface unit 5 is as follows: Figure 5 As shown, the circuit of protocol conversion unit 4 is as follows: Figure 6 As shown, it includes a PHY chip U1 with model number RTL8211E, a logic gate U1 with model number SN74LVC1G11DBVR, and a voltage conversion chip U3 with model number SN74AVC1T45DBVR. Pins 13, 14, 16-17, and 22-27 of PHY chip U1 are electrically connected to Type-C interface unit 5, respectively. Pins 42 and 43 of the PHY chip U1 are used to receive clock signals; Pins 47 and 49 of PHY chip U1 are both grounded; Pins 1, 2, 4, 5, 7, 8, 10, 11, 34, and 35 of PHY chip U1 are electrically connected to the Ethernet interface unit, respectively. Terminal B4 of Type-C interface unit 5 is electrically connected to one end of capacitor C558, one end of resistor R417, one end of resistor R418, one end of capacitor C561, pin 5 of logic gate U2, and pin 6 of voltage conversion chip U3, respectively. The other end of capacitor C558 is grounded, the other end of resistor R417 is electrically connected to pin 6 of logic gate U2, the other end of resistor R418 is electrically connected to pin 3 of logic gate U2 and terminal A11 of Type-C interface unit, pin 1 of logic gate U2 is electrically connected to terminal B11 of Type-C interface unit 5, pin 2 of logic gate U2 is grounded, and pin 4 of logic gate U2 is electrically connected to pin 4 of voltage conversion chip U3. Pins 5 and 2 of voltage converter chip U3 are grounded. Pin 3 of voltage converter chip U3 is electrically connected to pin 29 of PHY chip U1. Pin 1 of voltage converter chip U3 is electrically connected to one end of capacitor C562, the other end of resistor R416, and the other end of resistor R414. The other ends of capacitors C562 and C561 are grounded. The other end of resistor R414 is used to input 3.3V DC voltage.

[0028] In addition, in this embodiment, the clock signal is generated by a crystal oscillator circuit; Figure 6In the circuit, the crystal oscillator circuit includes crystal oscillator Y1, capacitor C17, capacitor C19, and resistor R19. One end of resistor R19 is electrically connected to one end of capacitor C17, pin 1 of crystal oscillator Y1, and pin 42 of PHY chip U1. The other end of resistor R19 is electrically connected to one end of capacitor C19, pin 3 of crystal oscillator Y1, and pin 43 of PHY chip U1. The other ends of capacitor C17, capacitor C19, pin 4 of crystal oscillator Y1, and pin 2 of crystal oscillator Y1 are all grounded.

[0029] Example 2 like Figure 8 As shown, this embodiment provides a programming device, including a programming adapter board 6. The programming adapter board 6 is provided with the programming circuit in Embodiment 1. The programming adapter board 6 is also provided with an accelerator card power supply interface, which includes a 12V power supply terminal and a 3.3V power supply terminal. On the programming adapter board 6, the Type-C interface unit 5 is located in the upper left corner of the programming adapter board 6, the Ethernet interface unit 3 is below the Type-C interface unit 5, the PCIE slot unit 2 is to the right of the Type-C interface unit 5, and the accelerator card power supply interface is on the right side of the programming adapter board 6 and is located below the PCIE slot unit.

[0030] In practical use, the burning device in this embodiment has multiple power supply modes and good compatibility, which can solve the power supply limitation problem when burning the accelerator card. Moreover, the burning of the accelerator card is done independently outside the server and does not interfere with the operation of the server's host business.

[0031] Based on the above description and inspired by this utility model, those skilled in the art can make various changes and modifications without departing from the technical concept of this utility model. The technical scope of this utility model is not limited to the contents of the specification, but must be determined according to the scope of the claims.

Claims

1. A programming circuit, characterized in that, It includes a power supply unit, a PCIe slot unit for inserting an accelerator card, a Type-C interface unit, an Ethernet interface unit, and a protocol conversion unit; The power supply unit is electrically connected to the Ethernet interface unit, the protocol conversion unit and the PCIe slot unit respectively, and is used to provide operating voltage to the Ethernet interface unit and the protocol conversion unit, and to provide power voltage for the PCIe slot unit for accelerator card burning. The protocol conversion unit is electrically connected to the Ethernet interface unit and the Type-C interface unit respectively. It is connected to the server through the Ethernet interface unit and to the accelerator card through the Type-C interface unit.

2. The programming circuit according to claim 1, characterized in that, The power supply unit includes a power interface, which includes a first voltage connection terminal, a second voltage connection terminal, and a ground terminal. The first voltage connection terminal is used to connect to a 12V DC voltage, the second voltage connection terminal is used to connect to a 3.3V DC voltage, and the ground terminal is used for grounding. The first voltage connection terminal is electrically connected to the PCIe slot unit. The second voltage connection terminal is electrically connected to the protocol conversion unit, the Ethernet interface unit, and the PCIe slot unit, respectively.

3. The programming circuit according to claim 2, characterized in that, The power supply unit also includes a voltage conversion unit, which is electrically connected to the first voltage connection terminal. Based on the 12V DC voltage input from the first voltage connection terminal, the voltage conversion unit outputs a 3.3V DC voltage. The 3.3V DC voltage output from the voltage conversion unit is input to the protocol conversion unit, the Ethernet interface unit, and the PCIe slot unit, respectively.

4. The programming circuit according to claim 3, characterized in that, The voltage conversion unit includes a power chip U2 with the model number TPS56C215RNNR; Pins 2 and 11 of the power chip U2 are used to input 12V DC voltage, and are grounded through capacitors C11, C12, C13, C14, C15 and C16 respectively. They are also electrically connected to pin 15 of the power chip U2 through resistor R7, and pin 15 of the power chip U2 is also grounded through resistor R6. The fourteenth pin of the power chip U2 is grounded through capacitor C561, the eighteenth pin of the power chip U2 is grounded through resistor R12, the seventeenth pin of the power chip U2 is grounded through capacitor C562, and is also grounded in sequence through resistor R10 and resistor R12. Pins 3, 4, 5, 8, 9, 10, and 12 of the power chip U2 are all grounded; The first pin of the power chip U2 is electrically connected to one end of capacitor C10. The other end of capacitor C10 is electrically connected to the sixth and seventh pins of the power chip and one end of inductor L1. The other end of inductor L1 is used to output a 3.3V DC voltage and is grounded through capacitors C17, C18, C19, C20, C21 and C558. It is also electrically connected to one end of resistor R8, one end of resistor C23 and one end of resistor R13. The other end of capacitor C23 is electrically connected to one end of resistor R9. The other end of resistor R9 is electrically connected to the other end of resistor R8, the thirteenth pin of power chip U2 and one end of resistor R11. The other end of resistor R11 is grounded. The other end of resistor R13 is electrically connected to the sixteenth pin of power chip U2.

5. A programming circuit according to claim 2, characterized in that, The power interface includes 24 terminals, which are arranged in two rows of twelve columns. The power interface's terminals 10 and 11 are the first voltage connection terminals; Terminals 1, 2, 12, 13, 21, 22, and 23 of the power interface are the second voltage connection terminals; Terminals 3, 5, 7, 24, 19, 18, 17, 16, and 15 of the power interface are grounding terminals.

6. The programming circuit according to claim 1, characterized in that, The Ethernet interface unit includes an RJ45 interface J10 of model HR911130A; The RJ45 interface J10 has a 3.3V DC input at pin 14. Pin 13 of the RJ45 interface J10 is electrically connected to the protocol conversion unit through resistor R405 and grounded through capacitor C555. Pin 11 of the RJ45 interface J10 is electrically connected to the protocol conversion unit through resistor R407 and grounded through capacitor C556. Pin 12 of the RJ45 interface J10 is grounded. The first pin of the RJ45 interface J10 is grounded through capacitors C559 and C560 respectively. Pins 9, 8, 6, 5, 7, 4, 3, and 2 of the RJ45 interface J10 are electrically connected to the protocol conversion unit, respectively. Pins 16 and 15 of the RJ45 interface J10 are both grounded.

7. A programming circuit according to claim 1, characterized in that, The protocol conversion unit includes a PHY chip U1 of model RTL8211E, a logic gate U1 of model SN74LVC1G11DBVR, and a voltage conversion chip U3 of model SN74AVC1T45DBVR. Pins 13, 14, 16-17, and 22-27 of the PHY chip U1 are electrically connected to the Type-C interface unit, respectively. Pins 42 and 43 of the PHY chip U1 are used to receive clock signals; Pins 47 and 49 of the PHY chip U1 are both grounded; Pins 1, 2, 4, 5, 7, 8, 10, 11, 34, and 35 of the PHY chip U1 are electrically connected to the Ethernet interface unit, respectively. The B4 terminal of the Type-C interface unit is electrically connected to one end of capacitor C558, one end of resistor R417, one end of resistor R418, one end of capacitor C561, pin 5 of logic gate U2, and pin 6 of voltage conversion chip U3, respectively. The other end of capacitor C558 is grounded, the other end of resistor R417 is electrically connected to pin 6 of logic gate U2, the other end of resistor R418 is electrically connected to pin 3 of logic gate U2 and terminal A11 of the Type-C interface unit, pin 1 of logic gate U2 is electrically connected to terminal B11 of the Type-C interface unit, pin 2 of logic gate U2 is grounded, and pin 4 of logic gate U2 is electrically connected to pin 4 of voltage conversion chip U3. Pins 5 and 2 of the voltage conversion chip U3 are both grounded. Pin 3 of the voltage conversion chip U3 is electrically connected to pin 29 of the PHY chip U1. Pin 1 of the voltage conversion chip U3 is electrically connected to one end of capacitor C562, the other end of resistor R416, and the other end of resistor R414. The other ends of capacitors C562 and C561 are both grounded. The other end of resistor R414 is used to input a 3.3V DC voltage.

8. A programming circuit according to claim 7, characterized in that, The clock signal is generated by a crystal oscillator circuit.

9. A programming circuit according to claim 8, characterized in that, The crystal oscillator circuit includes crystal oscillator Y1, capacitor C17, capacitor C19, and resistor R19. One end of resistor R19 is electrically connected to one end of capacitor C17, pin 1 of crystal oscillator Y1, and pin 42 of PHY chip U1. The other end of resistor R19 is electrically connected to one end of capacitor C19, pin 3 of crystal oscillator Y1, and pin 43 of PHY chip U1. The other ends of capacitor C17, capacitor C19, pin 4 of crystal oscillator Y1, and pin 2 of crystal oscillator Y1 are all grounded.

10. A programming device, characterized in that, The invention includes a programming adapter board, which is provided with the programming circuit according to any one of claims 1-9, and the programming adapter board is also provided with an accelerator card power supply interface, which includes a 12V power supply terminal and a 3.3V power supply terminal. On the programming adapter board, the Type-C interface unit is located in the upper left corner of the programming adapter board, the Ethernet interface unit is below the Type-C interface unit, the PCIe slot unit is to the right of the Type-C interface unit, and the accelerator card power supply interface is on the right side of the programming adapter board and is located below the PCIe slot unit.

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