Interface circuit and vehicle

By employing a two-layer protection module and a three-level filtering structure in the vehicle CAN interface, the problem of low anti-interference capability of the interface is solved, achieving more comprehensive electromagnetic interference protection and improved filtering performance, and meeting more stringent EMC standards.

CN224536507UActive Publication Date: 2026-07-21ZHEJIANG LINGAI FUTURE TECHNOLOGY CO LTD +1
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
ZHEJIANG LINGAI FUTURE TECHNOLOGY CO LTD
Filing Date
2025-09-19
Publication Date
2026-07-21

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Abstract

The application discloses an interface circuit and a vehicle, belongs to the technical field of vehicle-mounted interfaces, and is used for connecting an external interface and a transceiver chip, and comprises: a first protection module connected with the external interface through a bus; a second protection module connected with the transceiver chip through the bus; a first common-mode filter module connected with the first protection module through the bus; a second common-mode filter module connected with the second protection module through the bus; and a differential-mode filter module connected with the first common-mode filter module and the second common-mode filter module through the bus; wherein the first protection module and the second protection module each comprise a bidirectional semiconductor device. The interface circuit provided by the application is more completely protected, has a wider filter frequency band, and has a significantly improved filter performance, so that the interface circuit can be effectively protected and filtered when electromagnetic interference, transient pulses, power fluctuations, ground abnormalities and the like are encountered, and circuit components are not damaged.
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Description

Technical Field

[0001] This application relates to the field of vehicle interface technology, and more particularly to an interface circuit and a vehicle. Background Technology

[0002] Electromagnetic compatibility (EMC) refers to the ability of electronic equipment or systems to operate normally in the expected electromagnetic environment without causing unacceptable electromagnetic interference to other equipment or systems. Current automotive CAN (Controller Area Network) interfaces have low interference immunity and poor filtering performance, posing a risk of damage to circuit components when encountering electromagnetic interference, transient pulses, power fluctuations, grounding abnormalities, etc. Utility Model Content

[0003] An interface circuit and a vehicle are provided to solve the above-mentioned technical problems.

[0004] To achieve the above objectives, in a first aspect, an interface circuit is provided for connecting to an external interface and a transceiver chip, comprising:

[0005] A first protection module is used to connect to the external interface via a bus.

[0006] The second protection module is used to connect to the transceiver chip via the bus.

[0007] The first common-mode filtering module is connected to the first protection module via the bus;

[0008] The second common-mode filtering module is connected to the second protection module via the bus.

[0009] A differential-mode filtering module, wherein the differential-mode filtering module is connected to the first common-mode filtering module and the second common-mode filtering module respectively via the bus;

[0010] Both the first protection module and the second protection module include bidirectional semiconductor devices.

[0011] In conjunction with the first aspect, the bus includes a positive bus and a negative bus, and the first protection module includes a first bidirectional TVS diode and a second bidirectional TVS diode. The first bidirectional TVS diode and the second bidirectional TVS diode are connected in series and then connected to the positive bus and the negative bus, respectively. The first bidirectional TVS diode and the second bidirectional TVS diode share a common connection point and are grounded.

[0012] In conjunction with the first aspect, the bus includes a positive bus and a negative bus, and the first protection module includes a first diode, a second diode, a third diode, a fourth diode, a first bidirectional TVS diode, and a second bidirectional TVS diode. One end of the first diode and the second diode are connected in anti-parallel to the positive bus, and the other end is connected to the first bidirectional TVS diode. The other end of the first bidirectional TVS diode is grounded.

[0013] One end of the third diode and the fourth diode connected in antiparallel is connected to the negative bus, and the other end is connected to the second bidirectional TVS diode. The other end of the second bidirectional TVS diode is grounded.

[0014] In conjunction with the first aspect, the bus includes a positive bus and a negative bus, and the first protection module includes a first semiconductor discharge tube, a second semiconductor discharge tube, a first bidirectional TVS tube and a second bidirectional TVS tube. One end of the first semiconductor discharge tube is connected to the positive bus, and the other end is connected to the first bidirectional TVS tube. The other end of the first bidirectional TVS tube is grounded.

[0015] One end of the second semiconductor discharge tube is connected to the negative bus, and the other end is connected to the second bidirectional TVS tube, with the other end of the second bidirectional TVS tube grounded.

[0016] In conjunction with the first aspect, the bus includes a positive bus and a negative bus, and the second protection module includes a bidirectional ESD transistor, which includes a first terminal, a second terminal and a third terminal. The first terminal is connected to the positive bus, the second terminal is connected to the negative bus, and the third terminal is grounded.

[0017] In conjunction with the first aspect, the first common-mode filter module includes a common-mode inductor, which includes a first common-mode terminal, a second common-mode terminal, a third common-mode terminal, and a fourth common-mode terminal. The first common-mode terminal and the second common-mode terminal are connected to the positive bus, and the third common-mode terminal and the fourth common-mode terminal are connected to the negative bus; or,

[0018] The first common-mode filter module includes a first resistor and a second resistor. The first resistor is connected in series with the positive bus, and the second resistor is connected in series with the negative bus. The resistance values ​​of both the first resistor and the second resistor are less than or equal to 20mΩ.

[0019] In conjunction with the first aspect, the differential mode filter module includes a first filter resistor, a second filter resistor, and a filter capacitor. The first filter resistor and the second filter resistor are connected in series and then connected between the positive bus and the negative bus, respectively. One end of the filter capacitor is connected between the first filter resistor and the second filter resistor, and the other end is grounded.

[0020] The resistance values ​​XΩ of the first filter resistor and the second filter resistor satisfy the following relationship with the characteristic impedance YΩ of the bus: X = Y / 2.

[0021] In conjunction with the first aspect, the second common-mode filter module includes a first common-mode capacitor and a second common-mode capacitor. The first common-mode capacitor and the second common-mode capacitor are connected in series and then connected to the positive bus and the negative bus, respectively. The connection point between the first common-mode capacitor and the second common-mode capacitor is grounded.

[0022] The capacitance values ​​of both the first common-mode capacitor and the second common-mode capacitor are greater than or equal to 22pF and less than or equal to 47pF.

[0023] In conjunction with the first aspect, the second common-mode filter module includes a first common-mode capacitor, a second common-mode capacitor, a first high-frequency ferrite bead, and a second high-frequency ferrite bead. The first common-mode capacitor and the second common-mode capacitor are connected in series and then connected to the positive bus and the negative bus, respectively. The connection point between the first common-mode capacitor and the second common-mode capacitor is grounded. The first high-frequency ferrite bead is connected in series with the positive bus, and the second high-frequency ferrite bead is connected in series with the negative bus.

[0024] The DC resistance of both the first high-frequency magnetic bead and the second high-frequency magnetic bead is less than or equal to 0.5Ω.

[0025] Secondly, embodiments of this application provide a vehicle including an on-board interface, the on-board interface including a connection end, the connection end being connected to an interface circuit as described in any one aspect.

[0026] One of the above technical solutions has the following advantages or beneficial effects:

[0027] This application provides an interface circuit for connecting an external interface and a transceiver chip, comprising: a first protection module for connecting to the external interface via a bus; a second protection module for connecting to the transceiver chip via a bus; a first common-mode filter module for connecting to the first protection module via a bus; a second common-mode filter module for connecting to the second protection module via a bus; and a differential-mode filter module for connecting to both the first and second common-mode filter modules via a bus. Both the first and second protection modules include bidirectional semiconductor devices. The interface circuit provided in this application, based on two layers of protection and three levels of filtering, provides more thorough protection, a wider filtering frequency band, and significantly improved filtering performance. It effectively protects against and filters electromagnetic interference, transient pulses, power fluctuations, and grounding abnormalities without damaging circuit components. Attached Figure Description

[0028] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0029] Figure 1 This is a schematic diagram of the module connection of the interface circuit in an embodiment of this application;

[0030] Figure 2 This is a schematic diagram of the circuit structure of the first protection module in the interface circuit of an embodiment of this application;

[0031] Figure 3 This is another circuit structure diagram of the first protection module in the interface circuit of this application embodiment;

[0032] Figure 4 This is another circuit structure diagram of the first protection module in the interface circuit of this application embodiment;

[0033] Figure 5 This is a schematic diagram of the circuit structure of the second protection module in the interface circuit of an embodiment of this application;

[0034] Figure 6 This is a schematic diagram of the circuit structure of the first common-mode filter module in the interface circuit of an embodiment of this application;

[0035] Figure 7 This is another circuit structure diagram of the first common-mode filter module in the interface circuit of this application embodiment;

[0036] Figure 8 This is a schematic diagram of the differential mode filtering module in the interface circuit of an embodiment of this application;

[0037] Figure 9 This is a schematic diagram of the circuit structure of the second common-mode filter module in the interface circuit of an embodiment of this application;

[0038] Figure 10 This is another circuit structure diagram of the second common-mode filter module in the interface circuit of this application embodiment;

[0039] Figure 11 This is a schematic diagram of the overall circuit structure of the interface circuit in an embodiment of this application;

[0040] Figure 12 This is another circuit structure diagram of the interface circuit in an embodiment of this application. Detailed Implementation

[0041] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0042] Furthermore, descriptions involving "first," "second," etc., in the embodiments of this application are for descriptive purposes only and should not be construed as indicating or implying their relative importance or implicitly specifying the number of technical features indicated. Therefore, features defined with "first" or "second" may explicitly or implicitly include at least one of those features. Additionally, the technical solutions of the various embodiments can be combined with each other, but this must be based on the ability of those skilled in the art to implement them. If the combination of technical solutions is contradictory or impossible to implement, such a combination of technical solutions should be considered non-existent and not within the scope of protection claimed in this application.

[0043] Electromagnetic compatibility (EMC) encompasses two core aspects: 1. Electromagnetic interference (EMI), which refers to the interference caused to other devices by electromagnetic signals generated by equipment or systems; and 2. Electromagnetic immunity (EMS), which refers to the ability of equipment to maintain normal operation under electromagnetic interference. Currently, mandatory EMC standards are in place to ensure product reliability and stability. Products must meet these standards to be legally permitted for market release.

[0044] Currently, automotive CAN signal ports face protection issues related to surges, ESD (Electrostatic Discharge Protection), and high-energy coupling. This solution ensures normal CAN communication and protects chips from damage even under strong noise interference, improving bus anti-interference capabilities, reducing risks, and minimizing the risk of resonance caused by parasitic LC (Inductor-Capacitor) parameters in the link, which amplifies noise and leads to the failure of downstream chips. This meets more stringent EMC standards. Furthermore, automotive CAN signal ports also suffer from excessive noise emission filtering issues. By preventing the interface circuit filtering module from being bypassed, electromagnetic noise emissions are reduced, meeting even more stringent EMC standards.

[0045] CAN bus is a serial communication protocol bus that uses twisted-pair cables to transmit differential signals. Its bus interface can operate in harsh environments and possesses good reliability, real-time performance, flexibility, and anti-interference capabilities. Currently, CAN bus is mainly used for communication between various components in automobiles. However, the rapid development of new energy vehicles is reshaping the automotive industry. Along with their trends of electrification, high voltage, and intelligence, the requirements for EMC (Electronic Performance Compatibility) are also increasing. The widespread adoption of high-voltage fast charging platforms, the deep integration of intelligent driving systems, the recommendation of regional control architectures and high-speed communication, and the design of high-density electronic components and functional redundancy have prompted the establishment of higher and more stringent EMC testing standards. This presents a significant challenge to producing CAN buses that can successfully pass relevant EMC testing and certification.

[0046] It is worth noting that high interference immunity tests can lead to functional abnormalities or device damage. In addition, poor PCB (Printed Circuit Board) layout can cause electromagnetic interference noise within the board to bypass the filter module, resulting in emission tests exceeding the limits and failing EMC-related tests.

[0047] In some high-interference-resistance testing technical solutions, the circuit input port consists of an ESD (Electrostatic Discharge Diode), a first capacitor, a second capacitor, a first matching resistor, a second matching resistor, and a common-mode inductor. The first and second capacitors are primarily used for common-mode filtering. This circuit mainly serves for ESD protection and common-mode interference filtering. In other existing high-interference-resistance testing technical solutions, such as the CAN bus transceiver circuit disclosed in Chinese Patent Application No. 202322911355.3, a CAN bus transceiver circuit includes a first bidirectional TVS diode, a second bidirectional TVS diode, a differential-mode filter module, and a common-mode filter module, primarily filtering bus differential and common-mode noise and providing ground surge protection.

[0048] However, some technical solutions use only low-power ESD transistors. While this can protect against high-frequency transient pulse noise energy from ESD, insufficient protection against surges and EFT (Electrical Fast Transient Disturbance) interference can damage downstream chips. Furthermore, the presence of parasitic parameters in the common-mode inductor creates LC resonance in the link. External noise interference amplifies this noise, creating overshoot voltages that exceed the chip's withstand voltage threshold, leading to chip damage. Secondly, the common-mode capacitance to ground and the ESD transistor junction capacitance act as noise return or emission paths, causing conducted emissions to exceed limits.

[0049] In other technical solutions, only high-power TVS (Transient Voltage Suppressor Diode) transistors are used for protection. TVS transistors have relatively large junction capacitances, typically around 100pF, which can severely affect high-speed CAN signal transmission and increase the risk of failure. Due to the parasitic parameters of the common-mode inductance, LC resonance occurs on the link, amplifying external noise and creating overshoot voltages that exceed the chip's withstand voltage threshold, leading to chip damage. Furthermore, the junction capacitance of the TVS transistor can act as a noise return or emission path, causing conducted emissions to exceed limits. Therefore, these solutions cannot meet more stringent EMC standards.

[0050] To overcome the shortcomings of the above technical solutions and balance interference immunity and transmission performance, this application provides an interface circuit with higher interference immunity and high filtering performance for noise emission and return path, which can successfully pass higher level EMC tests.

[0051] like Figure 1 As shown in the figure, this application embodiment proposes an interface circuit for connecting an external interface and a transceiver chip, including: a first protection module, which is used to connect to the external interface via a bus; a second protection module, which is used to connect to the transceiver chip via a bus; a first common-mode filter module, which is connected to the first protection module via a bus; a second common-mode filter module, which is connected to the second protection module via a bus; and a differential-mode filter module, which is connected to the first common-mode filter module and the second common-mode filter module via buses respectively; wherein, both the first protection module and the second protection module include bidirectional semiconductor devices.

[0052] Specifically, the first protection module is mainly used for the absorption and protection against high-energy interference such as surges, EFTs, and ESDs. Surges, also known as transient overvoltages, are sudden voltage or current surges in a circuit that are short in duration (usually microseconds to milliseconds) but have extremely high amplitudes. EFTs refer to a series of dense pulses with extremely high frequencies (usually 50MHz to 1GHz), medium amplitudes (hundreds to thousands of volts), and extremely short durations (nanoseconds). ESD is the instantaneous discharge phenomenon caused by the charge imbalance when an object carrying static charge (such as a human body, equipment casing, or plastic parts) comes into contact with or approaches other objects. These high-energy interferences can not only break down components such as capacitors and diodes in a circuit, but may also burn out the power supply module and even cause permanent damage to chips.

[0053] In this embodiment, the first common-mode filter module is mainly used to filter out common-mode noise in the CAN link. The second common-mode filter module is mainly used to filter out common-mode noise in the CAN link, reduce high-frequency radiated emissions, ensure signal quality, and improve immunity. The second protection module is connected to the transceiver chip and can not only further absorb the surge, EFT, and ESD energy remaining in the first protection module, but also prevent LC resonance formed by the first common-mode filter module on the CAN link, amplify coupling interference, and form overshoot voltage, thus providing protection and absorption to prevent damage to downstream chips. The differential-mode filter module is mainly used for filtering and dissipating differential-mode noise on the CAN link, improving the bus's anti-interference capability, and ensuring signal integrity and reliability.

[0054] It is understood that the interface circuit provided in this application embodiment, based on two layers of protection and three levels of filtering, makes the protection of the interface circuit more thorough, the filtering frequency band wider, and the filtering performance significantly improved. It can effectively protect and filter when encountering electromagnetic interference, transient pulses, power fluctuations, grounding abnormalities, etc., without damaging the circuit components.

[0055] like Figure 2 As shown in this embodiment, the bus includes a positive bus CAN_H and a negative bus CAN_L. The first protection module includes a first bidirectional TVS diode TVS1 and a second bidirectional TVS diode TVS2. The first bidirectional TVS diode TVS1 and the second bidirectional TVS diode TVS2 are connected in series and then connected to the positive bus CAN_H and the negative bus CAN_L, respectively. The common connection point of the first bidirectional TVS diode TVS1 and the second bidirectional TVS diode TVS2 is grounded. Specifically, a TVS diode is a semiconductor device specifically designed to absorb transient high-voltage interference. When there is no interference in the circuit, the TVS diode is in a high-resistance state, like an open circuit, and hardly affects the normal operation of the circuit. However, when a transient high voltage exceeding the breakdown voltage of the TVS diode appears in the circuit, the TVS diode will break down rapidly within nanoseconds, changing from a high-resistance state to a low-resistance state. At this time, a large amount of transient current will be discharged through the TVS diode, thereby preventing current from flowing into the downstream circuit. At the same time, the TVS diode can also clamp the voltage across its terminals to a fixed maximum clamping voltage, thereby preventing high voltage from being conducted to downstream components. Connecting the first bidirectional TVS transistor (TVS1) and the second bidirectional TVS transistor (TVS2) in series to the positive bus CAN_H and the negative bus CAN_L can simultaneously protect against positive transient high voltage on the positive bus CAN_H and reverse transient high voltage on the negative bus CAN_L. Thus, by connecting the two bidirectional TVS transistors in series to ground, bidirectional and comprehensive transient voltage protection can be achieved.

[0056] It is understood that by connecting a bidirectional TVS diode in series between the positive bus CAN_H and the negative bus CAN_L of the CAN link, this is equivalent to providing an independent high-voltage discharge channel for both the positive and negative terminals simultaneously. This can protect against abnormal voltage differences between the positive and negative terminals, providing more comprehensive protection and thus improving the anti-interference capability of the interface circuit.

[0057] like Figure 3 As shown in the embodiment of this application, the bus includes a positive bus CAN_H and a negative bus CAN_L. The first protection module includes a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, a first bidirectional TVS transistor TVS1, and a second bidirectional TVS transistor TVS2. One end of the anti-parallel connection of the first diode D1 and the second diode D2 is connected to the positive bus CAN_H, and the other end is connected to the first bidirectional TVS transistor TVS1. The other end of the first bidirectional TVS transistor TVS1 is grounded. One end of the anti-parallel connection of the third diode D3 and the fourth diode D4 is connected to the negative bus CAN_L, and the other end is connected to the second bidirectional TVS transistor TVS2. The other end of the second bidirectional TVS transistor TVS2 is grounded. Specifically, the anti-parallel diodes D1 and D2 only conduct when the voltage exceeds 0.7V, filtering out minor noise in the positive bus CAN_H and preventing false triggering of the first bidirectional TVS diode TVS1. The first bidirectional TVS diode TVS1 discharges transient high voltage on the positive bus CAN_H, thus preventing damage to downstream components on the positive bus CAN_H. Correspondingly, the anti-parallel diodes D3 and D4 filter out minor voltage on the negative bus CAN_L, and the second bidirectional TVS diode TVS2 discharges transient high voltage on the negative bus CAN_L, preventing damage to the negative bus.

[0058] The downstream components on CAN_L have been damaged.

[0059] Understandably, connecting two anti-parallel diodes between the positive bus CAN_H and the negative bus CAN_L can filter out minor noise in the circuit, prevent the bidirectional TVS diode from frequently turning on and shortening its lifespan, and discharge transient high voltage through the bidirectional TVS diode, thus providing comprehensive protection.

[0060] like Figure 4As shown in this embodiment, the bus includes a positive bus CAN_H and a negative bus CAN_L. The first protection module includes a first semiconductor discharge tube TSS1, a second semiconductor discharge tube TSS2, a first bidirectional TVS tube TVS1, and a second bidirectional TVS tube TVS2. One end of the first semiconductor discharge tube TSS1 is connected to the positive bus CAN_H, and the other end is connected to the first bidirectional TVS tube TVS1. The other end of the first bidirectional TVS tube TVS1 is grounded. One end of the second semiconductor discharge tube TSS2 is connected to the negative bus CAN_L, and the other end is connected to the second bidirectional TVS tube TVS2. The other end of the second bidirectional TVS tube TVS2 is grounded. Specifically, the first semiconductor discharge tube TSS1 and the second semiconductor discharge tube TSS2 are used to initially discharge high-energy, high-voltage surge interference on the positive bus CAN_H and the negative bus CAN_L, respectively. Their core feature is strong current-carrying capacity, which can quickly guide high-energy surge currents exceeding the threshold in the bus to the subsequent first bidirectional TVS tubes TVS1 and TVS2, respectively, preventing high-energy surges from directly impacting subsequent circuits. The first bidirectional TVS diodes TVS1 and TVS2 serve as secondary protection for the positive bus CAN_H and the negative bus CAN_L, respectively. On the one hand, they are used to absorb the residual surges after the discharge of the first semiconductor discharge diodes TSS1 and TSS2, further clamping the voltage on the bus within a safe range. On the other hand, they can quickly respond to small- and medium-energy, high-frequency transient interference that the first semiconductor discharge diodes TSS1 and TSS2 cannot cover, making up for the relatively slow response speed of the first semiconductor discharge diodes TSS1 and TSS2, and ensuring that the bus voltage is stable within the tolerance threshold of the back-end circuit.

[0061] It is understandable that by setting up the first semiconductor discharge tube TSS1, the second semiconductor discharge tube TSS2, the first bidirectional TVS tube TVS1, and the second bidirectional TVS tube TVS2, the bus is equipped with hierarchical protection, which takes into account both large energy surge discharge and small energy transient suppression, and the protection range is more comprehensive. At the same time, the strong current carrying capacity of the semiconductor discharge tube is used to protect the bidirectional TVS tube, preventing the bidirectional TVS tube from failing due to energy overload and extending the overall life of the protection module.

[0062] like Figure 5As shown in the embodiment of this application, the bus includes a positive bus CAN_H and a negative bus CAN_L. The second protection module includes a bidirectional ESD transistor ESD1. The bidirectional ESD transistor ESD1 includes a first terminal, a second terminal and a third terminal. The first terminal is connected to the positive bus CAN_H, the second terminal is connected to the negative bus CAN_L, and the third terminal is grounded. Specifically, when the positive bus CAN_H experiences a positive overvoltage due to ESD, the bidirectional ESD transistor ESD1 will quickly turn on, discharging the excess electrostatic energy of the positive bus CAN_H through the third terminal. Simultaneously, it clamps the voltage of the positive bus CAN_H relative to ground within a safe threshold, preventing excessive voltage from impacting subsequent circuits. Similarly, when the negative bus CAN_L experiences a reverse overvoltage due to ESD, the bidirectional ESD transistor ESD1 will also quickly turn on, discharging the excess electrostatic energy of the negative bus CAN_L through the third terminal and clamping the voltage of the negative bus CAN_L relative to ground within a safe range, protecting the negative side circuit. If ESD interference directly occurs between the positive and negative buses CAN_L (e.g., due to an electrostatic potential difference between the two buses), the bidirectional ESD transistor ESD1 can be directly turned on through the first and second terminals, quickly discharging the electrostatic energy between the two buses and clamping the voltage difference between the positive and negative buses CAN_L, preventing overvoltage damage to components connected between the positive and negative terminals.

[0063] It is understandable that by setting up the bidirectional ESD transistor ESD1, it is possible to simultaneously protect against ESD interference in three dimensions: positive bus CAN_H to ground, negative bus CAN_L to ground, and positive bus CAN_H to negative bus CAN_L. This provides comprehensive electrostatic protection for the positive bus CAN_H and the negative bus CAN_L, preventing sensitive circuits from being damaged or failing due to ESD.

[0064] like Figure 6 As shown in the embodiment of this application, the first common-mode filtering module includes a common-mode inductor FIL1, which includes a first common-mode terminal, a second common-mode terminal, a third common-mode terminal, and a fourth common-mode terminal. The first and second common-mode terminals are connected to the positive bus CAN_H, and the third and fourth common-mode terminals are connected to the negative bus CAN_L. Specifically, the winding formed by the first and second common-mode terminals generates high impedance to the common-mode interference in the positive bus CAN_H, hindering the interference current from being conducted along the positive bus CAN_H to the subsequent circuit. Similarly, the winding formed by the third and fourth common-mode terminals generates high impedance to the common-mode interference in the negative bus CAN_L, hindering the interference current from being conducted along the negative bus CAN_L to the subsequent circuit. At the same time, the magnetic core converts the common-mode interference energy into heat energy for dissipation, avoiding interference to components.

[0065] Understandably, by setting the common-mode inductor FIL1, the common-mode interference of the positive and negative CAN_L buses can be suppressed in a targeted manner. At the same time, bidirectional common-mode interference can be filtered out simultaneously without affecting the normal differential-mode operating current of the bus, thus providing common-mode interference protection for the bus and ensuring the stable operation of the subsequent circuits.

[0066] like Figure 7 As shown in the embodiment of this application, the first common-mode filter module includes a first resistor and a second resistor. The first resistor is connected in series with the positive bus CAN_H, and the second resistor is connected in series with the negative bus CAN_L. The resistance values ​​of both the first and second resistors are less than or equal to 20mΩ. Specifically, when the common-mode interference in the bus is small, by connecting the first resistor with a small resistance value to the positive bus CAN_H and the second resistor with a small resistance value to the negative bus CAN_L, not only can the small common-mode interference be suppressed, but a path can also be formed on the bus, thereby protecting the circuit.

[0067] It is understandable that connecting a small resistor in series on the bus helps to suppress minor common-mode interference and achieve effective series connection.

[0068] like Figure 8 As shown in the embodiment of this application, the differential mode filtering module includes a first filter resistor R3, a second filter resistor R4, and a filter capacitor C3. The first filter resistor R3 and the second filter resistor R4 are connected in series and then connected between the positive bus CAN_H and the negative bus CAN_L, respectively. One end of the filter capacitor C3 is connected between the first filter resistor R3 and the second filter resistor R4, and the other end is grounded. The resistance values ​​XΩ of the first filter resistor R3 and the second filter resistor R4 satisfy the following relationship with the characteristic impedance YΩ of the bus: X=Y / 2. Specifically, the first filter resistor R3 and the second filter resistor R4 are connected in series and then bridged between the positive bus CAN_H and the negative bus CAN_L to form a voltage divider circuit. If there is a fixed voltage difference between the positive bus CAN_H and the negative bus CAN_L, the first filter resistor R3 and the second filter resistor R4 can divide the bus voltage according to their resistance ratio, so that the connection point of the first filter resistor R3 and the second filter resistor R4 obtains a stable intermediate voltage. This intermediate voltage is grounded through the filter capacitor C3, further clamping it to a stable value, providing a precise intermediate potential for the subsequent circuits, and preventing bus voltage fluctuations from directly affecting the subsequent stages.

[0069] It is worth noting that the first filter resistor R3, the second filter resistor R4, and the filter capacitor C3 constitute an RC voltage divider filter circuit. When there is differential mode interference in the bus, it will be suppressed by the RC voltage divider filter circuit. Furthermore, the filter capacitor C3 presents a low impedance to high frequency signals, which can discharge the interference current to ground through the first filter resistor R3 or the second filter resistor R4 and the filter capacitor C3.

[0070] It should be noted that the positive bus CAN_H and the negative bus CAN_L include a CAN differential link, the characteristic impedance of which is 120Ω (as specified in the CAN-ISO 11898-2 standard). Therefore, the resistance of the first filter resistor R3 and the second filter resistor R4 connected between the positive bus CAN_H and the negative bus CAN_L is 60.4Ω. By connecting the 60.4Ω first filter resistor R3 and the second filter resistor R4, signal reflection of the CAN bus can be prevented, thereby improving signal quality, enhancing the CAN bus's anti-interference capability, reducing charging and discharging time, and ensuring that the CAN bus quickly enters the recessive state.

[0071] In this embodiment, the filter capacitor C3 serves to balance the integrity, EMC, and reliability of the CAN bus signal. Its capacitance value depends primarily on the application scenario. When the CAN bus cable length is 0.5-20m and the transmission rate is 500K-2Mbps, the filter capacitor value can be 4.7nF. In special scenarios, such as CAN-FD over short distances, the filter capacitor value can be 2.2nF to 4.7nF. For long distances and high interference, the filter capacitor value can be 4.7nF to 22nF.

[0072] It is understandable that by setting the first filter resistor R3, the second filter resistor R4, and the filter capacitor C3, a combination of RC voltage division, filtering, and impedance matching is achieved. This not only achieves stable voltage division of the bus voltage but also suppresses high-frequency differential-mode interference. At the same time, impedance matching reduces signal reflection, ultimately providing a stable voltage / signal environment for the bus and subsequent circuits.

[0073] like Figure 9As shown in this embodiment, the second common-mode filtering module includes a first common-mode capacitor C1 and a second common-mode capacitor C2. The first common-mode capacitor C1 and the second common-mode capacitor C2 are connected in series to the positive bus CAN_H and the negative bus CAN_L, respectively. The connection point between the first common-mode capacitor C1 and the second common-mode capacitor C2 is grounded. The capacitance values ​​of both the first common-mode capacitor C1 and the second common-mode capacitor C2 are greater than or equal to 22pF and less than or equal to 47pF. Specifically, by connecting the first common-mode capacitor C1 and the second common-mode capacitor C2 in series between the positive bus CAN_H and the negative bus CAN_L, when common-mode interference occurs on both the positive bus CAN_H and the negative bus CAN_L, the first common-mode capacitor C1 directs the common-mode interference current of the positive bus CAN_H to the grounded midpoint; the common-mode interference current of the negative bus CAN_L flows to the grounded midpoint through the second common-mode capacitor C2. The two common-mode currents are ultimately discharged through the grounding loop, thereby preventing the common-mode interference current from being conducted to the subsequent circuit along the bus. The first common-mode capacitor C1 and the second common-mode capacitor C2 can attenuate the amplitude of the common-mode interference and protect the sensitive components at the back end from the influence of common-mode noise.

[0074] Understandably, by setting a first common-mode capacitor C1 and a second common-mode capacitor C2 between the positive bus CAN_H and the negative bus CAN_L, high-frequency common-mode interference between the positive bus CAN_H and the negative bus CAN_L and ground can be effectively suppressed without affecting the normal operation of the bus, thus further improving the circuit's anti-interference capability.

[0075] like Figure 10 As shown in this embodiment, the second common-mode filtering module includes a first common-mode capacitor C1, a second common-mode capacitor C2, a first high-frequency ferrite bead FB1, and a second high-frequency ferrite bead FB2. The first common-mode capacitor C1 and the second common-mode capacitor C2 are connected in series and then connected to the positive bus CAN_H and the negative bus, respectively.

[0076] In CAN_L, the connection point of the first common-mode capacitor C1 and the second common-mode capacitor C2 is grounded. The first high-frequency ferrite bead FB1 is connected in series with the positive bus CAN_H, and the second high-frequency ferrite bead FB2 is connected in series with the negative bus CAN_L. The DC resistance of the first high-frequency ferrite bead FB1 and the second high-frequency ferrite bead FB2 is less than or equal to 0.5Ω. Specifically, the first common-mode capacitor C1 and the second common-mode capacitor C2, through their series-grounded structure, provide a low-impedance discharge path for high-frequency common-mode interference between the positive bus CAN_H and the negative bus CAN_L and ground, guiding the common-mode current to ground. The first high-frequency ferrite bead FB1 and the second high-frequency ferrite bead FB2 present high impedance to mid-to-high-frequency common-mode interference in the bus, directly hindering the conduction of interference current to subsequent stages. Both act from the perspectives of discharge and blocking, covering a wider frequency range of common-mode interference, with a suppression effect far superior to that of a single device. Simultaneously, since the DC resistance of both the first high-frequency ferrite bead FB1 and the second high-frequency ferrite bead FB2 is less than or equal to 0.5Ω, they do not produce a significant DC voltage drop, preventing subsequent circuits from malfunctioning due to insufficient voltage.

[0077] It is understandable that by setting a first common-mode capacitor C1, a second common-mode capacitor C2, a first high-frequency ferrite bead FB1, and a second high-frequency ferrite bead FB2 between the positive bus CAN_H and the negative bus CAN_L, it can adapt to the anti-interference requirements of most power buses and signal buses. It can not only cope with the complex electromagnetic environment of industrial sites, but also meet the requirements of consumer electronics for miniaturization and low loss, and has a wide range of applications.

[0078] In summary, the interface circuit provided in this application embodiment, by setting a first protection module, a second protection module, a first common-mode filter module, a second common-mode filter module, and a differential-mode filter module, achieves two-layer protection and three-level filtering of noise in the circuit, making the protection of the interface circuit more thorough. Through this protection method and filtering process, the filtering frequency band of the interface circuit is wider, and the filtering performance is significantly improved. It can effectively protect and filter against electromagnetic interference, transient pulses, power fluctuations, grounding abnormalities, etc., without damaging circuit components.

[0079] like Figure 11 and Figure 12 As shown in the embodiments of this application, a vehicle is provided, including an on-board interface. The on-board interface includes a connection end, which is connected to the interface circuit provided in any of the above embodiments. The specific circuit connections, working process, and principle of this interface circuit have been described in the above embodiments, and will not be repeated here.

[0080] The above are merely optional embodiments of this application and do not limit the patent scope of this application. All equivalent structural transformations made based on the inventive concept of this application and the contents of the specification and drawings of this application, or direct / indirect applications in other related technical fields, are included within the patent protection scope of this application.

Claims

1. An interface circuit, characterized in that, Used for connecting to external interfaces and transceiver chips, including: A first protection module is used to connect to the external interface via a bus. The second protection module is used to connect to the transceiver chip via the bus. The first common-mode filtering module is connected to the first protection module via the bus; The second common-mode filtering module is connected to the second protection module via the bus. A differential-mode filtering module, wherein the differential-mode filtering module is connected to the first common-mode filtering module and the second common-mode filtering module respectively via the bus; Both the first protection module and the second protection module include bidirectional semiconductor devices.

2. The interface circuit according to claim 1, characterized in that, The bus includes a positive bus and a negative bus. The first protection module includes a first bidirectional TVS diode and a second bidirectional TVS diode. The first bidirectional TVS diode and the second bidirectional TVS diode are connected in series and then connected to the positive bus and the negative bus, respectively. The first bidirectional TVS diode and the second bidirectional TVS diode share a common connection point and are grounded.

3. The interface circuit according to claim 1, characterized in that, The bus includes a positive bus and a negative bus. The first protection module includes a first diode, a second diode, a third diode, a fourth diode, a first bidirectional TVS diode, and a second bidirectional TVS diode. One end of the first diode and the second diode are connected in antiparallel to the positive bus, and the other end is connected to the first bidirectional TVS diode. The other end of the first bidirectional TVS diode is grounded. One end of the third diode and the fourth diode connected in antiparallel is connected to the negative bus, and the other end is connected to the second bidirectional TVS diode. The other end of the second bidirectional TVS diode is grounded.

4. The interface circuit according to claim 1, characterized in that, The bus includes a positive bus and a negative bus. The first protection module includes a first semiconductor discharge tube, a second semiconductor discharge tube, a first bidirectional TVS tube and a second bidirectional TVS tube. One end of the first semiconductor discharge tube is connected to the positive bus, and the other end is connected to the first bidirectional TVS tube. The other end of the first bidirectional TVS tube is grounded. One end of the second semiconductor discharge tube is connected to the negative bus, and the other end is connected to the second bidirectional TVS tube, with the other end of the second bidirectional TVS tube grounded.

5. The interface circuit according to claim 1, characterized in that, The bus includes a positive bus and a negative bus. The second protection module includes a bidirectional ESD transistor. The bidirectional ESD transistor includes a first terminal, a second terminal, and a third terminal. The first terminal is connected to the positive bus, the second terminal is connected to the negative bus, and the third terminal is grounded.

6. The interface circuit according to any one of claims 2 to 5, characterized in that, The first common-mode filter module includes a common-mode inductor, which has a first common-mode terminal, a second common-mode terminal, a third common-mode terminal, and a fourth common-mode terminal. The first and second common-mode terminals are connected to the positive bus, and the third and fourth common-mode terminals are connected to the negative bus; or, The first common-mode filter module includes a first resistor and a second resistor. The first resistor is connected in series with the positive bus, and the second resistor is connected in series with the negative bus. The resistance values ​​of both the first resistor and the second resistor are less than or equal to 20mΩ.

7. The interface circuit according to claim 6, characterized in that, The differential mode filter module includes a first filter resistor, a second filter resistor, and a filter capacitor. The first filter resistor and the second filter resistor are connected in series and then connected between the positive bus and the negative bus, respectively. One end of the filter capacitor is connected between the first filter resistor and the second filter resistor, and the other end is grounded. The resistance values ​​XΩ of the first filter resistor and the second filter resistor satisfy the following relationship with the characteristic impedance YΩ of the bus: X = Y / 2.

8. The interface circuit according to claim 7, characterized in that, The second common-mode filter module includes a first common-mode capacitor and a second common-mode capacitor. The first common-mode capacitor and the second common-mode capacitor are connected in series and then connected to the positive bus and the negative bus, respectively. The connection point between the first common-mode capacitor and the second common-mode capacitor is grounded. The capacitance values ​​of both the first common-mode capacitor and the second common-mode capacitor are greater than or equal to 22pF and less than or equal to 47pF.

9. The interface circuit according to claim 7, characterized in that, The second common-mode filter module includes a first common-mode capacitor, a second common-mode capacitor, a first high-frequency ferrite bead, and a second high-frequency ferrite bead. The first common-mode capacitor and the second common-mode capacitor are connected in series and then connected to the positive bus and the negative bus, respectively. The connection point between the first common-mode capacitor and the second common-mode capacitor is grounded. The first high-frequency ferrite bead is connected in series with the positive bus, and the second high-frequency ferrite bead is connected in series with the negative bus. The DC resistance of both the first high-frequency magnetic bead and the second high-frequency magnetic bead is less than or equal to 0.5Ω.

10. A vehicle, characterized in that, It includes an in-vehicle interface, the in-vehicle interface including a connection end, the connection end being connected to the interface circuit as described in any one of claims 1-9.