Busbar capacitor active balancing module
By designing a voltage sampling module with precise voltage division and temperature drift compensation, combined with an internal comparator and switching transistor control module, the problem of uneven bus capacitor voltage was solved, achieving high-precision and fast-response voltage detection and energy adjustment.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- GUANGDONG BIFU NEW ENERGY CO LTD
- Filing Date
- 2025-08-06
- Publication Date
- 2026-07-21
Smart Images

Figure CN224537801U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of bus capacitor technology, specifically to an active balancing module for bus capacitors. Background Technology
[0002] Bus capacitors are core energy storage components in power electronic systems, playing a crucial role, especially in equipment such as frequency converters, inverters, and rectifiers. Active bus capacitor balancing modules are primarily used to address voltage unevenness issues caused by capacitance deviations, load imbalances, or differences in switching characteristics of series capacitors.
[0003] A search revealed that patent application number CN202322229014.8 discloses a bus capacitor voltage equalization circuit for a photovoltaic inverter. The inverter includes positive and negative bus capacitors, which are connected in series and then in parallel to the input terminal and DC bus of the inverter circuit. The circuit includes a first transistor and a second transistor connected to the input terminal of the bus capacitors and controlled by a controller to conduct, thereby balancing the voltage of the positive and negative bus capacitors. The advantage of this invention is that it uses transistors to actively equalize the voltage imbalance of the bus capacitors. By switching the transistors on and off, the voltage of the positive and negative bus capacitors becomes balanced, significantly reducing the power consumption of the original voltage equalization resistors, and requiring minimal cost.
[0004] Traditional bus capacitor active balancing modules have low voltage detection sensitivity, which makes it difficult to detect imbalances in a timely manner. In addition, their voltage sampling accuracy is poor, which makes it difficult to detect voltage differences between bus capacitors in a timely manner, resulting in a slow system response. Therefore, we need to propose a bus capacitor active balancing module. Utility Model Content
[0005] The purpose of this invention is to provide an active equalization module for bus capacitors. Through the design of the voltage divider resistors in the voltage sampling module, precise voltage division is achieved, proportionally attenuating the bus voltage to a low-voltage sampling range, thus improving voltage sampling accuracy and meeting the microvolt-level voltage detection requirements of bus capacitors. Temperature drift compensation eliminates sampling deviations caused by thermal stress. The design of the control and drive module features a high-gain internal comparator, amplifying detection errors and enabling rapid detection of imbalances. It supports microsecond-level adjustments and allows for bidirectional control switching between boost and buck modes, thereby solving the problems mentioned in the background section.
[0006] To achieve the above objectives, this utility model provides the following technical solution: a bus capacitor active balancing module, comprising:
[0007] A voltage sampling module that collects the voltage values of the positive bus capacitor and the negative bus capacitor in real time and calculates the voltage difference;
[0008] The control and drive module generates a control signal based on the calculated voltage difference to control energy transfer.
[0009] A switching transistor control module that controls the current path through a switching transistor to realize the energy flow between capacitors;
[0010] A voltage conversion module used for temporary storage of transferred energy and to achieve voltage conversion;
[0011] The voltage sampling module, control and drive module, switching transistor control module, voltage conversion module, and bus capacitor are connected in sequence, and the voltage sampling module is electrically connected to the bus capacitor.
[0012] Preferably, the voltage sampling module includes a voltage regulator chip U2, comparator U1A, comparator U1B, comparator U3A, and comparator U3B. A resistor R1 is connected to pins 1 and 2 of the voltage regulator chip U2. A resistor R2 is connected to pin 5 of the comparator U1B. A resistor R3 is connected between pins 1 and 2 of the voltage regulator chip U2 and pin 5 of the comparator U1B. Resistors R4 and R5 are connected between pin 7 of the comparator U1B and pin 3 of the comparator U3B. A resistor R10 is connected between pin 7 of the comparator U3B and pin 3 of the comparator U1A.
[0013] Preferably, a resistor R11 is connected between pin 5 of comparator U3B and pin 1 of comparator U3A; a resistor R9 is connected between pin 1 and pin 2 of comparator U3A; a grounded resistor R8 is also connected to pin 2 of comparator U3A; pin 6 of comparator U3B is connected between resistors R4 and R5; a resistor R7 is connected between pin 1 and pin 2 of comparator U1A; and a grounded resistor R6 is also connected to pin 2 of comparator U1A.
[0014] Preferably, the control and drive module includes a chip U1, transistors Q1, Q2, Q3, and Q4. A resistor R84 is connected between the base of transistor Q1 and the base of transistor Q2 and pin 14 of chip U1. A resistor R94 is connected between the collector of transistor Q2 and pin 14 of chip U1. A resistor R104 is connected between the base of transistor Q3 and the base of transistor Q4 and pin 11 of chip U1. A resistor R114 is connected between the collector of transistor Q4 and pin 11 of chip U1. A diode D1 is connected between the collector of transistor Q1 and pin 13 of chip U1.
[0015] Preferably, capacitors C7 and C8 are connected in parallel between pins 12 and 13 of chip U1, resistor R23 forming a closed loop, light-emitting diode DL1, and capacitor C6 are connected to pin 16 of chip U1, capacitor C4 is connected to ground, and capacitor C4 is connected to pin 8 of chip U1, and capacitor C5 and resistor R64 are connected to pin 10 of chip U1 respectively.
[0016] Preferably, the switching control module includes MOSFETs Q40, Q50, and Q27. The gate of MOSFET Q40 is connected to the drain of MOSFET Q27, the gate of MOSFET Q27 is connected to the drain of MOSFET Q50, a resistor R43 is connected between the drain of MOSFET Q50 and the source of MOSFET Q40, a resistor R33 is connected between the gate of MOSFET Q50 and the source of MOSFET Q40, a resistor R53 is connected between the source and gate of MOSFET Q40, and a capacitor C29 and a resistor R63 are connected in parallel between the gate and source of MOSFET Q50.
[0017] Preferably, the voltage conversion module includes a chip U15 and an inductor L1. Pin 1 of the chip U15 is connected to pin 1 of the inductor L1, pin 8 of the chip U15 is connected to pin 2 of the inductor L1, pin 1 of the chip U15 is connected to capacitors C15 and C25, and pin 3 of the chip U15 is connected to resistor R45. Capacitors C15, C25, and resistor R45 are all grounded.
[0018] Preferably, a capacitor C55 is connected between pin 4 and pin 2 of the inductor L1, a diode D15 is connected to pin 4 of the inductor L1, one end of the diode D15 is connected to a capacitor C35 and a capacitor C45 connected in parallel, and a resistor R15 and a capacitor C85 connected in parallel, and the terminals of the resistor R15 and the capacitor C85 are connected to pin 4 of the chip U15.
[0019] Compared with the prior art, the beneficial effects of this utility model are:
[0020] 1. This utility model achieves precise voltage division by designing the voltage dividing resistor in the voltage sampling module, which proportionally attenuates the bus voltage to the low voltage sampling range, thereby improving the voltage sampling accuracy and meeting the microvolt level voltage detection requirements of the bus capacitor. Furthermore, it eliminates sampling deviations caused by thermal stress through temperature drift compensation.
[0021] 2. Through the design of the control and drive module, this utility model has a large internal comparator gain, which can amplify the detection error, quickly detect imbalance, support microsecond-level adjustment, and switch between boost and buck bidirectional control.
[0022] 3. This utility model, through the design of the switching transistor control module, controls the current path through the switching transistor to realize the energy flow between capacitors, and ensures that the transistor gate is reliably turned off when there is no signal, preventing the transistor gate from being broken down by current, and has the advantage of low conduction loss, reducing heat loss. Attached Figure Description
[0023] Figure 1 This is a system block diagram of the present invention;
[0024] Figure 2 This is a circuit diagram of the voltage sampling module of this utility model;
[0025] Figure 3 This is a circuit diagram of the control and drive module of this utility model;
[0026] Figure 4 This is the circuit diagram of the switching transistor control module of this utility model;
[0027] Figure 5 This is a circuit diagram of the voltage conversion module of this utility model. Detailed Implementation
[0028] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.
[0029] Please see Figure 1-5 This utility model provides a technical solution: a bus capacitor active balancing module, comprising:
[0030] A voltage sampling module that acquires the voltage values of the positive and negative bus capacitors in real time and calculates the voltage difference; the voltage sampling module also converts the obtained voltage difference into a processable differential voltage signal;
[0031] The voltage sampling module includes a voltage regulator chip U2, comparator U1A, comparator U1B, comparator U3A, and comparator U3B. Resistor R1 is connected to pins 1 and 2 of the voltage regulator chip U2. Resistor R2 is connected to pin 5 of the comparator U1B. Resistor R3 is connected between pins 1 and 2 of the voltage regulator chip U2 and pin 5 of the comparator U1B. Resistor R4 and resistor R5 are connected between pin 7 of the comparator U1B and pin 3 of the comparator U3B. Resistor R10 is connected between pin 7 of the comparator U3B and pin 3 of the comparator U1A.
[0032] A resistor R11 is connected between pin 5 of comparator U3B and pin 1 of comparator U3A. A resistor R9 is connected between pin 1 and pin 2 of comparator U3A. A grounded resistor R8 is also connected to pin 2 of comparator U3A. Pin 6 of comparator U3B is connected between resistors R4 and R5. A resistor R7 is connected between pin 1 and pin 2 of comparator U1A. A grounded resistor R6 is also connected to pin 2 of comparator U1A.
[0033] The voltage sampling module contains multiple LM358D comparators used to construct differential amplifier or comparator circuits, amplifying the input signal voltage difference and outputting high-precision control signals. The voltage regulator chip U2, model TL431, provides a stable reference voltage for setting the comparison threshold. U2, in conjunction with the resistor network (R8 and R9), generates the reference voltage.
[0034] Resistors (R1-R5, R10-R12) are used for signal voltage division, gain setting, and feedback, and for input impedance matching in the differential input path. Resistor R7 is used for inverting input feedback of comparator U1B, and resistor R8 is used for voltage division of the voltage regulator chip U2.
[0035] The input signal (voltage divider sampling of the bus capacitor) is connected to the non-inverting and inverting input terminals of the comparator through a resistor network (R1, R2, etc.). The voltage regulator chip U2 sets the gain through the feedback resistor (R7). The voltage regulator chip U2 provides a reference voltage, which is connected to pin 2 of the comparator U3A and used as the comparison threshold. If the input voltage sampling exceeds the reference, the comparator outputs a high / low level error signal.
[0036] The control and drive module generates a control signal based on the calculated voltage difference to control energy transfer.
[0037] The control and drive module includes a chip U1, transistors Q1, Q2, Q3, and Q4. A resistor R84 is connected between the base of transistor Q1 and the base of transistor Q2 and pin 14 of chip U1. A resistor R94 is connected between the collector of transistor Q2 and pin 14 of chip U1. A resistor R104 is connected between the base of transistor Q3 and the base of transistor Q4 and pin 11 of chip U1. A resistor R114 is connected between the collector of transistor Q4 and pin 11 of chip U1. A diode D1 is connected between the collector of transistor Q1 and pin 13 of chip U1.
[0038] A capacitor C7 and a capacitor C8 are connected in parallel between pins 12 and 13 of the chip U1. A resistor R23, a light-emitting diode DL1, and a capacitor C6 are connected to pin 16 of the chip U1 to form a closed loop. A capacitor C4 is connected to ground at pin 8 of the chip U1. A capacitor C5 and a resistor R64 are connected to ground at pin 10 of the chip U1.
[0039] Chip U1 is a PWM control chip, model SG3532. Pin 10 of chip U1 is used for soft shutdown control, and the output is forcibly shut down when the level is high. Pins 5 and 6 are used for oscillation frequency setting, and pins 11 and 14 are two complementary PWM outputs.
[0040] Transistors Q1 and Q3 amplify the PWM signal forward, while transistors Q2 and Q4 drive it negatively, forming a complementary push-pull configuration. Resistors R84 and R104 limit the base current of the transistors to prevent overdrive. Capacitor C4, in conjunction with resistor R54, performs soft-start to avoid power-on surges. Capacitors C1 and C2 suppress high-frequency noise in the PWM signal.
[0041] A switching transistor control module that controls the current path through a switching transistor to realize the energy flow between capacitors;
[0042] The switching control module includes MOSFETs Q40, Q50, and Q27. The gate of MOSFET Q40 is connected to the drain of MOSFET Q27, and the gate of MOSFET Q27 is connected to the drain of MOSFET Q50. A resistor R43 is connected between the drain of MOSFET Q50 and the source of MOSFET Q40. A resistor R33 is connected between the gate of MOSFET Q50 and the source of MOSFET Q40. A resistor R53 is connected between the source and gate of MOSFET Q40. A capacitor C29 and a resistor R63 are connected in parallel between the gate and source of MOSFET Q50.
[0043] MOSFETs Q50 and Q27 are both N-channel MOSFETs. Resistors R33, R43, R53, and R63 are used to ensure reliable turn-off of the MOSFETs when there is no signal at the gate and to prevent gate breakdown current. Resistor R27 is used for current sampling and oscillation suppression.
[0044] When the input is high, the gate of MOSFET Q50 is at a high voltage, so MOSFET Q50 is turned on; when the gate of MOSFET Q27 is at a low level, it is turned off.
[0045] When the input is low, the gate of MOSFET Q50 is discharged by the pull-down resistor (R33 / R43), MOSFET Q50 is turned off, and MOSFET Q27 is turned on.
[0046] A voltage conversion module used for temporary storage of transferred energy and to achieve voltage conversion;
[0047] The voltage conversion module includes a chip U15 and an inductor L1. Pin 1 of the chip U15 is connected to pin 1 of the inductor L1, pin 8 of the chip U15 is connected to pin 2 of the inductor L1, pin 1 of the chip U15 is connected to capacitors C15 and C25, and pin 3 of the chip U15 is connected to resistor R45. Capacitors C15, C25, and resistor R45 are all grounded.
[0048] A capacitor C55 is connected between pins 4 and 2 of the inductor L1. A diode D15 is connected to pin 4 of the inductor L1. One end of the diode D15 is connected to capacitors C35 and C45 in parallel, as well as resistor R15 and capacitor C85 in parallel. The terminals of resistor R15 and capacitor C85 are connected to pin 4 of chip U15.
[0049] Capacitor C15 is the input filter capacitor, suppressing input ripple and providing transient current capability. The power switch is integrated inside chip U15, used to complete the DC-DC chopper boost. Inductor L1 is the core of energy conversion, storing energy when the current rises and releasing energy at the output when the current falls. Diode D15 provides a current path when inductor L1 releases energy, preventing reverse breakdown. Capacitors C35 and C45 are output filter capacitors, used to smooth the output ripple. Resistor R55 is used to detect the peak current of inductor L1 to achieve overcurrent protection. Resistors R25 and R45 are used to set the output voltage.
[0050] The voltage sampling module, control and drive module, switching transistor control module, voltage conversion module, and bus capacitor are connected in sequence, and the voltage sampling module is electrically connected to the bus capacitor.
[0051] Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the present invention, the scope of which is defined by the appended claims and their equivalents.
Claims
1. A bus capacitor active balancing module, characterized in that, include: A voltage sampling module that collects the voltage values of the positive bus capacitor and the negative bus capacitor in real time and calculates the voltage difference; The control and drive module generates a control signal based on the calculated voltage difference to control energy transfer. A switching transistor control module that controls the current path through a switching transistor to realize the energy flow between capacitors; A voltage conversion module used for temporary storage of transferred energy and to achieve voltage conversion; The voltage sampling module, control and drive module, switching transistor control module, voltage conversion module, and bus capacitor are connected sequentially. The voltage sampling module is electrically connected to the bus capacitor. The voltage sampling module includes a voltage regulator chip U2, comparator U1A, comparator U1B, comparator U3A, and comparator U3B. Resistor R1 is connected to pins 1 and 2 of the voltage regulator chip U2. Resistor R2 is connected to pin 5 of the comparator U1B. Resistor R3 is connected between pins 1 and 2 of the voltage regulator chip U2 and pin 5 of the comparator U1B. Pin 7 of the comparator U1B is connected to pin 3 of the comparator U3B. Resistors R4 and R5 are connected between the pins of the comparator. Resistor R10 is connected between pin 7 of comparator U3B and pin 3 of comparator U1A. Resistor R11 is connected between pin 5 of comparator U3B and pin 1 of comparator U3A. Resistor R9 is connected between pin 1 and pin 2 of comparator U3A. Pin 2 of comparator U3A is also connected to ground by resistor R8. Pin 6 of comparator U3B is connected between resistors R4 and R5. Resistor R7 is connected between pin 1 and pin 2 of comparator U1A. Pin 2 of comparator U1A is also connected to ground by resistor R6.
2. The bus capacitor active balancing module according to claim 1, characterized in that: The control and drive module includes a chip U1, transistors Q1, Q2, Q3, and Q4. A resistor R84 is connected between the base of transistor Q1 and the base of transistor Q2 and pin 14 of chip U1. A resistor R94 is connected between the collector of transistor Q2 and pin 14 of chip U1. A resistor R104 is connected between the base of transistor Q3 and the base of transistor Q4 and pin 11 of chip U1. A resistor R114 is connected between the collector of transistor Q4 and pin 11 of chip U1. A diode D1 is connected between the collector of transistor Q1 and pin 13 of chip U1.
3. The bus capacitor active balancing module according to claim 2, characterized in that: A capacitor C7 and a capacitor C8 are connected in parallel between pins 12 and 13 of the chip U1. A resistor R23, a light-emitting diode DL1, and a capacitor C6 are connected to pin 16 of the chip U1 to form a closed loop. A capacitor C4 is connected to ground at pin 8 of the chip U1. A capacitor C5 and a resistor R64 are connected to ground at pin 10 of the chip U1.
4. The bus capacitor active balancing module according to claim 1, characterized in that: The switching control module includes MOSFETs Q40, Q50, and Q27. The gate of MOSFET Q40 is connected to the drain of MOSFET Q27, and the gate of MOSFET Q27 is connected to the drain of MOSFET Q50. A resistor R43 is connected between the drain of MOSFET Q50 and the source of MOSFET Q40. A resistor R33 is connected between the gate of MOSFET Q50 and the source of MOSFET Q40. A resistor R53 is connected between the source and gate of MOSFET Q40. A capacitor C29 and a resistor R63 are connected in parallel between the gate and source of MOSFET Q50.
5. The bus capacitor active balancing module according to claim 1, characterized in that: The voltage conversion module includes a chip U15 and an inductor L1. Pin 1 of the chip U15 is connected to pin 1 of the inductor L1, pin 8 of the chip U15 is connected to pin 2 of the inductor L1, pin 1 of the chip U15 is connected to capacitors C15 and C25, and pin 3 of the chip U15 is connected to resistor R45. Capacitors C15, C25, and resistor R45 are all grounded.
6. The bus capacitor active balancing module according to claim 5, characterized in that: A capacitor C55 is connected between pins 4 and 2 of the inductor L1. A diode D15 is connected to pin 4 of the inductor L1. One end of the diode D15 is connected to capacitors C35 and C45 in parallel, as well as resistor R15 and capacitor C85 in parallel. The terminals of resistor R15 and capacitor C85 are connected to pin 4 of chip U15.