All-wheel drive control circuit and device

Abstract

The utility model discloses a kind of all drive control circuit and device, applied to power electronics technical field, to solve the problem of poor power supply reliability of all drive control circuit in prior art, specifically including the input end of first voltage conversion module is used to access external power supply, the output end of first voltage conversion module is connected with the first input end of power supply switching module;USB connector is used to be plugged with external communication equipment, the power supply pin of USB connector is connected with the second input end of power supply switching module, the differential data pin of USB connector is connected with the USB communication end of control module;The input end of second voltage conversion module is connected with the output end of power supply switching module, the output end of second voltage conversion module is connected with the power supply end of control module.When external power supply is abnormal, power supply switching module can be switched to the communication equipment powered by USB module introduction, reduce the risk of operation failure caused by single power supply path interruption, improve power supply reliability.

Description

Technical Field

[0001] This utility model relates to the field of electronic circuit technology, and in particular to a full drive control circuit and device. Background Technology

[0002] With the widespread application of embedded systems and smart terminal devices, the full drive control circuit, as the core module of key loads such as drive motors and actuators, is widely used in industrial automation, robots, drones and portable smart devices.

[0003] Existing all-drive control circuits typically employ a single external DC power supply architecture. This architecture features a fixed power path and simple topology, generally connecting to the DC voltage output from an adapter via terminals or a dedicated power interface. The voltage is then internally regulated, filtered, and isolated before supplying power to the drive chip, logic control unit, and power devices. This design can meet basic operational requirements in scenarios with stable power supplies and standardized wiring. However, in real-world conditions such as mobile operations and on-site debugging, the external power interface is susceptible to vibration, poor contact, or power fluctuations. When the external power supply is abnormal, the control module faces the risk of power interruption, leading to drive logic malfunction or system failure, resulting in poor power supply reliability. Utility Model Content

[0004] This utility model provides a full drive control circuit and device to solve the problem of poor power supply reliability in existing full drive control circuits.

[0005] The technical solution provided by this utility model embodiment is as follows: On one hand, this utility model embodiment provides a full drive control circuit, including: a first voltage conversion module, a second voltage conversion module, a USB module, a power supply switching module, and a control module; The input terminal of the first voltage conversion module is used to connect to an external power source, and the output terminal of the first voltage conversion module is connected to the first input terminal of the power supply switching module. The USB module includes a USB connector for connecting to an external communication device. The power pin of the USB connector is connected to the second input terminal of the power switching module, and the differential data pin of the USB connector is connected to the USB communication terminal of the control module. The input terminal of the second voltage conversion module is connected to the output terminal of the power supply switching module, and the output terminal of the second voltage conversion module is connected to the power supply terminal of the control module.

[0006] Optionally, the power supply switching module includes: a first PMOS transistor, a second PMOS transistor, a first driving module, a signal inversion module, and a second driving module; The source of the first PMOS transistor is connected to the output terminal of the first voltage conversion module, and the drain of the first PMOS transistor is connected to the drain of the second PMOS transistor and the input terminal of the second voltage conversion module. The source of the second PMOS transistor is connected to the power supply pin of the USB connector, and the drain of the second PMOS transistor is connected to the input terminal of the second voltage conversion module. The input terminal of the first driving module is connected to the output terminal of the first voltage conversion module, the first output terminal of the first driving module is connected to the gate of the first PMOS transistor, and the second output terminal of the first driving module is connected to the input terminal of the signal inversion module. The output of the signal inversion module is connected to the first input of the second drive module; The second input terminal of the second drive module is connected to the power pin of the USB connector, and the output terminal of the second drive module is connected to the gate of the second PMOS transistor.

[0007] Optionally, the first driving module includes: a first resistor, a second resistor, a third resistor, and a first NMOS transistor; The first end of the first resistor is connected to the output end of the first voltage conversion module, and the second end of the first resistor is connected to ground via the second resistor. The first end of the third resistor is connected to the first end of the first resistor, and the second end of the third resistor is connected to the gate of the first PMOS transistor and the drain of the first NMOS transistor, respectively. The gate of the first NMOS transistor is connected to the second terminal of the first resistor and the input terminal of the signal inverting module, respectively, and the drain of the first NMOS transistor is connected to ground.

[0008] Optionally, the second drive module includes: a fourth resistor and a second NMOS transistor; The first end of the fourth resistor is connected to the power pin of the USB connector, and the second end of the fourth resistor is connected to the gate of the second PMOS transistor and the drain of the second NMOS transistor. The gate of the second NMOS transistor is connected to the output terminal of the signal inverting module, and the drain of the second NMOS transistor is connected to ground.

[0009] Optionally, the power supply switching module includes: a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a first capacitor, and a power multiplexer chip; The first end of the fifth resistor is connected to the output of the first voltage conversion module, and the second end of the fifth resistor is connected to ground via the sixth resistor. The first end of the seventh resistor is connected to the power pin of the USB connector, and the second end of the seventh resistor is connected to ground via the eighth resistor. The first input pin and external voltage reference pin of the power multiplexer chip are connected to the output of the first voltage conversion module, respectively. The second input pin of the power multiplexer chip is connected to the power pin of the USB connector. The first overvoltage protection configuration pin of the power multiplexer chip is connected to the second end of the fifth resistor. The second overvoltage protection configuration pin of the power multiplexer chip is connected to the second end of the seventh resistor. The priority enable pin of the power multiplexer chip is connected to ground. The current limit configuration pin of the power multiplexer chip is connected to ground through the ninth resistor. The soft-start configuration pin of the power multiplexer chip is connected to ground through the first capacitor. The power output pin of the power multiplexer chip is connected to the input of the second voltage conversion module.

[0010] Optionally, the all-drive control circuit may also include: a CAN communication module, a first communication interface, a second communication interface, and a terminal matching resistor module; The signal transmitting end of the CAN communication module is connected to the CAN communication transmitting end of the control module, and the signal receiving end of the CAN communication module is connected to the CAN communication receiving end of the control module. The high-level bus end of the CAN communication module is connected to the high-level end of the first communication interface and the high-level end of the second communication interface, respectively. The low-level bus end of the CAN communication module is connected to the low-level end of the first communication interface and the low-level end of the second communication interface, respectively. The first end of the terminating resistor module is connected to the high-level bus terminal of the CAN communication module, and the second end of the terminating resistor module is connected to the low-level bus terminal of the CAN communication module.

[0011] Optionally, the terminal matching resistor module includes: a mechanical switch and a tenth resistor; The first end of the mechanical switch is left floating, the second end of the mechanical switch is connected to the high-level bus terminal of the CAN communication module, and the third end of the mechanical switch is connected to the low-level bus terminal of the CAN communication module via the tenth resistor.

[0012] Optionally, the CAN communication module includes: a CAN communication chip, a second capacitor, a first TVS diode, and a second TVS diode; The CAN communication chip's transmit data input pin is connected to the CAN communication transmitter of the control module, and its receive data output pin is connected to the CAN communication receiver of the control module. The high-level bus pin of the CAN communication chip is connected to the high-level terminals of the first and second communication interfaces, respectively. The low-level bus pin of the CAN communication chip is connected to the low-level terminals of the first and second communication interfaces, respectively. The power supply pin of the CAN communication chip is connected to the output terminal of the second voltage conversion module and the first terminal of the second capacitor, respectively. The second terminal of the second capacitor is connected to ground. The first terminal of the first TVS diode is connected to the high-level bus pin of the CAN communication chip, and the second terminal of the first TVS diode is connected to ground. The first terminal of the second TVS diode is connected to the low-level bus pin of the CAN communication chip, and the second terminal of the second TVS diode is connected to ground.

[0013] Optionally, the all-drive control circuit may also include: a serial servo communication module and a serial servo interface; The signal transmitting end of the serial servo communication module is connected to the servo communication transmitting end of the control module, the signal receiving end of the serial servo communication module is connected to the servo communication receiving end of the control module, and the communication end of the serial servo communication module is connected to the serial servo interface.

[0014] On the other hand, this utility model embodiment provides a full-drive control device, including: a circuit board and the aforementioned full-drive control circuit; the full-drive control circuit is integrated on the circuit board.

[0015] The beneficial effects of this utility model embodiment are as follows: In this embodiment of the invention, by setting a power supply switching module, the output terminal of the first voltage conversion module and the power pin of the USB connector are connected to the first and second input terminals of the power supply switching module respectively, and then uniformly converted by the second voltage conversion module into the power supply voltage required by the control module, realizing dual-circuit redundant power supply of external power supply and communication equipment power supply; when the external power supply is abnormal or disconnected, the power supply switching module can switch to the communication equipment power supply introduced by the USB connector to maintain the continuous power supply of the control module, reducing the risk of system operation failure caused by the interruption of a single power supply path and improving power supply reliability.

[0016] Other features and advantages of this invention will be set forth in the following description, and will be apparent in part from the description, or may be learned by practicing the invention. The objects and other advantages of this invention can be realized and obtained by means of the structures particularly pointed out in the written description, claims, and drawings. Attached Figure Description

[0017] The accompanying drawings, which are included to provide a further understanding of the present invention and constitute a part of this invention, illustrate exemplary embodiments of the present invention and, together with the description thereof, serve to explain the present invention and do not constitute an undue limitation thereof. In the drawings: Figure 1 This is a schematic diagram of the first circuit structure of the all-drive control circuit in this embodiment of the present invention; Figure 2 This is a schematic diagram of the second circuit structure of the all-drive control circuit in this embodiment of the present invention; Figure 3This is a schematic diagram of the third circuit structure of the all-drive control circuit in this embodiment of the present invention; Figure 4 This is a schematic diagram of the fourth circuit structure of the all-drive control circuit in this embodiment of the present invention; Figure 5 This is a schematic diagram of the fifth circuit structure of the all-drive control circuit in this embodiment of the present invention; Figure 6 This is a schematic diagram of the sixth circuit structure of the all-drive control circuit in this embodiment of the present invention.

[0018] Icons: 100 - Full drive control circuit; 110 - First voltage conversion module; 120 - Second voltage conversion module; 130 - USB module; 131 - USB connector; 140 - Power supply switching module; 150 - Control module; Q1 - First PMOS transistor; Q2 - Second PMOS transistor; 141 - First drive module; 142 - Signal inversion module; 143 - Second drive module; R1 - First resistor; R2 - Second resistor; R3 - Third resistor; Q3 - First NMOS transistor; R4 - Fourth resistor; Q4 - Second NMOS transistor; R 5 - Fifth resistor; R6 - Sixth resistor; R7 - Seventh resistor; R8 - Eighth resistor; R9 - Ninth resistor; C1 - First capacitor; U1 - Power multiplexer chip; 160 - CAN communication module; 170 - First communication interface; 171 - Second communication interface; 180 - Termination matching resistor module; K1 - Mechanical switch; R10 - Tenth resistor; U2 - CAN communication chip; C2 - Second capacitor; D1 - First TVS diode; D2 - Second TVS diode; 190 - Serial servo communication module; 191 - Serial servo interface. Detailed Implementation

[0019] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0020] This utility model embodiment provides a full drive control circuit, see reference. Figure 1 As shown, the total drive control circuit 100 includes at least: a first voltage conversion module 110, a second voltage conversion module 120, a USB (Universal Serial Bus) module 130, a power supply switching module 140, and a control module 150; The input terminal of the first voltage conversion module 110 is used to connect to an external power supply, and the output terminal of the first voltage conversion module 110 is connected to the first input terminal of the power supply switching module 140. USB module 130 includes USB connector 131, which is used to connect to an external communication device. The power pin of USB connector 131 is connected to the second input terminal of power switching module 140, and the differential data pin of USB connector 131 is connected to the USB communication terminal of control module 150. The input terminal of the second voltage conversion module 120 is connected to the output terminal of the power supply switching module 140, and the output terminal of the second voltage conversion module 120 is connected to the power supply terminal of the control module 150.

[0021] exist Figure 1In the illustrated all-drive control circuit 100, a first voltage conversion module 110 is located between the external power supply and the power supply switching module 140. It receives DC input voltage from external devices such as adapters or batteries. After stepping down, regulating, or isolating the input voltage from the external power supply, it converts it into a first DC voltage that matches the input voltage level of the power supply switching module 140, thereby establishing the main power supply branch for the external power supply to the all-drive control circuit 100. The first voltage conversion module 110 is connected to the external power supply. The USB module 130 in the all-drive control circuit 100 is configured as a module with both data communication and power input functions. USB module 130 includes USB connector 131, which is used to connect to an external communication device. The differential data pin of USB connector 131 is connected to the USB communication terminal of control module 150, and the power pin of USB connector 131 is connected to the second input terminal of power supply switching module 140. When the communication device is connected to the full drive control circuit 100 through USB connector 131, the DC power supply voltage output by the communication device is introduced into power supply switching module 140 through the power pin of USB connector 131. The DC power supply voltage output by the communication device is used as the second DC voltage input to power supply switching module 140, forming a backup power supply branch independent of the external main power supply. Power supply switching module 140 is used to output the first DC voltage or the second DC voltage to the second voltage conversion module 120. When the external power supply is normally connected, the first DC voltage is output to the second voltage conversion module 120 through power supply switching module 140; when the external power supply is disconnected and the communication device is connected through USB connector 131, the second DC voltage is output to the second voltage conversion module 120 through power supply switching module 140. The second voltage conversion module 120 is located between the power supply switching module 140 and the control module 150. It receives either a first DC voltage or a second DC voltage from the output of the power supply switching module 140. The first DC voltage originates from the external power supply processed by the first voltage conversion module 110, and the second DC voltage originates from the power supply of the communication device introduced through the USB connector 131. The first and second DC voltages have the same voltage value, typically 5V. The output of the second voltage conversion module 120 is electrically connected to the power supply of the control module 150, stepping down the first or second DC voltage to the operating voltage required by the internal logic circuits and drive units of the control module 150. It also filters out voltage ripple and noise disturbances from the preceding transmission process, ensuring that the DC power output to the control module 150 meets the voltage accuracy and ripple requirements. The power supply of the control module 150 is connected to the output of the second voltage conversion module 120, receiving the operating voltage output by the second voltage conversion module 120 to maintain the normal operation of the microcontroller and drive circuits inside the control module 150.

[0022] In practical applications, when an external power source is normally connected, electrical energy flows sequentially through the first voltage conversion module 110, the power supply switching module 140, and the second voltage conversion module 120, finally reaching the control module 150. When the external power source is disconnected and the communication device is connected via the USB connector 131, electrical energy flows sequentially through the power pins of the USB connector 131, the power supply switching module 140, and the second voltage conversion module 120, finally reaching the control module 150. The power supply switching module 140 switches the power supply path according to the status of the two inputs, ensuring that the power supply terminal of the control module 150 is always electrically connected to at least one input power source through the second voltage conversion module 120.

[0023] In this way, by setting up the power supply switching module 140, the power pins of the first voltage conversion module 110 and the USB connector 131 are respectively connected to the first input terminal and the second input terminal of the power supply switching module 140, and then uniformly converted by the second voltage conversion module 120 into the power supply voltage required by the control module 150, realizing dual-circuit redundant power supply of external power supply and communication equipment power supply; when the external power supply is abnormal or disconnected, the power supply switching module 140 can switch to the communication equipment power supply introduced by the USB connector 131 to maintain the continuous power supply of the control module 150, reducing the risk of system operation failure caused by the interruption of a single power supply path and improving power supply reliability.

[0024] In one possible implementation, see [reference] Figure 2 As shown, the power supply switching module 140 includes: a first PMOS transistor Q1, a second PMOS transistor Q2, a first driving module 141, a signal inversion module 142, and a second driving module 143; The source of the first PMOS transistor Q1 is connected to the output terminal of the first voltage conversion module 110, and the drain of the first PMOS transistor Q1 is connected to the drain of the second PMOS transistor Q2 and the input terminal of the second voltage conversion module 120. The source of the second PMOS transistor Q2 is connected to the power supply pin of the USB connector 131, and the drain of the second PMOS transistor Q2 is connected to the input terminal of the second voltage conversion module 120. The input terminal of the first driving module 141 is connected to the output terminal of the first voltage conversion module 110, the first output terminal of the first driving module 141 is connected to the gate of the first PMOS transistor Q1, and the second output terminal of the first driving module 141 is connected to the input terminal of the signal inversion module 142. The output terminal of the signal inverting module 142 is connected to the first input terminal of the second driving module 143; The second input terminal of the second drive module 143 is connected to the power supply pin of the USB connector 131, and the output terminal of the second drive module 143 is connected to the gate of the second PMOS transistor Q2.

[0025] exist Figure 2 In the full drive control circuit 100 shown, the first PMOS transistor Q1 serves as the power selection device for the external power supply branch, and the second PMOS transistor Q2 serves as the power selection device for the USB power supply branch. The drains of the two PMOS transistors are connected to the input terminal of the second voltage conversion module 120, forming a common node for unified power supply to the subsequent circuits. The source of the first PMOS transistor Q1 is connected to the output terminal of the first voltage conversion module 110, and the source of the second PMOS transistor Q2 is connected to the power pin of the USB connector 131, so that the first DC voltage processed by the first voltage conversion module 110 and the second DC voltage introduced through the USB connector 131 are respectively transmitted to the common node through the source-drain channels of the two PMOS transistors. The first driving module 141 serves as the driving and status detection unit for the main power supply branch. The first driving module 141 uses the output voltage of the first voltage conversion module 110 as its own operating power and logic input signal. The first output terminal of the first driving module 141 is connected to the gate of the first PMOS transistor Q1. When an external power supply is connected, the output terminal of the first voltage conversion module 110 establishes a stable voltage, the first driving module 141 is powered on and outputs a driving level to the gate of the first PMOS transistor Q1, controlling the first PMOS transistor Q1 to conduct and transmit the first DC voltage to the common node. At the same time, the second output terminal of the first driving module 141 outputs a logic level signal representing the external power supply connection status to the signal inversion module 142. The input terminal of the signal inverting module 142 receives the logic level signal from the second output terminal of the first driving module 141, inverts it, and outputs it to the first input terminal of the second driving module 143. The signal inverting module 142 is used to invert the logic level signal to generate a logic level signal that is opposite to the logic of the main power supply state, and transmits it to the downstream second driving module 143 to establish an interlock relationship between the gate drive signals of the two PMOS transistors, preventing the first PMOS transistor Q1 and the second PMOS transistor Q2 from being turned on simultaneously. The second driving module 143, as the driving unit of the backup power supply branch, is used to output the source and gate drive level to the second PMOS transistor Q2 according to the logic level signal generated by the signal inverting module 142 that is opposite to the logic of the main power supply state, thereby controlling the turn-on and turn-off of the second PMOS transistor Q2.

[0026] Specifically, when the external power supply is normally connected and the first DC voltage is present at the output terminal of the first voltage conversion module 110, the first drive module 141 detects the first DC voltage and outputs a conduction drive level to turn on the first PMOS transistor Q1. At the same time, it outputs a high-level logic signal through its second output terminal. The high-level logic signal is inverted by the signal inverting module 142 and converted into a low-level logic signal. The second drive module 143 receives the low-level logic signal and outputs a cut-off drive level to keep the second PMOS transistor Q2 in the off state. At this time, the external power supply outputs the first DC voltage to the second voltage conversion module 120 through the first PMOS transistor Q1 to supply power to the second voltage conversion module 120. When the external main power supply is disconnected, the first drive module 141 outputs a cutoff drive level to turn off the first PMOS transistor Q1. At the same time, the second output terminal of the first drive module 141 outputs a low-level logic signal. The low-level logic signal is inverted by the signal inverting module 142 and converted into a high-level logic signal. The second drive module 143 receives the high-level logic signal and detects that there is a second DC voltage on the power supply pin of the USB connector 131. It outputs a turn-on drive level to turn on the second PMOS transistor Q2. At this time, the communication device connected to the USB connector 131 supplies power to the second voltage conversion module 120 through the second DC voltage output by the second PMOS transistor Q2, realizing automatic switching and electrical interlocking of dual redundant power supply.

[0027] For specific implementation, please refer to Figure 2 As shown, the first driving module 141 includes: a first resistor R1, a second resistor R2, a third resistor R3, and a first NMOS transistor Q3; The first end of the first resistor R1 is connected to the output end of the first voltage conversion module 110, and the second end of the first resistor R1 is connected to ground via the second resistor R2. The first end of the third resistor R3 is connected to the first end of the first resistor R1, and the second end of the third resistor R3 is connected to the gate of the first PMOS transistor Q1 and the drain of the first NMOS transistor Q3, respectively. The gate of the first NMOS transistor Q3 is connected to the second terminal of the first resistor R1 and the input terminal of the signal inverting module 142, respectively, and the drain of the first NMOS transistor Q3 is connected to ground.

[0028] exist Figure 2In the illustrated full-drive control circuit 100, a first resistor R1 and a second resistor R2 are connected in series between the output terminal of the first voltage conversion module 110 and ground, forming a voltage divider sampling network bridging the output terminal of the first voltage conversion module 110 and ground. The second end of the first resistor R1 and the first end of the second resistor R2 form a voltage divider node, which is simultaneously connected to the gate of the first NMOS transistor Q3 and the input terminal of the signal inverting module 142. This allows the first DC voltage at the output terminal of the first voltage conversion module 110 to be divided and used as the gate drive signal of the first NMOS transistor Q3, while also being output to the signal inverting module 142 as a logic level signal characterizing the external power supply connection status. The third resistor R3 serves as a gate pull-up element for the first PMOS transistor Q1. The first terminal of the third resistor R3 is always maintained at the output potential of the first voltage conversion module 110. When the first NMOS transistor Q3 is in the off state, the third resistor R3 pulls up the gate potential of the first PMOS transistor Q1 to near the output voltage of the first voltage conversion module 110, so that the source-gate voltage difference of the first PMOS transistor Q1 approaches zero and is reliably turned off. When the first NMOS transistor Q3 is in the on state, the drain of the first NMOS transistor Q3 pulls down the gate potential of the first PMOS transistor Q1 to near the ground potential, forming a sufficient negative bias voltage between the source and gate of the first PMOS transistor Q1, driving the first PMOS transistor Q1 into the on state. The gate of the first NMOS transistor Q3 is directly controlled by the voltage divider node potential formed by the first resistor R1 and the second resistor R2. When the external power supply is connected and a stable first DC voltage is established at the output terminal of the first voltage conversion module 110, the voltage divider node potential reaches the turn-on threshold of the first NMOS transistor Q3, the first NMOS transistor Q3 is turned on and the drain potential of the first NMOS transistor Q3 is pulled low. When the external power supply is disconnected or the output terminal of the first voltage conversion module 110 is de-energized, the voltage divider node potential drops below the turn-on threshold, the first NMOS transistor Q3 is turned off and the drain potential of the first NMOS transistor Q3 is pulled up by the third resistor R3.

[0029] In this way, through the coordinated operation of the first resistor R1, the second resistor R2, the third resistor R3 and the first NMOS transistor Q3, the first driving module 141 converts the analog voltage state at the output of the first voltage conversion module 110 into a switching control signal for the gate of the first PMOS transistor Q1. At the same time, it provides a logic level signal synchronized with the external power supply switching to the signal inversion module 142, so that the power supply switching module 140 prioritizes the main power supply branch when the external power supply is normally connected, and triggers the connection of the backup power supply branch through the signal inversion module 142 when the main power supply branch loses power.

[0030] For specific implementation, please refer to Figure 2 As shown, the second drive module 143 includes: a fourth resistor R4 and a second NMOS transistor Q4; The first end of the fourth resistor R4 is connected to the power pin of the USB connector 131, and the second end of the fourth resistor R4 is connected to the gate of the second PMOS transistor Q2 and the drain of the second NMOS transistor Q4. The gate of the second NMOS transistor Q4 is connected to the output terminal of the signal inverting module 142, and the drain of the second NMOS transistor Q4 is connected to ground.

[0031] exist Figure 2 In the illustrated full-drive control circuit 100, the fourth resistor R4 serves as the gate pull-up resistor for the second PMOS transistor Q2. The first end of the fourth resistor R4 is always maintained at the power pin potential of the USB connector 131. When the second NMOS transistor Q4 is off, the fourth resistor R4 transfers the voltage from the power pin connected to the USB connector 131 to the gate of the second PMOS transistor Q2, causing the potential difference between the source and gate of the second PMOS transistor Q2 to approach zero and maintain its off state. When the second NMOS transistor Q4 is on, the drain of the second NMOS transistor Q4 pulls down the gate potential of the second PMOS transistor Q2 to near ground potential, establishing a negative bias voltage between the source and gate of the second PMOS transistor Q2, driving the second PMOS transistor Q2 into the on state. The gate of the second NMOS transistor Q4 is connected to the output of the signal inverting module 142 to receive the inverted logic level signal. When the external power supply is normally connected, the signal inverting module 142 outputs a low level, the gate potential of the second NMOS transistor Q4 is lower than the turn-on threshold and remains off, the fourth resistor R4 maintains the gate potential of the second PMOS transistor Q2 at the power pin potential of the USB connector 131, the second PMOS transistor Q2 is turned off, blocking the power transfer from the power pin of the USB connector 131 to the common node; when the external power supply is disconnected, the signal inverting module 142 outputs a high level, the gate potential of the second NMOS transistor Q4 reaches the turn-on threshold and enters the conduction state, the drain of the second NMOS transistor Q4 pulls down the gate potential of the second PMOS transistor Q2, the second PMOS transistor Q2 is turned on, and the second DC voltage introduced by the power pin of the USB connector 131 is transmitted to the common node through the second PMOS transistor Q2.

[0032] In this way, through the coordinated operation of the fourth resistor R4 and the second NMOS transistor Q4, the second drive module 143 converts the logic level output by the signal inversion module 142 into the switching control signal of the gate of the second PMOS transistor Q2, so that the on / off state of the backup power supply branch connected to the USB connector 131 and the on / off state of the main power supply branch connected to the external power supply form an interlock relationship, ensuring that the two power supply paths can be selectively connected at the same common node.

[0033] In specific implementation, the signal inversion module 142 uses an integrated inverter chip to implement the logic level inversion function. The power supply pin of the integrated inverter chip is connected to the power supply pin of the USB connector 131, using the DC voltage output by the communication device as the chip's operating power supply; the ground pin of the integrated inverter is connected to ground, providing a potential reference for the internal logic circuit of the chip; the input pin of the integrated inverter is connected to the second output terminal of the first driving module 141, receiving a logic level signal representing the external power supply connection status; the output pin of the integrated inverter is connected to the first input terminal of the second driving module 143, outputting the inverted logic level signal to the second driving module 143.

[0034] In one possible implementation, see [reference] Figure 3 As shown, the power supply switching module 140 includes: a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a first capacitor C1, and a power multiplexer chip U1. The first end of the fifth resistor R5 is connected to the output terminal of the first voltage conversion module 110, and the second end of the fifth resistor R5 is connected to ground via the sixth resistor R6. The first end of the seventh resistor R7 is connected to the power pin of the USB connector 131, and the second end of the seventh resistor R7 is connected to ground via the eighth resistor R8. The first input pin and external voltage reference pin of the power multiplexer chip U1 are connected to the output of the first voltage conversion module 110, respectively. The second input pin of the power multiplexer chip U1 is connected to the power pin of the USB connector 131. The first overvoltage protection configuration pin of the power multiplexer chip U1 is connected to the second end of the fifth resistor R5. The second overvoltage protection configuration pin of the power multiplexer chip U1 is connected to the second end of the seventh resistor R7. The priority enable pin of the power multiplexer chip U1 is connected to ground. The current limiting configuration pin of the power multiplexer chip U1 is connected to ground via the ninth resistor R9. The soft-start configuration pin of the power multiplexer chip U1 is connected to ground via the first capacitor C1. The power output pin of the power multiplexer chip U1 is connected to the input of the second voltage conversion module 120.

[0035] exist Figure 3In the illustrated full-drive control circuit 100, the fifth resistor R5 and the sixth resistor R6 are connected in series across the output terminal of the first voltage conversion module 110 and ground. The voltage divider node between the fifth resistor R5 and the sixth resistor R6 is connected to the first overvoltage protection configuration pin of the power multiplexer chip U1, providing a sampling level proportional to the first input voltage to the chip's internal protection circuit, setting the overvoltage action threshold of the main power supply branch. The seventh resistor R7 and the eighth resistor R8 are connected in series in the same manner across the power pin of the USB connector 131 and ground. The voltage divider node between the seventh resistor R7 and the eighth resistor R8 is connected to the second overvoltage protection configuration pin of the chip, setting the overvoltage action threshold of the backup power supply branch. Through two independent voltage divider networks, the power multiplexer chip U1 monitors and compares the two input voltages in real time. When either input voltage exceeds the corresponding set threshold, the internal power switch of the power multiplexer chip U1 shuts off that input to prevent abnormal voltage from being transmitted to subsequent circuits.

[0036] The first input pin of the power multiplexer chip U1 is connected to the output of the first voltage conversion module 110, receiving a first DC voltage as the first input power. The second input pin is connected to the power pin of the USB connector 131, receiving a second DC voltage as the second input power. The external voltage reference pin of the power multiplexer chip U1 is connected to the output of the first voltage conversion module 110, providing a working reference for the chip's internal voltage monitoring and logic judgment circuit. The priority enable pin of the power multiplexer chip U1 is connected to ground, giving the main power supply branch corresponding to the first input pin priority output when both inputs are valid. When the external power supply is normally connected, the power multiplexer chip U1 transmits the first input power to the power output pin. When the external power supply is disconnected or drops below a threshold, the power multiplexer chip U1 automatically transmits the second input power to the power output pin, achieving seamless connection and mutual redundancy between the two power supplies.

[0037] In addition, the ninth resistor R9 is connected between the current limit configuration pin of the power multiplexer chip U1 and ground. The resistance value of the ninth resistor R9 sets the maximum current limit value of the chip's power output pin, preventing overcurrent surges during startup or short circuits of subsequent circuits. The first capacitor C1 is connected between the chip's soft-start configuration pin and ground. The capacitance value of the first capacitor C1 sets the voltage rise slope of the power output pin during startup or switching, suppressing current spikes and voltage overshoots during switching transients. The power output pin of the power multiplexer chip U1 is connected to the input terminal of the second voltage conversion module 120, transmitting stable power, after priority arbitration, overvoltage protection, current limiting, and soft-start processing, to the second voltage conversion module 120, ensuring that the control module 150 obtains a continuous, stable, and protected DC power supply during switching between different power sources.

[0038] In one possible implementation, the first voltage conversion module includes a power interface connected to an external power source, a DC-DC step-down chip, and its peripheral circuitry. It receives the power supply voltage from the external power source through the power interface, converts the external power supply voltage into a first DC voltage, and outputs it to the power supply switching module. The first DC voltage is 5V. The second voltage conversion module includes a low-dropout linear regulator and its peripheral circuitry, used to convert the intermediate DC voltage output from the power supply switching module into the operating voltage required by the control module. The intermediate DC voltage is 5V, and the operating voltage is 3.3V.

[0039] In one possible implementation, the control module includes a microcontroller; the power supply terminal of the microcontroller is connected to the output terminal of the second voltage conversion module to receive the operating voltage output by the second voltage conversion module; the ground terminal of the microcontroller is connected to system ground; the control signal output terminal of the microcontroller is used to output drive control signals to control the drive state of the external load; the microcontroller has a communication terminal. When the microcontroller integrates USB protocol communication functionality, the USB module 130 only provides a USB connector 131, with the differential data pins of the USB connector 131 correspondingly connected to the differential data terminal of the external communication device and the USB communication terminal of the microcontroller to realize data transmission between the microcontroller and the communication device; when the microcontroller does not integrate USB protocol communication functionality, the USB module 130 also includes a USB communication chip, with the differential data pins of the USB connector 131 connected to the USB differential terminal of the USB communication chip, and the protocol conversion terminal of the USB communication chip connected to the communication terminal of the microcontroller. The USB communication chip is used to convert USB protocol data into serial communication protocol data supported by the microcontroller to realize data transmission between the microcontroller and the communication device. In one possible implementation, see [reference needed]. Figure 4 As shown, the all-drive control circuit 100 also includes: a CAN (Controller Area Network) communication module 160, a first communication interface 170, a second communication interface 171, and a terminal matching resistor module 180. The signal transmitting end of the CAN communication module 160 is connected to the CAN communication transmitting end of the control module 150, and the signal receiving end of the CAN communication module 160 is connected to the CAN communication receiving end of the control module 150. The high-level bus end of the CAN communication module 160 is connected to the high-level end of the first communication interface 170 and the high-level end of the second communication interface 171, respectively. The low-level bus end of the CAN communication module 160 is connected to the low-level end of the first communication interface 170 and the low-level end of the second communication interface 171, respectively. The first end of the terminating resistor module 180 is connected to the high-level bus terminal of the CAN communication module 160, and the second end of the terminating resistor module 180 is connected to the low-level bus terminal of the CAN communication module 160.

[0040] exist Figure 4In the illustrated all-drive control circuit 100, the CAN communication module 160 serves as a protocol conversion and signal transceiver unit between the control module 150 and the external CAN communication network. The signal transmitting end of the CAN communication module 160 is electrically connected to the CAN communication transmitting end of the control module 150, and is used to receive the data to be transmitted output by the control module 150 and convert it into a CAN physical layer signal. The signal receiving end of the CAN communication module 160 is electrically connected to the CAN communication receiving end of the control module 150, and is used to convert the physical layer signal from the external communication network into a digital logic level and transmit it to the control module 150, thereby establishing a bidirectional serial data interaction channel between the control module 150 and the external CAN communication network. The high-level bus terminal of the CAN communication module 160 is electrically connected to the high-level terminal of the first communication interface 170 and the high-level terminal of the second communication interface 171, respectively, so that the high-level signal is simultaneously distributed to both the first communication interface 170 and the second communication interface 171. The low-level bus terminal of the CAN communication module 160 is electrically connected to the low-level terminal of the first communication interface 170 and the low-level terminal of the second communication interface 171, respectively, so that the low-level signal is simultaneously distributed to both the first communication interface 170 and the second communication interface 171. Through the parallel extension of the high-level bus terminal and the low-level bus terminal to the two communication interfaces, the CAN physical layer signal output by the CAN communication module 160 can be electrically connected to the nodes of the external CAN communication network via the first communication interface 170 and the second communication interface 171. Both the first communication interface 170 and the second communication interface 171 can use the XT30 interface. The external CAN communication network is a controller area network formed by multiple node devices with CAN communication capabilities electrically connected via a CAN bus consisting of twisted-pair or shielded cables. The network employs a differential signal transmission mechanism, transmitting logic levels through the high-level and low-level wires of the CAN bus. Each CAN node device in the network performs bus arbitration and data transmission / reception according to the CAN bus access protocol. The first communication interface 170 and the second communication interface 171 serve as physical electrical transfer ports between the all-drive control circuit 100 and the external CAN communication network, used to connect the external CAN bus cable, thereby connecting the all-drive control circuit 100 to the distributed communication network formed by multiple CAN node devices connected via the CAN bus. The high-level and low-level terminals of the first communication interface 170 are respectively connected to the high-level and low-level wires of the external CAN bus, and similarly, the high-level and low-level terminals of the second communication interface 171 are also respectively connected to the high-level and low-level wires of the external CAN bus.Through the electrical connection of the first communication interface 170 or the second communication interface 171 with the external CAN bus, the high-level bus terminal and the low-level bus terminal of the CAN communication module 160 form a closed loop with the high-level wire and the low-level wire of the external CAN bus, so that the all-drive control circuit 100 is connected to the external CAN communication network as one of the CAN node devices, and performs differential serial data interaction with other external CAN node devices in the network in accordance with the CAN protocol specification.

[0041] The first terminal of the terminating resistor module 180 is electrically connected to the high-level bus terminal of the CAN communication module 160, and the second terminal is electrically connected to the low-level bus terminal of the CAN communication module 160, bridging the high-level and low-level bus terminals. The terminating resistor module 180 provides terminating impedance matching between the high-level and low-level bus terminals of the CAN communication module 160, absorbing reflected energy from signal propagation to the end of the line, suppressing signal ringing and waveform distortion caused by impedance discontinuity, stabilizing the operating potential between the high-level and low-level bus terminals, and ensuring signal integrity and electromagnetic compatibility when the CAN communication module 160 transmits data with external devices via the first communication interface 170 and the second communication interface 171.

[0042] In one possible implementation, see [reference] Figure 4 As shown, the terminal matching resistor module 180 includes: a mechanical switch K1 and a tenth resistor R10; The first terminal of mechanical switch K1 is left floating, the second terminal of mechanical switch K1 is connected to the high-level bus terminal of CAN communication module 160, and the third terminal of mechanical switch K1 is connected to the low-level bus terminal of CAN communication module 160 via the tenth resistor R10.

[0043] exist Figure 4In the illustrated full-drive control circuit 100, the resistance value of the tenth resistor R10 is configured to match the characteristic impedance of the CAN communication bus cable, and the resistance value of the tenth resistor R10 is 120Ω. The mechanical switch K1 can manually connect the second and third terminals, or connect the second and first terminals. When the full-drive control circuit 100 is deployed at the terminal node of the CAN communication network, the mechanical switch K1 switches to the state where the second and third terminals are connected. At this time, the tenth resistor R10 is connected between the high-level bus terminal and the low-level bus terminal of the CAN communication module 160, providing a terminating impedance matching the characteristic impedance of the cable between the high-level bus terminal and the low-level bus terminal of the CAN communication module 160, absorbing signal reflection energy, suppressing waveform distortion and ringing, and ensuring the integrity of the bus signal. When the all-drive control circuit 100 is deployed at the intermediate node position of the CAN communication network, the mechanical switch K1 switches to the state where the second terminal is connected to the first terminal. At this time, the electrical connection between the high-level bus terminal and the tenth resistor R10 is cut off, and the terminal matching resistor module 180 is in a high-impedance state. This avoids the intermediate node being connected in parallel with the terminal resistor, which would cause bus impedance mismatch and signal attenuation. This ensures the reliability of data transmission when the CAN communication module 160 interacts with external devices through the first communication interface 170 or the second communication interface 171.

[0044] In this way, the terminal matching resistor module 180 can be manually switched by mechanical switch K1 to adapt to both the impedance matching requirements of terminal nodes and the impedance isolation requirements of intermediate nodes in the same circuit topology. This improves the flexibility and compatibility of the full drive control circuit 100 when deployed in different network topology locations and avoids communication failures caused by improper terminal resistor configuration.

[0045] In one possible implementation, see [reference] Figure 5 As shown, the CAN communication module 160 includes: a CAN communication chip U2, a second capacitor C2, a first TVS diode D1, and a second TVS diode D2; The data input pin of the CAN communication chip U2 is connected to the CAN communication transmitter of the control module 150, the data output pin of the CAN communication chip U2 is connected to the CAN communication receiver of the control module 150, the high-level bus pin of the CAN communication chip U2 is connected to the high-level terminal of the first communication interface 170 and the high-level terminal of the second communication interface 171 respectively; the low-level bus pin of the CAN communication chip U2 is connected to the low-level terminal of the first communication interface 170 and the low-level terminal of the second communication interface 171 respectively; the power supply pin of the CAN communication chip U2 is connected to the output terminal of the second voltage conversion module 120 and the first terminal of the second capacitor C2 respectively. The second terminal of the second capacitor C2 is connected to ground; The first terminal of the first TVS diode D1 is connected to the high-level bus pin of the CAN communication chip U2, and the second terminal of the first TVS diode D1 is connected to ground. The first terminal of the second TVS diode D2 is connected to the low-level bus pin of the CAN communication chip U2, and the second terminal of the second TVS diode D2 is connected to ground.

[0046] exist Figure 5 In the illustrated all-drive control circuit 100, the data input pin of the CAN communication chip U2 is electrically connected to the CAN communication transmitter of the control module 150, receiving the serial digital signal output by the control module 150 and encoding it into a CAN physical layer differential signal. The data output pin of the CAN communication chip U2 is electrically connected to the CAN communication receiver of the control module 150, decoding the differential signal from the external communication network into a serial digital signal and transmitting it to the control module 150. The high-level bus pin of the CAN communication chip U2 is electrically connected to the high-level terminal of the first communication interface 170 and the high-level terminal of the second communication interface 171, forming a parallel distribution structure of the high-level side bus drive nodes. The low-level bus pin is electrically connected to the low-level terminal of the first communication interface 170 and the low-level terminal of the second communication interface 171, forming a parallel distribution structure of the low-level side bus drive nodes. The CAN physical layer differential signal output by the CAN communication chip U2 can establish an electrical connection with external communication network nodes via the parallel extension of the high-level bus pin and the low-level bus pin to the first communication interface 170 and the second communication interface 171, respectively. The power supply pin of the CAN communication chip U2 is electrically connected to the output of the second voltage conversion module 120, receiving the operating voltage converted by the second voltage conversion module 120 to provide bias power for the internal transceiver logic and bus drive circuit. The first end of the second capacitor C2 is connected to the same power supply node as the power supply pin of the CAN communication chip U2 and the output of the second voltage conversion module 120. The second end of the second capacitor C2 is connected to ground. The second capacitor C2 is connected in parallel between the power supply pin of the CAN communication chip U2 and ground, forming a local power decoupling network for the chip. This network absorbs transient current fluctuations at the power supply pin, filters out high-frequency ripple components in the output voltage of the second voltage conversion module 120, stabilizes the power supply potential of the CAN communication chip U2, and reduces the risk of signal jitter and bit errors caused by power supply noise.

[0047] The first terminal of the first TVS diode D1 is electrically connected to the high-level bus pin of the CAN communication chip U2, and the second terminal is connected to ground, bridging the high-level bus pin and ground. The first terminal of the second TVS diode D2 is electrically connected to the low-level bus pin of the CAN communication chip U2, and the second terminal is connected to ground, bridging the low-level bus pin and ground. These two TVS diodes act as transient overvoltage suppression devices on the high-level and low-level bus pin sides, respectively. When an external communication network induces a transient overvoltage exceeding the safe threshold on the high-level or low-level bus pin due to electromagnetic interference, electrostatic discharge, or power supply crosstalk, the corresponding TVS diode quickly switches from a high-resistance state to a low-resistance conducting state, bypassing the transient overvoltage energy to ground. This clamps the potential of the high-level or low-level bus pin within the safe range that the CAN communication chip U2 can withstand, preventing the overvoltage transient from entering the chip through the bus pin and causing port damage or logic failure.

[0048] In practical applications, the control module 150 interacts bidirectionally with the CAN communication chip U2 via the CAN communication transmitter and receiver. The CAN communication chip U2 transmits differential signals to the external CAN communication network via the high-level bus pin and the low-level bus pin through the first communication interface 170 or the second communication interface 171. The second capacitor C2 maintains the stability of the chip's power supply. The first TVS diode D1 and the second TVS diode D2 suppress transient overvoltages on the high-level side and the low-level side, respectively. All devices work together to enable the CAN communication module 160 to have dual-interface communication capabilities, as well as power supply noise suppression and bus overvoltage protection capabilities, thereby improving the communication reliability and interface security of the all-drive control circuit 100 in complex electromagnetic environments.

[0049] In one possible implementation, see [reference] Figure 6 As shown, the all-drive control circuit 100 also includes: a serial servo communication module 190 and a serial servo interface 191; The signal transmitting end of the serial servo communication module 190 is connected to the servo communication transmitting end of the control module 150, the signal receiving end of the serial servo communication module 190 is connected to the servo communication receiving end of the control module 150, and the communication end of the serial servo communication module 190 is connected to the serial servo interface 191.

[0050] exist Figure 6In the illustrated all-drive control circuit 100, the signal transmitting end of the serial servo communication module 190 is electrically connected to the servo communication transmitting end of the control module 150. It receives servo control command data output by the control module 150 and converts this digital signal into a physical layer signal conforming to the servo serial communication protocol specification. The signal receiving end of the serial servo communication module 190 is electrically connected to the servo communication receiving end of the control module 150. It captures serial feedback signals from external servo devices and decodes them into digital logic levels, transmitting servo status information to the control module 150. The communication end of the serial servo communication module 190 is electrically connected to the serial servo interface 191, transmitting the protocol-converted servo control signals to the serial servo interface 191 and simultaneously receiving feedback signals from external servo devices through this interface. The serial servo interface 191 serves as a physical electrical connection port between the all-drive control circuit 100 and external servo devices, connecting the communication lines of the external servo devices, thereby connecting the all-drive control circuit 100 to the serial control network composed of the control module 150 and the external servo devices. The external servo device is a servo actuator that receives serial bus signals or pulse width modulation signals and performs angle and position control. After its communication line is electrically connected to the serial servo interface 191, the communication end of the serial servo communication module 190 and the signal input and output end of the external servo device form a closed loop.

[0051] In a specific implementation, the serial servo communication module includes a two-wire to one-wire module for converting the two-wire serial port signal of the control module into a one-wire half-duplex serial port signal. The two-wire to one-wire module is connected to a serial servo interface, which is used to connect to an external serial servo device.

[0052] The two-wire to single-wire module includes: a transmit buffer, a receive buffer, a transmit / receive enable circuit, and a bus pull-up resistor. The input of the transmit buffer is connected to the transmit terminal of the universal asynchronous transceiver (UART) of the control module to receive the transmit signal STS_TX, and the output of the transmit buffer serves as the bus signal input / output port STS_DATA. The input of the receive buffer is connected to the bus signal input / output port STS_DATA, and the output of the receive buffer is connected to the UART of the control module to output the receive signal STS_RX. One end of the bus pull-up resistor is connected to the bus signal input / output port STS_DATA, and the other end is connected to the power supply to keep the single bus at a high level when idle. The input of the transmit / receive enable circuit is connected to the transmit signal STS_TX, and the output of the transmit / receive enable circuit outputs a transmit / receive enable signal STS_TXEN. The transmit / receive enable signal STS_TXEN is connected to the enable terminals of the transmit buffer and the receive buffer respectively, used to control the conduction state of the transmit buffer and the receive buffer. The transmit buffer is a tri-state buffer enabled by a high level, and the receive buffer is a tri-state buffer enabled by a low level.

[0053] In practical applications, when the control module does not send data or the transmit signal STS_TX is high, the transmit / receive enable signal STS_TXEN is low, the transmit buffer is closed, the receive buffer is open, and the bus signal input / output port STS_DATA is kept high through a bus pull-up resistor, or it receives data returned from an external serial servo device and transmits it to the receive signal STS_RX via the receive buffer. When the control module sends low-level data, the transmit signal STS_TX is low, the transmit / receive enable circuit outputs a high-level transmit / receive enable signal STS_TXEN, the transmit buffer is open, the receive buffer is closed, and the transmit signal STS_TX is transmitted to the bus signal input / output port STS_DATA via the transmit buffer, pulling the bus signal input / output port STS_DATA low. Thus, the transmit and receive ends of the control module are connected to the same single bus through the two-wire to single-wire module, realizing single-wire half-duplex serial communication and avoiding self-transmission and self-reception at the receiver during transmission.

[0054] The serial servo interface includes a single-bus signal pin, a power supply pin, and a ground pin. The single-bus signal pin is connected to the input / output port STS_DATA of the bus signal. The power supply pin is connected to the input terminal of the second voltage conversion module to provide operating voltage to the external serial servo device. The ground pin is connected to system ground. The external serial servo device is an angle position servo actuator that supports a single-bus half-duplex serial communication protocol.

[0055] Based on the same concept, this utility model embodiment also provides an all-wheel drive control device, which includes at least: a circuit board and the above-mentioned all-wheel drive control circuit; the all-wheel drive control circuit is integrated on the circuit board.

[0056] Although preferred embodiments of the present invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of the present invention.

[0057] Obviously, those skilled in the art can make various modifications and variations to the embodiments of this utility model without departing from the spirit and scope of the embodiments of this utility model. Therefore, if these modifications and variations to the embodiments of this utility model fall within the scope of the claims of this utility model and their equivalents, then this utility model also intends to include these modifications and variations.

Claims

1. A total drive control circuit, characterized in that, include: The system comprises a first voltage conversion module, a second voltage conversion module, a USB module, a power supply switching module, and a control module. The input terminal of the first voltage conversion module is used to connect to an external power source, and the output terminal of the first voltage conversion module is connected to the first input terminal of the power supply switching module. The USB module includes a USB connector for connecting to an external communication device. The power pin of the USB connector is connected to the second input terminal of the power supply switching module, and the differential data pin of the USB connector is connected to the USB communication terminal of the control module. The input terminal of the second voltage conversion module is connected to the output terminal of the power supply switching module, and the output terminal of the second voltage conversion module is connected to the power supply terminal of the control module.

2. The all-drive control circuit according to claim 1, characterized in that, The power supply switching module includes: a first PMOS transistor, a second PMOS transistor, a first driving module, a signal inversion module, and a second driving module; The source of the first PMOS transistor is connected to the output terminal of the first voltage conversion module, and the drain of the first PMOS transistor is connected to the drain of the second PMOS transistor and the input terminal of the second voltage conversion module, respectively. The source of the second PMOS transistor is connected to the power pin of the USB connector, and the drain of the second PMOS transistor is connected to the input terminal of the second voltage conversion module. The input terminal of the first driving module is connected to the output terminal of the first voltage conversion module, the first output terminal of the first driving module is connected to the gate of the first PMOS transistor, and the second output terminal of the first driving module is connected to the input terminal of the signal inversion module. The output terminal of the signal inversion module is connected to the first input terminal of the second drive module; The second input terminal of the second driving module is connected to the power pin of the USB connector, and the output terminal of the second driving module is connected to the gate of the second PMOS transistor.

3. The all-drive control circuit according to claim 2, characterized in that, The first driving module includes: a first resistor, a second resistor, a third resistor, and a first NMOS transistor; The first end of the first resistor is connected to the output end of the first voltage conversion module, and the second end of the first resistor is connected to ground via the second resistor; The first end of the third resistor is connected to the first end of the first resistor, and the second end of the third resistor is connected to the gate of the first PMOS transistor and the drain of the first NMOS transistor, respectively. The gate of the first NMOS transistor is connected to the second terminal of the first resistor and the input terminal of the signal inverting module, respectively, and the drain of the first NMOS transistor is connected to ground.

4. The all-drive control circuit according to claim 2, characterized in that, The second driving module includes: a fourth resistor and a second NMOS transistor; The first end of the fourth resistor is connected to the power pin of the USB connector, and the second end of the fourth resistor is connected to the gate of the second PMOS transistor and the drain of the second NMOS transistor, respectively. The gate of the second NMOS transistor is connected to the output terminal of the signal inverting module, and the drain of the second NMOS transistor is connected to ground.

5. The all-drive control circuit according to claim 1, characterized in that, The power supply switching module includes: a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a first capacitor, and a power multiplexer chip; The first end of the fifth resistor is connected to the output end of the first voltage conversion module, and the second end of the fifth resistor is connected to ground via the sixth resistor; The first end of the seventh resistor is connected to the power pin of the USB connector, and the second end of the seventh resistor is connected to ground via the eighth resistor; The first input pin and external voltage reference pin of the power multiplexer chip are respectively connected to the output terminal of the first voltage conversion module. The second input pin of the power multiplexer chip is connected to the power pin of the USB connector. The first overvoltage protection configuration pin of the power multiplexer chip is connected to the second end of the fifth resistor. The second overvoltage protection configuration pin of the power multiplexer chip is connected to the second end of the seventh resistor. The priority enable pin of the power multiplexer chip is connected to ground. The current limiting configuration pin of the power multiplexer chip is connected to ground through the ninth resistor. The soft-start configuration pin of the power multiplexer chip is connected to ground through the first capacitor. The power output pin of the power multiplexer chip is connected to the input terminal of the second voltage conversion module.

6. The all-drive control circuit according to any one of claims 1-5, characterized in that, Also includes: CAN communication module, first communication interface, second communication interface, and terminal matching resistor module; The signal transmitting end of the CAN communication module is connected to the CAN communication transmitting end of the control module, and the signal receiving end of the CAN communication module is connected to the CAN communication receiving end of the control module. The high-level bus end of the CAN communication module is connected to the high-level end of the first communication interface and the high-level end of the second communication interface, respectively. The low-level bus end of the CAN communication module is connected to the low-level end of the first communication interface and the low-level end of the second communication interface, respectively. The first end of the terminal matching resistor module is connected to the high-level bus terminal of the CAN communication module, and the second end of the terminal matching resistor module is connected to the low-level bus terminal of the CAN communication module.

7. The all-drive control circuit according to claim 6, characterized in that, The terminal matching resistor module includes: a mechanical switch and a tenth resistor; The first end of the mechanical switch is left floating, the second end of the mechanical switch is connected to the high-level bus terminal of the CAN communication module, and the third end of the mechanical switch is connected to the low-level bus terminal of the CAN communication module via the tenth resistor.

8. The all-drive control circuit according to claim 6, characterized in that, The CAN communication module includes: a CAN communication chip, a second capacitor, a first TVS diode, and a second TVS diode. The data input pin of the CAN communication chip is connected to the CAN communication transmitter of the control module, and the data output pin of the CAN communication chip is connected to the CAN communication receiver of the control module. The high-level bus pin of the CAN communication chip is connected to the high-level terminals of the first communication interface and the second communication interface, respectively. The low-level bus pin of the CAN communication chip is connected to the low-level terminals of the first communication interface and the second communication interface, respectively. The power supply pin of the CAN communication chip is connected to the output terminal of the second voltage conversion module and the first terminal of the second capacitor, respectively. The second terminal of the second capacitor is connected to ground; The first terminal of the first TVS diode is connected to the high-level bus pin of the CAN communication chip, and the second terminal of the first TVS diode is connected to ground. The first end of the second TVS diode is connected to the low-level bus pin of the CAN communication chip, and the second end of the second TVS diode is connected to ground.

9. The all-drive control circuit according to claim 6, characterized in that, Also includes: Serial servo communication module and serial servo interface; The signal transmitting end of the serial servo communication module is connected to the servo communication transmitting end of the control module, the signal receiving end of the serial servo communication module is connected to the servo communication receiving end of the control module, and the communication end of the serial servo communication module is connected to the serial servo interface.

10. A total drive control device, characterized in that, include: The circuit board and the all-drive control circuit as described in any one of claims 1-9; The all-drive control circuit is integrated on the circuit board.

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