Level signal output circuit, related sensor, and switching valve
By using a series-connected transistor switch to form an inverter, the problem of inconsistent levels caused by the transistor type is solved, and a universal level signal output is achieved without the need for additional conversion circuits, adapting to different load types and improving load performance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- BOSCH REXROTH (CHANGZHOU) CO LTD
- Filing Date
- 2025-08-22
- Publication Date
- 2026-07-21
AI Technical Summary
In the prior art, different transistor types result in inconsistent collector levels when the transistor is turned on, requiring a matching transistor type or additional level conversion circuit to adapt to different types of subsequent controllers or level interfaces.
The inverter is formed by connecting the first and second transistor switches in series. The control electrode receives the sensor signal and turns on and off in opposite phases to realize the level signal output. The transistor switch can be a MOSFET, which is suitable for high-end or low-end driving.
It can adapt to various types of subsequent controllers or level interfaces without the need for additional level conversion circuitry, thus expanding its applicability, simplifying circuit connections, and improving load performance.
Smart Images
Figure CN224538184U_ABST
Abstract
Description
Technical Field
[0001] This application generally relates to a level signal output circuit. Furthermore, this application also relates to a sensor integrating a related level signal output circuit and a switching valve including a related level signal output circuit. Background Technology
[0002] In the field of sensors, especially in the field of position sensors for valve cores such as switching valves, it is often necessary to acquire the output signal or sensing signal of the sensor for subsequent processing and / or operation.
[0003] In some cases, to enable such subsequent processing or operation, it is necessary to convert the sensor's sensing signal into a level signal that can be used or recognized by a subsequent controller.
[0004] In the prior art, transistors are known to be used to achieve this conversion. As an example, the emitter of the transistor is connected to either a power supply or ground. The level at the base of the transistor is manipulated accordingly based on the sensor's sensing signal or output signal, thereby turning the transistor on or off, enabling the output of different voltage levels. Simply put, for a PNP transistor, optionally, a high voltage level is output at the collector when the transistor is on, and the collector is either floating or at a low potential when the transistor is off.
[0005] However, since transistors come in PNP and NPN types, the collector voltage level differs for these two types when they are turned on. A PNP transistor outputs a high level when turned on, while an NPN transistor outputs a low level. Therefore, for a specific subsequent controller or level interface, a matching transistor type or level output type is required. For controllers with a high-level detection interface, the low-level signal output by an NPN transistor needs to be converted to a high-level signal by a conversion circuit before it can be used or identified.
[0006] Therefore, there is a need for a level signal output circuit that can work with various types of subsequent controllers or level interfaces to transmit outputs or sensing signals from sensors to subsequent components for use, such as for processing, operation, or identification, without the need for additional level conversion circuitry. Utility Model Content
[0007] According to one aspect of this utility model, this application relates to a level signal output circuit for a valve, including a transistor switch circuit section. The transistor switch circuit section includes a first transistor switch and a second transistor switch connected in series. The first transistor switch includes a high-voltage electrode, a low-voltage electrode, and a control electrode. The high-voltage electrode of the first transistor switch is configured to be connected to a power supply voltage. The second transistor switch includes a high-voltage electrode, a low-voltage electrode, and a control electrode. The low-voltage electrode of the second transistor switch is configured to be connected to a low potential. The low-voltage electrode of the first transistor switch and the high-voltage electrode of the second transistor switch are connected to each other. The first transistor switch and the second transistor switch are symmetrically constructed and form an inverter. The level signal output terminal is located between the first transistor switch and the second transistor switch. The corresponding control electrodes that control the conduction and cutoff of the first transistor switch and the second transistor switch are configured to receive a voltage signal corresponding to the sensing or output signal of a sensor. The first transistor switch and the second transistor switch are turned on and off in opposite phases based on the voltage signal.
[0008] Optionally, the transistor switch is selected as a MOSFET, and the first transistor switch and the second transistor switch are selected as PMOSFET and NMOSFET, respectively.
[0009] Optionally, the level signal output circuit is configured as a high-side drive level signal output circuit, wherein the first load is configured to be located between the level signal output terminal and the low potential and connected in series with the first transistor switch and in parallel with the second transistor switch.
[0010] Optionally, the level signal output circuit is configured as a low-side driven level signal output circuit, wherein the first load is configured to be located between the level signal output terminal and the power supply voltage, in parallel with the first transistor switch and in series with the second transistor switch.
[0011] Optionally, the level signal output circuit includes two or more transistor switch circuit sections that are arranged in parallel with the transistor switch circuit section and are structurally identical. The level signal output terminal corresponding to any one of the two or more transistor switch circuit sections is respectively positioned between two transistor switches connected in series. The corresponding control electrode that controls the conduction and cutoff of two transistor switches in any one of the two or more transistor switch circuit sections is configured to receive a voltage signal corresponding to the sensing or output signal of the corresponding sensor and control the conduction and cutoff of the two transistor switches with opposite phases based on the voltage signal.
[0012] Optionally, the sensor is selected as a position sensor.
[0013] Optionally, a level signal output circuit is configured for switching valves.
[0014] Alternatively, the level signal output circuit may be integrated into the sensor or constructed as a separate component.
[0015] According to another aspect of this application, this application also relates to a position detection sensor for monitoring the position of the valve core of a switching valve, wherein the position detection sensor is configured to integrate a level signal output circuit as described above to be able to output a level signal.
[0016] According to another aspect of this application, this application also relates to a switching valve, which includes a sensor for monitoring the position of the valve core of the switching valve; and a level signal output circuit as described above, capable of converting the sensor's sensing signal into a level signal.
[0017] By using the level signal output circuit based on this invention, the output or sensing signal of a sensor can be universally transmitted to subsequent components for use without the need for additional level conversion circuitry, thereby simplifying the circuit connection between components. Attached Figure Description
[0018] Figure 1 A schematic diagram of a level signal output circuit using a PNP transistor according to the prior art is shown;
[0019] Figure 2 A schematic diagram of a level signal output circuit according to an embodiment of this application is shown;
[0020] Figure 3 A schematic diagram of a level signal output circuit according to an embodiment of this application in a first usage state is shown; and
[0021] Figure 4 A schematic diagram of a level signal output circuit according to an embodiment of this application in a second usage state is shown. Detailed Implementation
[0022] The specific embodiments of this application will be described below with reference to the accompanying drawings. In the embodiments of this application, although schematic diagrams of the level signal output circuit of this application are shown in a certain orientation, those skilled in the art should understand that these orientations are merely exemplary and not limiting. Those skilled in the art can appropriately determine the position and orientation of each component according to the actual needs of the circuit without departing from the scope of this application. Furthermore, although various components of the level signal output circuit are shown in the embodiments of this application, those skilled in the art should understand that this is merely exemplary. The schematic diagrams of the circuits in the embodiments of this application only show the most basic components and connection lines required to achieve the technical objectives of this application. Various additional functional components can be added based on the technical solution of this application without departing from the scope of this application, such as various circuit protection components, charging and discharging components, additional circuit interfaces, etc.
[0023] Figure 1 A schematic diagram of a level signal output circuit 10 using a PNP transistor 100 according to the prior art is shown. This prior art can be referred to in the relevant description of the background art, and is only briefly described here. In this prior art, the collector C of the PNP transistor 100 is connected to ground or a ground wire, while the emitter E is connected to a power supply voltage, such as +Ub. As shown in the figure, the ground can be, for example, the negative power supply terminal or any suitable equivalent ground terminal GND, for example, represented by PIN3, while the power supply voltage is, for example, connected to the power supply voltage terminal +Ub, for example, represented by PIN1. Further and optionally, the base B of the PNP transistor is directly or indirectly connected to the sensing or output terminal of a sensor, enabling the base to receive additional signals (such as voltage signals) corresponding to the sensing or output signal of the sensor. Based on this, in Figure 1 In this embodiment, when the level signal received at the base is greater than a threshold value, the PNP transistor 100 is not turned on (i.e., cut off), and the output level or voltage of the collector side of the transistor via one of the level signal output terminals PIN2 or PIN4 is a floating level, such as a low level or low voltage. Conversely, when the level signal received at the base is less than or equal to the threshold value, the PNP transistor 100 is turned on, and the output level or voltage of the collector side of the transistor via one of the level signal output terminals PIN2 or PIN4 is such as a high level or high voltage. Therefore, the collector can also be described as being connected to the level signal output terminal. Of course, it should be understood that, in the context of this application, the electrical signal output circuit is configured to convert sensing signals, such as those from sensors, into level signals, thereby achieving digitization.
[0024] Optionally, an additional load can be provided between the collector C of the PNP transistor 100 and the ground terminal. This load can be, for example, a specific PLC (Programmable Logic Controller) common in the art, a direct load such as a coil, or a simple protective load 102. In this case, when the PNP transistor is off, the load is obviously in a low-current or even no-current state (in the case of a PLC, its terminals are not input voltage via the transistor; in the case of a direct load, the direct load is not activated (e.g., no current flows through the load). Conversely, when the PNP transistor 100 is on, the load is obviously in a high-level state (in the case of a PLC, its terminals are input voltage via the transistor; in the case of a direct load, the direct load is activated). Furthermore, considering the common-emitter configuration of the transistor, the voltage on the load cannot be reduced to the same voltage as the ground terminal, especially a voltage such as the negative terminal of the power supply, whether the transistor is on or off.
[0025] Obviously, for a given load, especially a PLC, the location and configuration of its interface to the aforementioned type of level signal output circuit are usually fixed. However, the load position within the load may differ depending on the type of load, especially for different types of PLCs. Some PLCs only support high-level signals from high-side drives (PNP transistors), such as German-style PLCs; while others only support low-level signals from low-side drives (NPN transistors). Therefore, a given conventional level signal output circuit will either output a high-level signal or a low-level signal, making it unsuitable for various types of loads; even if it could be adapted, it would require specific additional level signal conversion circuitry.
[0026] Figure 2 A schematic diagram of a level signal output circuit 20 according to an embodiment of this application is shown. Based on the above, a level signal output circuit of this application is proposed. Figure 2 In the embodiments shown, although only metal-oxide-semiconductor field-effect transistors (MOSFETs) are illustrated as transistor switches, those skilled in the art will understand that some or all of these MOSFETs can be replaced with other types of transistor switches without departing from the scope of this application. For ease of control and consistency, the same type of transistor switch is typically used uniformly in a single-level signal indication circuit. As those skilled in the art will understand, a transistor switch typically includes a high-voltage terminal for connection to the high-voltage side and a low-voltage terminal for connection to the low-voltage side to allow current to flow through the transistor switch when it is turned on, thereby turning on the entire circuit. Based on this, in Figure 2In one embodiment, the level signal output circuit includes a first transistor switch circuit section 202. The first transistor switch circuit section 202 includes a first transistor switch 2020 and a second transistor switch 2021 connected in series, wherein the high-voltage terminal 2022 of the first transistor switch 2020 is configured to be electrically connected to a power supply voltage, for example, as shown in the figure. Figure 1 The diagram shows +Ub, and correspondingly, the low-voltage terminal 2023 of the second transistor switch 2021 is electrically connected to ground (e.g., the negative terminal of the power supply) or a low potential, such as... Figure 1 The diagram shows GND. Clearly, the low-voltage terminal 2024 of the first transistor switch 2020 and the high-voltage terminal 2025 of the second transistor switch are connected to each other, i.e., connected in series. The level signal output terminal 2026 of the first transistor switch circuit section 202 is positioned between the first and second transistor switches to output different level signals based on the switching states of the first and second transistor switches. The control terminals for controlling the on and off states of the first and second transistor switches are configured to control the first and second transistor switches in opposite phase to the voltage signal corresponding to the sensing or output signal received from the first sensor (not shown). In other words, the corresponding control terminals for controlling the on and off states of the first transistor switch 2020 and the second transistor switch 2021 are configured to receive the voltage signal corresponding to the sensing or output signal received by the sensor, and the first and second transistor switches are turned on and off in opposite phases based on this voltage signal. In the field of transistor switches, as those skilled in the art will understand, "opposite phase" means that if the voltage signal turns on the first transistor switch 2020, then the voltage signal correspondingly turns off the second transistor switch 2021; or vice versa. Therefore, the voltage signal always turns on only one of the first and second transistor switches while the other is conversely turned off.
[0027] A more detailed description will follow here. Figure 2 The structure of the transistor switch is described to enable those skilled in the art to more clearly understand the connection of the transistor switch in this application. Figure 2In one embodiment, the first transistor switch 2020 includes a high-voltage electrode 2022, a low-voltage electrode 2024, and a control electrode 2027, wherein the high-voltage electrode of the first transistor switch 2020 is configured to be connected to a power supply voltage. Similarly, the second transistor switch also includes a high-voltage electrode 2028, a low-voltage electrode 2023, and a control electrode 2029, and the low-voltage electrode of the second transistor switch is configured to be connected to a low potential. The first and second transistor switches are connected in series, for example, meaning the low-voltage electrode of the first transistor switch and the high-voltage electrode of the second transistor switch are connected to each other, especially directly. Considering that the first and second transistor switches need to be turned on and off in opposite phases, the first and second transistor switches are generally symmetrical in construction and thus constitute an inverter.
[0028] like Figure 2 Specifically, when the transistor switch is a MOSFET, the level signal output circuit includes a first metal-oxide-semiconductor field-effect transistor (MOSFET) circuit section. This first MOSFET circuit section includes a first PMOSFET (a P-type MOSFET, the structure of which is well known to those skilled in the art and will not be described further) and a first NMOSFET (an N-type MOSFET, the structure of which is well known to those skilled in the art and will not be described further). The drain of the first PMOSFET is configured to be connected to a power supply voltage, for example, as shown below. Figure 1 The diagram shows +Ub; correspondingly, the source of the first NMOSFET is configured to be connected to ground (e.g., the negative terminal of the power supply) or a low potential, such as... Figure 1 The diagram shows GND. Clearly, the source of the first PMOSFET and the drain of the first NMOSFET are connected in series. The level signal output terminal of this first MOSFET circuit is located between the first PMOSFET and the first NMOSFET, i.e., in the wiring region between the first PMOSFET and the first NMOSFET. At this time, as mentioned earlier, the gates of both the first PMOSFET and the first NMOSFET are configured to receive a first voltage signal corresponding to the sensing or output signal of the first sensor. Optionally, the gates of both the first PMOSFET and the first NMOSFET are configured to be directly electrically connected to the output terminal of the first sensor.
[0029] Optionally, the first transistor switch may also be selected as a PNP transistor and the second transistor switch as an NPN transistor without departing from the scope of this application. Those skilled in the art can appropriately select additional combinations of transistor switches in the transistor switch circuit based on the opposite phase control of the first and second transistor switches, all without departing from the scope of this application.
[0030] As an example and without limitation, in Figure 2 In some embodiments, the level signal output circuit 20 may further include a second transistor switch circuit section 204 connected in parallel with the first transistor switch circuit section. This second transistor switch circuit section is structurally substantially the same as the first transistor switch and therefore includes a third transistor switch and a fourth transistor switch connected in series with each other. The third and fourth transistor switches are configured similarly to the first and second transistor switches, respectively, and will not be described further here. It is conceivable that the level output circuit may additionally include more transistor switch circuit sections connected in parallel with the same or similar first or second transistor switch circuit sections to output level signals in response to voltage signals associated with more additional sensors; embodiments of these additional transistor switch circuit sections are obviously also included within the scope of this application.
[0031] Figure 3 A schematic diagram of the level signal output circuit 20 according to an embodiment of this application in a first usage state is shown in more detail. Figure 3 In one embodiment, the level signal output circuit 20 is explicitly shown to further include a first level signal output terminal PIN2 configured to output a first level signal or connected to a first level signal output terminal, a power supply voltage terminal PIN3 configured to be electrically connected to a voltage power supply terminal, and a ground terminal PIN1 configured to be electrically connected to ground. Optionally, the ground terminal may also be represented as a low-potential terminal. These terminals can be integrated into a terminal assembly such as a plug to enable electrical connection to other devices, such as a main control console.
[0032] As an example and without limitation, in Figure 3 In one embodiment, the level signal output circuit further includes a second MOSFET circuit section connected in parallel with the first MOSFET circuit section. This second MOSFET circuit section is structurally substantially identical to the first MOSFET and therefore includes a second PMOSFET and a second NMOSFET connected in series with each other. The drain of the second PMOSFET is electrically connected to a power supply voltage, for example, +Ub, and correspondingly, the source of the second NMOSFET is electrically connected to ground (e.g., the negative power supply terminal) or a low potential, for example, GND. Clearly, the source of the second PMOSFET and the drain of the second NMOSFET are connected to each other. The level signal output of this second MOSFET circuit section is positioned between the second PMOSFET and the second NMOSFET. The gates of both the second PMOSFET and the second NMOSFET are electrically connected to receive a second level or voltage signal corresponding to the sensing or output signal of the second sensor. Therefore, in Figure 3In the embodiments described, a second level signal output terminal PIN4 configured to output a first level signal or connected to the first level signal output terminal is also explicitly shown. It is conceivable that the level output circuit may additionally include a greater number of MOSFET circuit portions that are identical or similar to the first or second MOSFET circuit portions connected in parallel for outputting level signals in response to voltage signals associated with additional sensors; embodiments of these additional MOSFET circuit portions are obviously also included within the scope of this application.
[0033] exist Figure 3 In its first usage state, the level signal output circuit 20 is configured as a high-side drive level signal output circuit. The terms "high-side drive" and "low-side drive" as described below have the meaning conventionally understood by those skilled in the art, that is, structurally, corresponding to the position of the transistor switch relative to the load: if the transistor switch is closer to the power supply voltage or high-voltage side relative to the load, it is called a high-side drive; and vice versa. The load 206 is configured to be connected between the first level signal output terminal and the low potential, in series with the first PMOSFET and in parallel with the first NMOSFET, such that the aforementioned first MOSFET circuit portion is used as a high-side drive, and is therefore also called a high-side drive level signal output circuit. The relevant definitions of this load are... Figure 1 The description in the prior art is the same; for example, it could be a specific PLC (Programmable Logic Controller) common in the art or a direct load such as a coil. Of course, for multiple transistor switching circuit sections, each can be similarly connected and configured with its corresponding load. In this case, the second terminal PIN2 can output a high-level signal. A similar situation is also applied to other MOSFET circuit sections, such as additional second MOSFET circuit sections. Obviously, for... Figure 2 Each MOSFET circuit section in the circuit is turned on when the gate of the corresponding PMOSFET receives a voltage signal from the corresponding sensor, while the NMOSFET is turned off. As those skilled in the art will understand, the voltage signal from the corresponding sensor is less than the supply voltage +Ub, which corresponds to the turn-on condition of the PMOSFET and the turn-off condition of the NMOSFET. Based on this, the level signal output circuit can display the desired high-level signal.
[0034] Accordingly, by simply changing the connection position of the load, the above-mentioned level signal output circuit suitable for high-end drives can be modified into a level signal output circuit suitable for low-end drives, thus making it applicable to different types of loads, especially PLCs. Figure 4A schematic diagram of a level signal output circuit according to an embodiment of this application in a second usage state is shown. The difference between the first and second usage states lies only in the connection position of the load; no modification is required to the overall construction of the level signal output circuit. Specifically, in Figure 4 In the second usage state, load 206 is configured to connect between the first level signal output terminal and the power supply voltage, such that the aforementioned first MOSFET circuit section is used as a low-side drive, and is therefore also called a low-side drive level signal output circuit. Specifically, the second terminal PIN2 can output a low-level signal. A similar situation is also applied to other MOSFET circuit sections, such as the second MOSFET circuit section. Obviously, for Figure 2 Each MOSFET circuit section in the circuit is turned on when the gate of the corresponding NMOSFET receives a voltage signal from the corresponding sensor, while the PMOSFET is turned off. As those skilled in the art will understand, the voltage signal from the corresponding sensor at this time is close to the supply voltage +Ub, which corresponds to the PMOSFET's turn-off condition and the NMOSFET's turn-on condition. Based on this, the level signal output circuit is able to display the desired low-level signal.
[0035] It is important to note that, regarding Figure 3 and 4 The MOSFETs (including PMOSFETs and NMOSFTs) in the described embodiments are capable of being based on Figure 2 The description may be replaced with another type of transistor switch without departing from the scope of this application.
[0036] Based on the above, it can be determined that the level signal output circuit based on this application can adapt to and match different level signal output forms and can be used with different types of loads. Only the voltage signal corresponding to the sensor needs to be adjusted, without any additional conversion circuit, which significantly expands the scope of application.
[0037] Furthermore, with the aforementioned level signal output circuit of this application, when the transistor switch is a MOSFET, the load voltage can not only be boosted to a level roughly equivalent to or even the same as the power supply voltage, but the load ground voltage can also be reduced to ground or a level comparable to a low potential. This is because of the four-terminal structure of the MOSFET, the gate voltage can be supplied by two terminals independently without the need for common-collector or common-emitter connections like those of a transistor, allowing the load to be completely removed from the low-level power supply situation when the MOSFET is not turned on. This helps maintain the performance of the load, such as heat dissipation.
[0038] Furthermore, the application of the aforementioned level signal output circuit in the detection of the valve spool position of a switching valve will be described here. For example, consider using a circuit such as... Figure 2 The high-side drive is shown in the first usage state. It is conceivable that two position detection sensors are provided in this switching valve, capable of detecting the open and closed positions of the valve spool respectively, and therefore requiring first and second MOSFET circuit sections connected in parallel. When either of the position detection sensors detects the valve spool, for example, a Hall effect position sensor, the detection signal from the corresponding sensor causes the voltage between the gate and source of the MOSFET to exceed a threshold, turning on the PMOSFET. This allows a corresponding high-level signal to be output from the corresponding level signal output terminal, and, on the other hand, to drive the load associated with the corresponding MOSFET circuit section.
[0039] It is important to understand that for PLCs such as those with low-end drives, the following can be adopted: Figure 3 The load is configured using the settings. This is obviously easy to implement for those skilled in the art; it only requires adjusting the strength of the voltage signal input to the gate relative to the valve spool position detection by the position sensor. Figure 2 The settings in the middle can be reversed, which is easy to consider and will not be elaborated further here.
[0040] Furthermore, the level signal output circuit according to this application can be optionally integrated into the corresponding sensor, PLC, or even control console (e.g., the corresponding interface area), and even the component to which the sensor is applied (e.g., a switching valve). Of course, this level signal output circuit can also be constructed (or packaged) as a separate component and can be connected in a suitable manner to appropriate locations, such as sensors, various loads such as PLCs, and interface areas of various related control consoles.
[0041] It should be understood that features described in one or more embodiments of this application may be applied to other embodiments where such features are not described without departing from the scope of this application, unless it is expressly stated that it is impossible or technically impossible to implement. Of course, structures with similar functionality in each embodiment may be interchanged with each other unless it is expressly stated that it is impossible or technically impossible to implement.
[0042] While various embodiments of this application have been described with reference to the accompanying drawings, it should be understood that the embodiments shown and described in this application are merely exemplary and not restrictive. Those skilled in the art can consider various possible modifications based on the above disclosure of this application without departing from the scope of this application.
Claims
1. A level signal output circuit for a valve, characterized in that, The circuit includes a transistor switching section, which comprises a first transistor switch and a second transistor switch connected in series with each other. The first transistor switch includes a high-voltage electrode, a low-voltage electrode, and a control electrode, wherein the high-voltage electrode of the first transistor switch is configured to be connected to a power supply voltage. The second transistor switch includes a high-voltage electrode, a low-voltage electrode, and a control electrode, wherein the low-voltage electrode of the second transistor switch is configured to be connected to a low potential. Wherein, the low-voltage terminal of the first transistor switch and the high-voltage terminal of the second transistor switch are connected to each other; The first transistor switch and the second transistor switch are symmetrical in construction and form an inverter; The level signal output terminal is located between the first transistor switch and the second transistor switch, and the corresponding control electrodes that control the conduction and cutoff of the first transistor switch and the second transistor switch are configured to receive voltage signals corresponding to the sensing or output signals of the sensor. The first transistor switch and the second transistor switch are turned on and off in opposite phases based on the voltage signal.
2. The level signal output circuit according to claim 1, characterized in that, The transistor switch is selected as a MOSFET, and the first transistor switch and the second transistor switch are selected as PMOSFET and NMOSFET, respectively.
3. The level signal output circuit according to claim 1 or 2, characterized in that, The level signal output circuit is configured as a high-side drive level signal output circuit, wherein the first load is configured to be connected in series with the first transistor switch and in parallel with the second transistor switch between the level signal output terminal and the low potential.
4. The level signal output circuit according to claim 1 or 2, characterized in that, The level signal output circuit is configured as a low-end drive level signal output circuit, wherein the first load is configured to be located between the level signal output terminal and the power supply voltage, and is connected in parallel with the first transistor switch and in series with the second transistor switch.
5. The level signal output circuit according to claim 1 or 2, characterized in that, The level signal output circuit includes two or more transistor switch circuit sections that are arranged in parallel with the transistor switch circuit section and are structurally identical. The level signal output terminal corresponding to any one of the two or more transistor switch circuit sections is respectively positioned between two transistor switches connected in series. The corresponding control electrode that controls the conduction and cutoff of two transistor switches in any one of the two or more transistor switch circuit sections is configured to receive a voltage signal corresponding to the sensing or output signal of the corresponding sensor and control the conduction and cutoff of the two transistor switches with opposite phases based on the voltage signal.
6. The level signal output circuit according to claim 1, characterized in that, The sensor was selected as a position sensor.
7. The level signal output circuit according to claim 1, characterized in that, The level signal output circuit is configured for switching valves.
8. The level signal output circuit according to claim 1, characterized in that, The level signal output circuit is either integrated into the sensor or constructed as a separate component.
9. A position detection sensor, characterized in that, It is used to monitor the position of the valve core of a switching valve, wherein the position detection sensor is configured to integrate a level signal output circuit as described in any one of claims 1-7 to be able to output a level signal.
10. A switching valve, characterized in that, It includes a sensor for monitoring the position of the valve core of the switching valve; and a level signal output circuit as described in any one of claims 1-7, capable of converting the sensing signal of the sensor into a level signal.