Circuit board assembly and electronic device
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- XFUSION DIGITAL TECH CO LTD
- Filing Date
- 2025-07-08
- Publication Date
- 2026-07-21
Smart Images
Figure CN224538400U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of electronic equipment technology, and in particular to a circuit board assembly and an electronic device. Background Technology
[0002] In the semiconductor industry, CPO typically refers to "Co-Packaged Optics," a technology that integrates optical components with electronic chips within the same package. The primary purpose of this packaging technology is to improve data transmission speed and energy efficiency in data centers and high-performance computing systems.
[0003] Currently, the increasing demand for computing power is driving a dramatic increase in network bandwidth, leading to an exponential increase in data center energy consumption. To address the technical requirements of low power consumption and high bandwidth, a common approach is to use CPO (Content-Based Optical Programming) technology to place photonic integrated circuits (PICs) and electronic integrated circuits (EICs) side-by-side on a substrate, interconnecting them via leads or substrate wiring. Electronic integrated circuit chips are made of semiconductor materials (usually silicon) and are used to perform various electronic functions, while photonic integrated circuit chips are used for optical signal processing. Both are collectively referred to as silicon photonic chips. In contrast, ASIC (Application-Specific Integrated Circuit) chips are integrated circuits specifically designed for a particular application or function. ASIC chips and silicon photonic chips are typically co-packaged on the same circuit board.
[0004] However, traditional ASIC chips have high power consumption and junction temperatures as high as 105°C, while silicon photonics chips generally require junction temperatures of less than 70°C. The heat dissipation scheme based on the CPO solution involves heat flowing between the ASIC chip and the silicon photonics chip, which may cause the junction temperature of the silicon photonics circuit to exceed the standard, leading to a risk of reduced yield. Utility Model Content
[0005] This application provides a circuit board assembly and electronic device that can reduce or avoid the heat dissipation impact between different chips, thereby improving the reliability of the electronic device.
[0006] A first aspect of this application provides a circuit board assembly, the circuit board assembly comprising:
[0007] A first chip assembly, the first chip assembly including at least a first chip;
[0008] The second chip assembly includes at least a second chip, and the heating temperature of the first chip is higher than that of the second chip.
[0009] A first circuit board, wherein the first chip assembly and the second chip assembly are disposed at intervals on the first circuit board;
[0010] The first heat dissipation component is disposed on the side of the first chip component opposite to the first circuit board and is used to dissipate heat from the first chip component; the second heat dissipation component is disposed on the side of the second chip component opposite to the first circuit board and is used to dissipate heat from the second chip component.
[0011] The first chip is a bare chip, and the second chip is a bare chip.
[0012] The circuit board assembly of this application embodiment includes a first heat dissipation component disposed on the side of the first chip assembly facing away from the first circuit board. The first heat dissipation component dissipates heat from the first chip assembly, and a second heat dissipation component disposed on the side of the second chip assembly facing away from the first circuit board. This ensures that the heat dissipation of the first and second chip assemblies is independent. Since both the first and second chips are bare chips, the relatively higher temperature of the first chip will not affect the heat dissipation of the relatively lower temperature of the second chip, thus meeting the heat dissipation requirements of each chip. Therefore, this application embodiment can reduce or avoid heat dissipation interference between different chips, thereby improving the reliability of electronic devices.
[0013] In some possible implementations, the second chip assembly further includes: a third chip and a second circuit board, wherein the heating temperature of the first chip is higher than that of the third chip;
[0014] The second chip and the third chip are disposed on one side of the second circuit board, and the other side of the second circuit board is disposed on the first circuit board;
[0015] The second heat dissipation component is disposed on the side of the second chip and the third chip that is away from the second circuit board, and is used to dissipate heat for the second chip and the third chip;
[0016] The third chip is a bare chip.
[0017] By designing the second chip assembly to include a second chip, a third chip, and a second circuit board, with the second and third chips mounted on the second circuit board, which is mounted on the first circuit board, and the second heat dissipation component mounted on the side of the second and third chips facing away from the second circuit board, heat dissipation can be provided for both the second and third chips simultaneously. In this case, the heat dissipation of the second and third chips is interconnected, while the heat dissipation of the first chip assembly is independent of that of the second chip assembly. The first chip, which has a relatively higher heat generation temperature, will not affect the heat dissipation of the second and third chips, which have relatively lower heat generation temperatures, thus meeting the heat dissipation requirements of each chip.
[0018] In some possible implementations, the first heat dissipation component includes: a first heat sink; the first heat sink is disposed on the side of the first chip facing away from the first circuit board, for dissipating heat from the first chip;
[0019] And / or, the second heat dissipation component includes: a second heat sink; the second heat sink is disposed on the side of the second chip and the third chip facing away from the second circuit board, for dissipating heat for the second chip and the third chip.
[0020] In this way, the first heat sink is used to dissipate heat from the first chip, the second heat sink is used to dissipate heat from the second and third chips, the heat dissipation of the second and third chips is interconnected, and the heat dissipation of the first chip is relatively independent. The first chip, which has a relatively high heat generation temperature, will not affect the heat dissipation of the second and third chips, which have relatively low heat generation temperatures, thus meeting the heat dissipation needs of each chip.
[0021] In some possible implementations, the first heat dissipation component includes: a first heat sink; the first heat sink is disposed on the side of the first chip facing away from the first circuit board, for dissipating heat from the first chip;
[0022] And / or, the second heat dissipation component includes: a second heat sink and a third heat sink; the second heat sink is disposed on the side of the second chip facing away from the second circuit board, for dissipating heat from the second chip; the third heat sink is disposed on the side of the third chip facing away from the second circuit board, for dissipating heat from the third chip.
[0023] In this way, the first heat sink is used to dissipate heat from the first chip, the second heat sink is used to dissipate heat from the second chip, and the third heat sink is used to dissipate heat from the third chip. The heat dissipation of the first chip, the second chip, and the third chip is relatively independent of each other. The first chip, which has a relatively high heat dissipation temperature, will not affect the heat dissipation of the second chip and the third chip, which have relatively low heat dissipation temperatures, thus meeting the heat dissipation needs of each chip.
[0024] By designing the first, second, and third chips as bare chips, i.e., eliminating the plastic encapsulation on the outside of the bare chips, the heat dissipation path between the first, second, and third chips can be shortened. Specifically, by removing the traditional plastic encapsulation, the thermal resistance in the heat conduction path can be reduced, allowing heat to be conducted more directly and quickly from the bare chips to the heat dissipation system (i.e., the first heat dissipation component and the second heat dissipation component).
[0025] In some possible implementations, the first chip is electrically connected to the first circuit board via a plurality of first solder joints;
[0026] And / or, the second chip is electrically connected to the second circuit board via a plurality of second solder joints;
[0027] And / or, the third chip is electrically connected to the second circuit board via a plurality of third solder joints.
[0028] This enables a good electrical connection between the first chip and the first circuit board, thereby enabling the conduction of electrical signals between the first chip and the first circuit board. Similarly, it enables a good electrical connection between the second chip and the third chip and the second circuit board, thereby enabling the conduction of electrical signals between the second chip and the third chip and the second circuit board.
[0029] In some possible implementations, the first circuit board and the second circuit board are electrically connected by a plurality of fourth solder joints.
[0030] In this way, a good electrical connection can be achieved between the first circuit board and the second circuit board. Since both the second chip and the third chip are electrically connected to the second circuit board, electrical signal conduction between the second chip and the third chip and the first circuit board can be achieved.
[0031] In some possible implementations, a first filler is further disposed between the first chip and the first circuit board, the first filler covering at least a portion of the plurality of first solder joints;
[0032] And / or, a second filler is further provided between the second chip and the second circuit board, the second filler covering at least a portion of the plurality of second solder pieces;
[0033] And / or, a third filler is further provided between the third chip and the second circuit board, the third filler covering at least a portion of the plurality of third solder pieces.
[0034] By providing a first filler between the first chip and the first circuit board, and having the first filler encapsulate multiple first solder joints, the connection between the first chip and the first circuit board is made more robust, thereby improving the reliability of the connection. Similarly, by providing a second filler between the second chip and the second circuit board, and having the second filler encapsulate multiple second solder joints, the connection between the second chip and the second circuit board is made more robust, thereby improving the reliability of the connection. Finally, by providing a third filler between the third chip and the second circuit board, and having the third filler encapsulate multiple third solder joints, the connection between the third chip and the second circuit board is made more robust, thereby improving the reliability of the connection.
[0035] In some possible implementations, the first heat sink includes: a first heat sink body and a first temperature measuring element and a first adjusting element disposed on the first heat sink body, wherein the first adjusting element is electrically connected to the first temperature measuring element.
[0036] The first temperature measuring element is used to measure the heating temperature of the first chip to obtain a first measured temperature, and the first adjusting element is used to exchange heat with the first chip according to the first measured temperature.
[0037] In this way, the first temperature measuring element measures the heating temperature of the first chip and obtains the first measured temperature. The first regulating element cools the first chip according to the obtained first measured temperature, thereby achieving precise heat dissipation of the first chip and keeping the heat dissipation of the first chip by the first heat sink within a suitable operating temperature range.
[0038] In some possible implementations, the second heat sink includes: a second heat sink body and a second temperature measuring element and a second adjusting element disposed on the second heat sink body, wherein the second adjusting element is electrically connected to the second temperature measuring element;
[0039] The second temperature measuring element is used to measure the heating temperature of the second chip assembly to obtain a second measured temperature, and the second regulating element is used to exchange heat with the second chip assembly according to the second measured temperature.
[0040] In this way, the second temperature measuring element measures the heating temperature of the second chip assembly (i.e., the second chip and the third chip) and obtains the second measured temperature. The second regulating element cools down the second chip assembly according to the obtained second measured temperature, thereby achieving precise heat dissipation of the second chip assembly and keeping the heat dissipation of the second chip assembly by the second heat sink within a suitable operating temperature range.
[0041] In some possible implementations, the second heat sink includes: a second heat sink body and a second temperature measuring element and a second adjusting element disposed on the second heat sink body, wherein the second adjusting element is electrically connected to the second temperature measuring element;
[0042] The second temperature measuring element is used to measure the heating temperature of the second chip to obtain a second measured temperature, and the second regulating element is used to exchange heat with the second chip according to the second measured temperature;
[0043] And / or, the third heat sink includes: a third heat sink body and a third temperature measuring element and a third adjusting element disposed on the third heat sink body, wherein the third adjusting element is electrically connected to the third temperature measuring element;
[0044] The third temperature measuring element is used to measure the heating temperature of the third chip to obtain a third measurement temperature, and the third adjusting element is used to exchange heat with the third chip according to the third measurement temperature.
[0045] In this way, the second temperature sensor measures the heating temperature of the second chip and obtains the second measured temperature. The second regulating component cools the second chip according to the obtained second measured temperature, thereby achieving precise heat dissipation of the second chip and keeping the heat dissipation of the second heat sink within a suitable operating temperature range. Similarly, the third temperature sensor measures the heating temperature of the third chip and obtains the third measured temperature. The third regulating component cools the third chip according to the obtained third measured temperature, thereby achieving precise heat dissipation of the third chip and keeping the heat dissipation of the third heat sink within a suitable operating temperature range.
[0046] A second aspect of this application provides an electronic device that includes at least any of the circuit board assemblies described above.
[0047] The electronic device of this application embodiment includes at least a circuit board assembly. In this circuit board assembly, a first heat dissipation component is disposed on the side of a first chip assembly facing away from the first circuit board, for dissipating heat from the first chip assembly. A second heat dissipation component is disposed on the side of a second chip assembly facing away from the first circuit board, for dissipating heat from the second chip assembly. In this way, the heat dissipation of the first chip assembly and the heat dissipation of the second chip assembly are independent. Since the first and second chips are bare chips, the relatively higher heat dissipation temperature of the first chip will not affect the heat dissipation of the relatively lower heat dissipation temperature of the second chip, thus meeting the heat dissipation requirements of each chip. Therefore, this application embodiment can reduce or avoid the heat dissipation influence between different chips, thereby improving the reliability of the electronic device. Attached Figure Description
[0048] Figure 1 This is a schematic diagram of the circuit board assembly provided in an embodiment of this application;
[0049] Figure 2 A schematic diagram of heat conduction in a chip within a circuit board assembly provided in an embodiment of this application;
[0050] Figure 3 This is a schematic diagram of the structure of the first chip and the first circuit board in the circuit board assembly provided in the embodiments of this application;
[0051] Figure 4 A schematic diagram of the structure of the first chip, the second chip, the third chip, the first circuit board, and the second circuit board in the circuit board assembly provided in the embodiments of this application;
[0052] Figure 5This is a schematic diagram of the structure of the second temperature measuring element and the second adjusting element in the second heat sink of the circuit board assembly provided in the embodiments of this application when applied to the second chip.
[0053] Figure label:
[0054] 100 - Circuit board assembly;
[0055] 110 - First chip assembly;
[0056] 111 - First Chip;
[0057] 120 - Second chip assembly;
[0058] 121 - Second chip; 122 - Third chip; 123 - Second circuit board;
[0059] 130 - First circuit board;
[0060] 140 - First heat dissipation component;
[0061] 150 - Second heat dissipation component;
[0062] 151 - Second temperature measuring element; 152 - Second adjusting element;
[0063] 161 - First welded component; 162 - Second welded component; 163 - Third welded component; 164 - Fourth welded component;
[0064] 171 - First filler;
[0065] L-Heat transfer path. Detailed Implementation
[0066] The terminology used in the implementation section of this application is for the purpose of explaining specific embodiments of this application only, and is not intended to limit this application.
[0067] This application provides an electronic device, which can be a computer, mobile phone, drone, netbook, personal digital assistant (PDA), ultra-mobile personal computer (UMPC), handheld computer, smart wearable device, virtual reality (VR) device, server, point of sale (POS) terminal, or other mobile or fixed terminal. The computer can include laptops, tablets, etc.
[0068] It is understood that an electronic device may include at least a circuit board assembly. In embodiments of this application, the circuit board assembly may be disposed inside the electronic device.
[0069] Taking a laptop computer as an example, an electronic device can include a screen and a body. The screen is used to display information and provide an interactive interface for the user. The body has input devices that the user can operate on to facilitate input when using the electronic device. The body may include a circuit board assembly. The circuit board assembly can be housed within the body. The circuit board assembly includes a circuit board and electronic components. The circuit board assembly can be electrically connected to the screen to realize the display control function of the screen.
[0070] With the deepening of industrial digital transformation, the demand for computing power applications is showing characteristics such as ultra-high bandwidth, low latency, flexible connectivity, and low energy consumption. Optical communication networks will focus on the innovative development of hot technologies such as ultra-high capacity transmission, all-optical networking, open and intelligent systems, and photonic integration to enhance network capacity and accelerate the development of the digital economy. The CPO technology route has emerged in response to this need.
[0071] In related technologies, CPO technology is generally used to place photonic integrated circuits (PICs) and electronic integrated circuits (EICs) side by side on a substrate, interconnecting them through leads or substrate wiring. Electronic integrated circuit chips are made of semiconductor materials (usually silicon) and are used to perform various electronic functions, while photonic integrated circuit chips are used for optical signal processing. Both electronic and photonic integrated circuit chips are collectively referred to as silicon photonic chips. ASIC (Application-Specific Integrated Circuit) chips, on the other hand, are integrated circuits specifically designed for a particular application or function. ASIC chips and silicon photonic chips are generally co-packaged on the same circuit board.
[0072] However, traditional ASIC chips have high power consumption and junction temperatures as high as 105°C, while silicon photonics chips generally require junction temperatures of less than 70°C. The heat dissipation scheme based on the CPO solution involves heat flowing between the ASIC chip and the silicon photonics chip, which may cause the junction temperature of the silicon photonics circuit to exceed the standard, leading to a risk of reduced yield.
[0073] To address the aforementioned technical problems, embodiments of this application provide a circuit board assembly. This assembly includes a first chip assembly, a second chip assembly, a first circuit board, a first heat dissipation assembly, and a second heat dissipation assembly. The first chip assembly includes at least a first chip, and the second chip assembly includes at least a second chip. The heating temperature of the first chip is higher than that of the second chip. The first and second chip assemblies are spaced apart on the first circuit board. The first heat dissipation assembly is disposed on the side of the first chip assembly facing away from the first circuit board for heat dissipation of the first chip assembly. The second heat dissipation assembly is disposed on the side of the second chip assembly facing away from the first circuit board for heat dissipation of the second chip assembly. The circuit board assembly provided by this application can reduce or avoid the heat dissipation impact between different chips, thereby improving the reliability of electronic devices.
[0074] The circuit board assembly provided in the embodiments of this application will be described in detail below with reference to the accompanying drawings.
[0075] Reference Figures 1 to 4 As shown, this application embodiment provides a circuit board assembly 100, which includes: a first chip assembly 110, a second chip assembly 120, a first circuit board 130, a first heat dissipation assembly 140, and a second heat dissipation assembly 150. The first chip assembly 110 includes at least a first chip 111, the second chip assembly 120 includes at least a second chip 121, and the heating temperature of the first chip 111 is higher than the heating temperature of the second chip 121.
[0076] The first chip can be a bare chip, and the second chip can be a bare chip.
[0077] In this embodiment of the application, the first chip 111 component 110 and the second chip component 120 can be disposed at intervals on the first circuit board 130. That is, when the first chip 111 component 110 includes the first chip 111 and the second chip component 120 includes the second chip 121, the first chip 111 and the second chip 121 can be disposed at intervals on the first circuit board 130.
[0078] In this embodiment, the first heat dissipation component 140 may be disposed on the side of the first chip 111 component 110 facing away from the first circuit board 130, and the first heat dissipation component 140 is used to dissipate heat from the first chip 111 component 110. The second heat dissipation component 150 may be disposed on the side of the second chip component 120 facing away from the first circuit board 130, and the first heat dissipation component 140 is used to dissipate heat from the second chip component 120.
[0079] By providing a first heat dissipation component 140 on the side of the first chip 111 assembly 110 facing away from the first circuit board 130, the first heat dissipation component 140 is used to dissipate heat for the first chip 111 assembly 110, and a second heat dissipation component 150 is provided on the side of the second chip assembly 120 facing away from the first circuit board 130, the heat dissipation component 150 is used to dissipate heat for the second chip assembly 120. In this way, the heat dissipation of the first chip 111 assembly 110 and the heat dissipation of the second chip assembly 120 are independent of each other. The first chip 111, which has a relatively high heat dissipation temperature, will not affect the heat dissipation of the second chip 121, which has a relatively low heat dissipation temperature, thus meeting the heat dissipation requirements of each chip.
[0080] Therefore, the embodiments of this application can reduce or avoid the heat dissipation impact between different chips, thereby improving the reliability of electronic devices.
[0081] In this embodiment, the second chip assembly 120 may further include a third chip 122 and a second circuit board 123, wherein the heating temperature of the first chip 111 is higher than the heating temperature of the third chip 122. That is, the second chip assembly 120 may include a second chip 121, a third chip 122, and a second circuit board 123, wherein the heating temperature of the first chip 111 is higher than both the heating temperatures of the second chip 121 and the third chip 122. The third chip may be a bare chip.
[0082] At this time, the second chip 121 and the third chip 122 can be disposed on one side of the second circuit board 123, and the other side of the second circuit board 123 can be disposed on the first circuit board 130. The second heat dissipation component 150 is disposed on the side of the second chip 121 and the third chip 122 that is away from the second circuit board 123. The second heat dissipation component 150 is used to dissipate heat for the second chip 121 and the third chip 122.
[0083] By designing the second chip assembly 120 to include a second chip 121, a third chip 122, and a second circuit board 123, with the second chip 121 and the third chip 122 disposed on the second circuit board 123, and the second circuit board 123 disposed on the first circuit board 130, and the second heat dissipation assembly 150 disposed on the side of the second chip 121 and the third chip 122 facing away from the second circuit board 123, heat dissipation for the second chip 121 and the third chip 122 can be performed simultaneously. At this time, the heat dissipation of the second chip 121 and the third chip 122 is linked to each other, while the heat dissipation of the first chip assembly 111 is independent of the heat dissipation of the second chip assembly 120. The first chip 111, which has a relatively high heat dissipation temperature, will not affect the heat dissipation of the second chip 121 and the third chip 122, which have relatively low heat dissipation temperatures, thus meeting the heat dissipation requirements of each chip.
[0084] It should be noted that, in the embodiments of this application, the specific arrangement of the first heat dissipation component 140 and the second heat dissipation component 150 may include, but is not limited to, the following two possible implementations:
[0085] One possible implementation is as follows: the first heat dissipation component 140 may include a first heat sink, wherein the first heat sink may be disposed on the side of the first chip 111 facing away from the first circuit board 130, and the first heat sink is used to dissipate heat from the first chip 111. The second heat dissipation component 150 may include a second heat sink, wherein the second heat sink may be disposed on the side of the second chip 121 and the third chip 122 facing away from the second circuit board 123, and the second heat sink is used to dissipate heat from the second chip 121 and the third chip 122.
[0086] In this way, the first heat sink is used to dissipate heat from the first chip 111, and the second heat sink is used to dissipate heat from the second chip 121 and the third chip 122. The heat dissipation of the second chip 121 and the third chip 122 are linked together, while the heat dissipation of the first chip 111 is relatively independent. The first chip 111, which has a relatively high heat dissipation temperature, will not affect the heat dissipation of the second chip 121 and the third chip 122, which have relatively low heat dissipation temperatures, thus meeting the heat dissipation needs of each chip.
[0087] Another possible implementation is as follows: The first heat dissipation component 140 may include a first heat sink, which may be disposed on the side of the first chip 111 facing away from the first circuit board 130, and the first heat sink is used to dissipate heat from the first chip 111. The second heat dissipation component 150 may include a second heat sink and a third heat sink, wherein the second heat sink may be disposed on the side of the second chip 121 facing away from the second circuit board 123, and the second heat sink is used to dissipate heat from the second chip 121. The third heat sink may be disposed on the side of the third chip 122 facing away from the second circuit board 123, and the third heat sink is used to dissipate heat from the third chip 122.
[0088] In this way, the first heat sink is used to dissipate heat from the first chip 111, the second heat sink is used to dissipate heat from the second chip 121, and the third heat sink is used to dissipate heat from the third chip 122. The heat dissipation of the first chip 111, the second chip 121, and the third chip 122 is relatively independent of each other. The first chip 111, which has a relatively high heat dissipation temperature, will not affect the heat dissipation of the second chip 121 and the third chip 122, which have relatively low heat dissipation temperatures, thus meeting the heat dissipation requirements of each chip.
[0089] It should be noted that, in this embodiment, by designing the first chip 111, the second chip 121, and the third chip 122 as bare chips, i.e., eliminating the plastic encapsulation shell disposed outside the bare chips, the heat transfer path L between the first chip 111, the second chip 121, and the third chip 122 can be shortened (see...). Figure 2 (As shown). Specifically, adding an extra layer of plastic encapsulation increases the thermal resistance for external heat dissipation, making overall temperature control more difficult. Removing the plastic encapsulation usually makes it easier to lower the overall temperature. In other words, by removing the traditional plastic encapsulation, the thermal resistance in the heat conduction path can be reduced, allowing heat to be conducted more directly and quickly from the bare chip to the heat dissipation system (i.e., the first heat dissipation component 140 and the second heat dissipation component 150), thereby reducing thermal cascading in the circuit.
[0090] Furthermore, by eliminating the plastic encapsulation shell surrounding the bare chip, the first chip 111, the second chip 121, and the third chip 122 can directly contact the first heat dissipation component 140 or the second heat dissipation component 150, enabling heat conduction and preventing the plastic encapsulation shell from blocking the heat generated by the first chip 111, the second chip 121, and the third chip 122. Therefore, compared to traditional plastic encapsulation solutions, the bare chip design improves thermal conversion efficiency while reducing the amount of heat conducted from high-power chips to low-power chips through the plastic encapsulation shell, thus lowering the risk of temperature runaway in low-power chips (thermal-sensitive devices).
[0091] Taking the first chip 111 as an ASIC chip, the second chip 121 as a PIC chip, and the third chip 122 as an EIC chip as an example, the junction temperature of the ASIC chip is relatively high, while the PIC and EIC chips are more sensitive to temperature. By designing the ASIC, PIC, and EIC chips as bare chips, the heat from the ASIC chip can be prevented from radiating outwards through the package to the silicon photonics chips (i.e., the PIC and EIC chips) due to the high power consumption and large fluctuations of the ASIC chip at different times. This avoids the risk of the silicon photonics chip's temperature exceeding the limit and causing a decrease in yield. In other words, the embodiments of this application can avoid the temperature problem of silicon photonics chips exceeding the limit and keep the temperature of the silicon photonics chip within a reliable operating temperature range, thereby achieving the reliability of the operating environment temperature of the silicon photonics circuit solution and reducing the chip failure rate.
[0092] Reference Figure 3 and Figure 4 As shown in the embodiment of this application, the first chip 111 can be electrically connected to the first circuit board 130 through multiple first soldering parts 161, the second chip 121 can be electrically connected to the second circuit board 123 through multiple second soldering parts 162, and the third chip 122 can be electrically connected to the second circuit board 123 through multiple third soldering parts 163.
[0093] This enables a good electrical connection between the first chip 111 and the first circuit board 130, thereby enabling the conduction of electrical signals between the first chip 111 and the first circuit board 130. Similarly, it enables a good electrical connection between the second chip 121 and the third chip 122 and the second circuit board 123, thereby enabling the conduction of electrical signals between the second chip 121 and the third chip 122 and the second circuit board 123.
[0094] In this embodiment of the application, the first circuit board 130 and the second circuit board 123 can be electrically connected through a plurality of fourth soldering parts 164.
[0095] In this way, a good electrical connection can be achieved between the first circuit board 130 and the second circuit board 123. Since the second chip 121 and the third chip 122 are both electrically connected to the second circuit board 123, the electrical signal can be conducted between the second chip 121 and the third chip 122 and the first circuit board 130.
[0096] In this embodiment, a first filler 171 may be provided between the first chip 111 and the first circuit board 130. The first filler 171 may enclose at least a portion of the multiple first solder joints 161. By providing the first filler 171 between the first chip 111 and the first circuit board 130, and by enclosing the multiple first solder joints 161, the connection between the first chip 111 and the first circuit board 130 can be made more robust, thereby improving the reliability of the connection between the first chip 111 and the first circuit board 130.
[0097] A second filler may also be provided between the second chip 121 and the second circuit board 123. The second filler can cover at least a portion of the multiple second solder joints 162. By providing a second filler between the second chip 121 and the second circuit board 123, and by covering the multiple second solder joints 162, the connection between the second chip 121 and the second circuit board 123 can be made more robust, thereby improving the reliability of the connection between the second chip 121 and the second circuit board 123.
[0098] A third filler may also be provided between the third chip 122 and the second circuit board 123. The third filler can cover at least a portion of the multiple third solder pieces 163. By providing a third filler between the third chip 122 and the second circuit board 123, and by having the third filler cover the multiple third solder pieces 163, the connection between the third chip 122 and the second circuit board 123 can be made more robust, thereby improving the reliability of the connection between the third chip 122 and the second circuit board 123.
[0099] In this embodiment of the application, the first heat sink may include: a first heat sink body and a first temperature measuring element and a first adjusting element disposed on the first heat sink body. Moreover, the first adjusting element may be electrically connected to the first temperature measuring element. The first temperature measuring element is used to measure the heating temperature of the first chip 111 to obtain a first measured temperature, and the first adjusting element is used to perform heat exchange with the first chip 111 according to the first measured temperature.
[0100] In this way, the first temperature measuring element measures the heating temperature of the first chip 111 and obtains the first measured temperature. The first regulating element can control the temperature of the first chip 111, that is, the first regulating element cools down the first chip 111 according to the obtained first measured temperature, thereby achieving precise heat dissipation of the first chip 111 and keeping the heat dissipation of the first chip 111 by the first heat sink within a suitable operating temperature range.
[0101] In some embodiments, the second heat sink may include: a second heat sink body and a second temperature measuring element and a second adjusting element disposed on the second heat sink body, wherein the second adjusting element is electrically connected to the second temperature measuring element, wherein the second temperature measuring element is used to measure the heating temperature of the second chip assembly 120 to obtain a second measured temperature, and the second adjusting element is used to perform heat exchange with the second chip assembly 120 according to the second measured temperature.
[0102] In this way, the second temperature measuring element measures the heating temperature of the second chip assembly 120 (i.e., the second chip 121 and the third chip 122) and obtains the second measured temperature. The second regulating element can control the temperature of the second chip assembly 120. That is, the second regulating element cools down the second chip assembly 120 according to the obtained second measured temperature, thereby achieving precise heat dissipation of the second chip assembly 120 and keeping the heat dissipation of the second chip assembly 120 by the second heat sink within a suitable operating temperature range.
[0103] Alternatively, in some other embodiments, see [link to relevant documentation]. Figure 5 As shown, the second heat sink may include: a second heat sink body and a second temperature measuring element 151 and a second adjusting element 152 disposed on the second heat sink body. The second adjusting element 152 is electrically connected to the second temperature measuring element 151. The second temperature measuring element 151 is used to measure the heating temperature of the second chip 121 to obtain a second measured temperature. The second adjusting element 152 is used to exchange heat with the second chip 121 according to the second measured temperature.
[0104] The third heat sink may include: a third heat sink body, a third temperature measuring element and a third adjusting element disposed on the third heat sink body, and the third adjusting element is electrically connected to the third temperature measuring element. The third temperature measuring element is used to measure the heating temperature of the third chip 122 to obtain a third measured temperature, and the third adjusting element is used to exchange heat with the third chip 122 according to the third measured temperature.
[0105] In this way, the second temperature measuring element 151 measures the heating temperature of the second chip 121 and obtains a second measured temperature. The second regulating element 152 can control the temperature of the second chip 121, that is, the second regulating element 152 cools down the second chip 121 according to the obtained second measured temperature, thereby achieving precise heat dissipation of the second chip 121 and keeping the heat dissipation of the second heat sink for the second chip 121 within a suitable operating temperature range. The third temperature measuring element measures the heating temperature of the third chip 122 and obtains a third measured temperature. The third regulating element can control the temperature of the third chip 122, that is, the third regulating element cools down the third chip 122 according to the obtained third measured temperature, thereby achieving precise heat dissipation of the third chip 122 and keeping the heat dissipation of the third heat sink for the third chip 122 within a suitable operating temperature range.
[0106] Taking the first chip 111 as an ASIC chip, the second chip 121 as a PIC chip, and the third chip 122 as an EIC chip as an example, the junction temperature of the ASIC chip is relatively high, while the PIC chip and EIC chip are more sensitive to temperature. By designing relatively independent heat dissipation and temperature control schemes, the temperature impact of the high-power ASIC chip on the temperature-sensitive PIC chip and EIC chip can be reduced, thereby controlling the temperature rise of the temperature-sensitive PIC chip and EIC chip and meeting the reliability design requirements of the circuit board assembly 100.
[0107] It is understood that in the embodiments of this application, the first temperature measuring element, the second temperature measuring element 151 and the third temperature measuring element can be thermocouples or temperature sensors.
[0108] Additionally, it should be noted that in one possible implementation, the first regulating element, the second regulating element 152, and the third regulating element can be a water pump or a cold plate. The independent first heat sink can be customized to suit the temperature characteristics and heat dissipation requirements of different chips, achieving more precise temperature control. Chips with high junction temperatures can be designed with larger water flow rates and more efficient heat exchange areas, while temperature-sensitive chips can employ more refined temperature control strategies to keep them within a suitable operating temperature range.
[0109] In this embodiment of the application, taking the first temperature measuring element, the second temperature measuring element 151, and the third temperature measuring element as thermocouples, and the first adjusting element, the second adjusting element 152, and the third adjusting element as water pumps as examples, such as... Figure 5 As shown, the second temperature sensing element 151 is a thermocouple, and the second regulating element 152 is a water pump. The water pump can be set as a reference point, and the temperature of the second chip 121 can be measured via the thermocouple. This measurement method is simple, accurate, and provides real-time temperature data. Furthermore, by reading the thermocouple's temperature data and dynamically adjusting the water pump's flow rate based on this data, the cooling system can be optimized according to actual temperature requirements, improving energy efficiency.
[0110] In this embodiment, precise temperature control allows the chip temperature to be maintained at a constant value. This dynamic balance can be achieved through a closed-loop control system, where readings from temperature sensors are used to adjust the heat dissipation system in response to temperature changes.
[0111] In the description of the embodiments of this application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.
[0112] In the description of this application, it should be understood that the terms “may include” and “have” as used herein, and any variations thereof, are intended to cover non-exclusive inclusion, such that a process, method, display structure, product, or device that includes a series of steps or units is not necessarily limited to those steps or units that are explicitly listed, but may include other steps or units that are not explicitly listed or that are inherent to such process, method, product, or device.
[0113] The term "and / or" used in this application is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship.
[0114] Unless otherwise expressly specified and limited, the terms "installation," "connection," and "linkage" should be interpreted broadly. For example, they can refer to a fixed connection, an indirect connection via an intermediate medium, or the internal connection or interaction between two components. Those skilled in the art can understand the specific meaning of these terms in the embodiments of this application based on the specific circumstances.
[0115] The terms "first," "second," "third," "fourth," etc. (if present) in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.
Claims
1. A circuit board assembly, characterized in that, include: A first chip assembly, the first chip assembly including at least a first chip; The second chip assembly includes at least a second chip, and the heating temperature of the first chip is higher than that of the second chip. A first circuit board, wherein the first chip assembly and the second chip assembly are disposed at intervals on the first circuit board; The first heat dissipation component is disposed on the side of the first chip component opposite to the first circuit board and is used to dissipate heat from the first chip component; the second heat dissipation component is disposed on the side of the second chip component opposite to the first circuit board and is used to dissipate heat from the second chip component. The first chip is a bare chip, and the second chip is a bare chip.
2. The circuit board assembly according to claim 1, characterized in that, The second chip assembly further includes: a third chip and a second circuit board, wherein the heating temperature of the first chip is higher than that of the third chip; The second chip and the third chip are disposed on one side of the second circuit board, and the other side of the second circuit board is disposed on the first circuit board; The second heat dissipation component is disposed on the side of the second chip and the third chip that is away from the second circuit board, and is used to dissipate heat for the second chip and the third chip; The third chip is a bare chip.
3. The circuit board assembly according to claim 2, characterized in that, The first heat dissipation component includes: a first heat sink; the first heat sink is disposed on the side of the first chip facing away from the first circuit board, and is used to dissipate heat from the first chip; And / or, the second heat dissipation component includes: a second heat sink; the second heat sink is disposed on the side of the second chip and the third chip facing away from the second circuit board, for dissipating heat for the second chip and the third chip.
4. The circuit board assembly according to claim 2, characterized in that, The first heat dissipation component includes: a first heat sink; the first heat sink is disposed on the side of the first chip facing away from the first circuit board, and is used to dissipate heat from the first chip; And / or, the second heat dissipation component includes: a second heat sink and a third heat sink; the second heat sink is disposed on the side of the second chip facing away from the second circuit board, for dissipating heat from the second chip; the third heat sink is disposed on the side of the third chip facing away from the second circuit board, for dissipating heat from the third chip.
5. The circuit board assembly according to any one of claims 2-4, characterized in that, The first chip is electrically connected to the first circuit board via multiple first solder joints; And / or, the second chip is electrically connected to the second circuit board via a plurality of second solder joints; And / or, the third chip is electrically connected to the second circuit board via a plurality of third solder joints.
6. The circuit board assembly according to claim 5, characterized in that, A first filler is further disposed between the first chip and the first circuit board, and the first filler covers at least a portion of the plurality of first solder pieces; And / or, a second filler is further provided between the second chip and the second circuit board, the second filler covering at least a portion of the plurality of second solder pieces; And / or, a third filler is further provided between the third chip and the second circuit board, the third filler covering at least a portion of the plurality of third solder pieces.
7. The circuit board assembly according to claim 3 or 4, characterized in that, The first heat sink includes: a first heat sink body, a first temperature measuring element and a first adjusting element disposed on the first heat sink body, and the first adjusting element is electrically connected to the first temperature measuring element; The first temperature measuring element is used to measure the heating temperature of the first chip to obtain a first measured temperature, and the first adjusting element is used to exchange heat with the first chip according to the first measured temperature.
8. The circuit board assembly according to claim 3, characterized in that, The second heat sink includes: a second heat sink body, a second temperature measuring element and a second adjusting element disposed on the second heat sink body, and the second adjusting element is electrically connected to the second temperature measuring element; The second temperature measuring element is used to measure the heating temperature of the second chip assembly to obtain a second measured temperature, and the second regulating element is used to exchange heat with the second chip assembly according to the second measured temperature.
9. The circuit board assembly according to claim 4, characterized in that, The second heat sink includes: a second heat sink body, a second temperature measuring element and a second adjusting element disposed on the second heat sink body, and the second adjusting element is electrically connected to the second temperature measuring element; The second temperature measuring element is used to measure the heating temperature of the second chip to obtain a second measured temperature, and the second regulating element is used to exchange heat with the second chip according to the second measured temperature; And / or, the third heat sink includes: a third heat sink body and a third temperature measuring element and a third adjusting element disposed on the third heat sink body, wherein the third adjusting element is electrically connected to the third temperature measuring element; The third temperature measuring element is used to measure the heating temperature of the third chip to obtain a third measurement temperature, and the third adjusting element is used to exchange heat with the third chip according to the third measurement temperature.
10. An electronic device, characterized in that, It includes at least the circuit board assembly described in any one of claims 1 to 9 above.