Automotive dashboard pcb design structure based on r5f10dpj

Abstract

The utility model relates to a kind of automobile dashboard PCB design structure based on R5F10DPJ, include top layer, power layer, ground layer, bottom layer setting in turn layer by layer;Top layer is used to arrange MCU chip and layout power line and high-speed signal line;Power layer is used to divide power domain and power line layout;Ground layer is used to provide multiple reference ground level and the ground network of reference ground level formation is segmented;Ground layer is also used to layout sensitive signal line;Bottom layer is used to layout socket, radiator, interface module and plug-in unit;Bottom layer is also used for low-speed signal wiring.The utility model reduces conducted noise, optimizes radiation interference, improves ADC sampling accuracy, enhances power stability, significantly improves thermal reliability, reduces cost and failure rate.

Description

Technical Field

[0001] This utility model relates to the field of automotive electronics technology, specifically to a PCB design structure for automotive dashboards based on R5F10DPJ. Background Technology

[0002] Currently, with the improvement of people's living standards, the demand for automobiles is gradually increasing. As an interaction tool between the vehicle and the driver, the car dashboard is crucial and indispensable. The development of automotive dashboards has been quite long, undergoing several major evolutions from mechanical instruments, electrical instruments, analog circuit electronic instruments, to virtual instruments. Currently, fully digital virtual instruments have become the mainstream application, utilizing the display, processing, and storage capabilities of micro-control systems to simulate the processing of physical instruments. Digital instruments use LCD displays, which not only enable real-time data updates and provide drivers with basic driving information, but also offer more comprehensive and accurate information display, further ensuring driving safety and enhancing the technological sophistication, aesthetics, and driving experience of the car.

[0003] Well-known competitions within this field, such as the National Intelligent Vehicle Competition and the National Electronics Competition, all require a high level of knowledge in circuit design from participants, as the circuit section is fundamental to these competitions. This project demands a high level of expertise in electronic circuit application and design, and covers a wide range of topics. It effectively develops students' professional skills, solidifies their fundamental knowledge, and lays a solid foundation for future development.

[0004] In response to the call for energy conservation and emission reduction in this era, LED-backlit LCD screens have emerged. For display products, low power consumption, low content of harmful substances, and service life have become key green indicators.

[0005] LCD screens achieve desired visual effects by altering the intensity of light, employing a voltage-controlled operating method that ensures fast response times. The backlight structure of an LCD screen is as follows... Figure 45 As shown.

[0006] In recent years, my country's liquid crystal display (LCD) technology has made great progress and breakthroughs, with a qualitative leap in both production processes and performance.

[0007] Currently, thanks to the development of LCD displays and the increasing demands for practicality and aesthetics, people have higher expectations for visual display effects. As a result, more and more car manufacturers are applying LCD screens to car dashboards. Combining its known advantages with current technological capabilities, LCD displays are undergoing further optimization, and LCD dashboards will also be further improved along with the development of LCD displays.

[0008] The shortcomings of existing technology are:

[0009] 1. Power supply noise coupling: In traditional designs, the 5V / 3.3V / 1.3V power conversion circuit (such as MPQ4423H, TMI3113) is not isolated, which leads to a decrease in ADC sampling accuracy (measured ripple > 50mV).

[0010] 2. Poor LVDS signal integrity: The video decoding circuit of AMT630H is wired on the same layer as the backlight PWM, causing screen flicker (Jitter>10%).

[0011] 3. EMC test failed: CAN bus (ISO 11898-2) radiation exceeded the limit by 8dB in the 30MHz band (CISPR 25 limit). Summary of the Invention

[0012] This invention addresses the aforementioned problems by providing a PCB design structure for automotive dashboards based on R5F10DPJ, aiming to reduce conducted noise, optimize radiated interference, improve ADC sampling accuracy, enhance power supply stability, significantly improve thermal reliability, and reduce cost and failure rate.

[0013] To solve the above problems, the technical solution provided by this utility model is as follows:

[0014] A PCB design structure for an automotive dashboard based on R5F10DPJ, comprising a top layer, a power layer, a ground layer, and a bottom layer stacked sequentially, wherein:

[0015] The top layer is used to arrange MCU chips and lay power lines and high-speed signal lines; the power layer is used to divide the power domain and lay power lines; the ground layer is used to provide multiple reference ground planes and divide the ground network formed by the reference ground planes; the ground layer is also used to lay sensitive signal lines; the bottom layer is used to lay sockets, heat dissipation devices, interface modules and plug-ins; the bottom layer is also used for low-speed signal wiring.

[0016] Preferably, the crystal oscillator of the peripheral circuit of the MCU chip is placed on the left side of the MCU chip; the distance between the crystal oscillator of the peripheral circuit and the disk pin of the MCU chip is ≤0.6mm; the wiring order of the clock signal of the MCU chip is resistor, load capacitor, crystal oscillator; a kill zone is set below the crystal oscillator of the peripheral circuit; ground vias are arranged around the bottom of the MCU chip and the periphery of the circuit; a filter capacitor is provided at each power supply pin of the MCU chip, and the distance between the power supply pin and the filter capacitor is ≤0.5mm.

[0017] Preferably, the power supply circuit of the top layer is arranged in a straight line and the distance between it and other circuits is 15mil to 30mil; the feedback signal area of ​​the top layer is arranged on the side away from the inductor area.

[0018] Preferably, the inductance area is provided with an unshielded inductor; a prohibited area is provided below the unshielded inductor, where it is forbidden to place devices, lay copper, or make traces.

[0019] Preferably, the power layer adopts a grid-shaped partitioning structure to divide the power domain into DVDD5V area, 3.3V area, AU3.3V area, 5V area and 3.3VHD area; each power domain is connected by copper pour and via; the non-copper pour area adopts thickened traces with a trace width of 10 mil to 30 mil.

[0020] Preferably, a decoupling capacitor is arranged in the 3.3VHD region, and the distance between the decoupling capacitor and the high-frequency power supply is <100mil.

[0021] Preferably, the stratum is routed using the sensitive signal line, and grounding shielding wires are provided on both sides of the sensitive signal line.

[0022] Preferably, the ground plane is divided into different ground planes including GND, AGND, GND-AU and EX_GND, and each ground plane is connected by a zero-ohm resistor; the traces of the ground plane are distributed in a grid pattern and are not parallel to the traces of the power plane and the bottom layer, respectively.

[0023] Preferably, the differential signal lines of the bottom layer are routed through vias; the width of the high current path of the bottom layer is ≥0.5mm; the heat dissipation area of ​​the bottom layer is provided with ground vias, the diameter of the ground vias in the heat dissipation area is 0.3mm and the spacing between the vias is 1mm; the filter capacitor is connected to the power supply pin through vias.

[0024] Compared with the prior art, this utility model has the following advantages:

[0025] 1. Significant electromagnetic interference (EMI) suppression effect.

[0026] Reduced conducted noise:

[0027] Through a multi-stage filtering architecture (common-mode choke + π-type filter), the conducted noise of the DC-DC switching power supply is attenuated by >25dB at 1MHz, and the output ripple voltage is <20mV (compared to >50mV in traditional solutions), meeting the ISO 7637-2 Level III standard.

[0028] Radiated interference optimization:

[0029] After adopting grounded shielded wires and equal-length wiring, the crosstalk of LVDS differential pairs is reduced by 15dB, and the peak radiated emission in the 30MHz band is <40dBμV / m (CISPR 25 Class 5 limit 50dBμV / m), completely solving the screen flicker problem.

[0030] 2. Signal Integrity (SI) and Power Integrity (PI) Improvement

[0031] Improved ADC sampling accuracy:

[0032] By using independent plane isolation and grounding processing, the peak-to-peak sampling noise of the R5F10DPJ ADC is reduced from 5mV to 2mV, with an error rate of <0.5% (compared to 3% in conventional designs).

[0033] Enhanced power stability:

[0034] The power layer's "grid"-shaped segmentation combined with ferrite bead isolation enables the 1.3V power supply to have a load regulation rate of less than 1% and improve efficiency to 92% (compared to only 80% efficiency for traditional LDO solutions).

[0035] 3. Significantly improved thermal reliability

[0036] Temperature rise control:

[0037] The copper block heat dissipation island + thermal via array design enables the MPQ4423H to achieve a temperature rise of less than 8°C under full load conditions, which is 40% lower than the traditional layout. The R5F10DPJ junction temperature is always less than 95°C (the industrial grade upper limit is 105°C).

[0038] Seismic performance:

[0039] Key components such as crystal oscillators are suspended and fixed, and there is no failure to desolder under 10G mechanical impact (traditional dispensing process can only withstand 5G).

[0040] 4. Cost and Mass Production Advantages

[0041] No additional shielding required:

[0042] EMC requirements can be met simply by optimizing PCB stack-up and layout partitioning, reducing single-board costs by 15%.

[0043] High consistency in mass production:

[0044] With a cumulative production of 100,000 units, a failure rate of less than 0.01%, and zero complaints in the market for two years, it is significantly better than the industry average (typical failure rate of 0.1%). Attached Figure Description

[0045] Figure 1 This is a schematic diagram of the circuit design flow framework for a specific embodiment of the present utility model;

[0046] Figure 2 This is a schematic diagram of the MCU circuit of a specific embodiment of the present invention;

[0047] Figure 3 This is a schematic diagram of a specific embodiment of the power supply to 5V conversion principle of this utility model;

[0048] Figure 4 This is a schematic diagram of a power supply to USB power supply circuit according to a specific embodiment of this utility model;

[0049] Figure 5 A schematic diagram of a 5V to 3.3V power supply conversion principle according to a specific embodiment of this utility model;

[0050] Figure 6 A schematic diagram of a 5V power supply to 1.3V power supply conversion principle according to a specific embodiment of this utility model;

[0051] Figure 7 This is a schematic diagram of the RN6752M chip circuit layout according to a specific embodiment of the present invention;

[0052] Figure 8 This is a schematic diagram of the PCB of the R5F10DPJ chip according to a specific embodiment of the present invention;

[0053] Figure 9 This is a detailed schematic diagram of the power supply to 5V conversion layout and wiring of a specific embodiment of this utility model;

[0054] Figure 10 This is a detailed schematic diagram of the power supply to USB power supply layout and wiring according to a specific embodiment of this utility model;

[0055] Figure 11 A schematic diagram of a 5V to 1.3V LDO power supply circuit according to a specific embodiment of this utility model;

[0056] Figure 12 A schematic diagram of a 5V to 3.3V LDO power supply circuit according to a specific embodiment of this utility model;

[0057] Figure 13 This is a top-level layout diagram of a specific embodiment of the present utility model;

[0058] Figure 14 This is a schematic diagram of the bottom layer layout of a specific embodiment of the present utility model;

[0059] Figure 15 This is a schematic diagram of the top-level PCB layout and routing of a specific embodiment of this utility model;

[0060] Figure 16 This is a schematic diagram of the R5F10DPJ chip according to a specific embodiment of the present invention;

[0061] Figure 17 This is a schematic diagram of the crystal oscillator principle of a specific embodiment of the present invention;

[0062] Figure 18 This is a schematic diagram of the reset signal principle of a specific embodiment of the present invention;

[0063] Figure 19 This is a schematic diagram of the storage principle of a specific embodiment of the present utility model;

[0064] Figure 20 This is a schematic diagram of the wake-up port circuit of a specific embodiment of this utility model;

[0065] Figure 21 This is a schematic diagram of the button principle of a specific embodiment of the present utility model;

[0066] Figure 22 This is a schematic diagram of the LVDS liquid crystal interface circuit of a specific embodiment of the present invention;

[0067] Figure 23 This is a schematic diagram of the liquid crystal backlight circuit of a specific embodiment of the present invention;

[0068] Figure 24 This is a schematic diagram of the video decoding circuit of a specific embodiment of the present invention;

[0069] Figure 25 This is a schematic diagram of the FLASH circuit schematic of a specific embodiment of the present invention;

[0070] Figure 26 This is a schematic diagram of the internal test circuit of the chip according to a specific embodiment of the present invention.

[0071] Figure 27 This is a schematic diagram of the BOOT selection circuit according to a specific embodiment of the present invention.

[0072] Figure 28 This is a schematic diagram of the SDIO principle of a specific embodiment of the present invention;

[0073] Figure 29 This is a schematic diagram of the Wi-Fi Bluetooth module interface according to a specific embodiment of the present invention.

[0074] Figure 30 This is a physical schematic diagram of a Wi-Fi Bluetooth module according to a specific embodiment of this utility model;

[0075] Figure 31 This is a schematic diagram of the I2S audio output circuit according to a specific embodiment of the present invention.

[0076] Figure 32 This is a schematic diagram of the CAN communication module circuit of a specific embodiment of this utility model;

[0077] Figure 33 This is a schematic diagram of a radio circuit according to a specific embodiment of the present invention;

[0078] Figure 34 This is a schematic diagram of the voice Bluetooth circuit according to a specific embodiment of the present invention;

[0079] Figure 35 This is a schematic diagram of the audio channel selection circuit according to a specific embodiment of the present invention.

[0080] Figure 36 This is a schematic diagram of the I / O port circuit of a specific embodiment of the present invention;

[0081] Figure 37 This is a schematic diagram of the reversing radar and camera power supply circuit of a specific embodiment of this utility model;

[0082] Figure 38 This is a schematic diagram of the power amplifier module circuit of a specific embodiment of the present utility model;

[0083] Figure 39 This is a schematic diagram of the frequency output circuit of a specific embodiment of the present invention;

[0084] Figure 40 This is a schematic diagram of the interface circuit of a specific embodiment of the present utility model;

[0085] Figure 41 This is a schematic diagram of the second layer PCB routing in a specific embodiment of this utility model;

[0086] Figure 42 This is a schematic diagram of the PCB third layer routing in a specific embodiment of this utility model;

[0087] Figure 43 This is a schematic diagram of the PCB bottom layer traces in a specific embodiment of this utility model;

[0088] Figure 44 This is a schematic diagram of the MCU crystal oscillator layout and routing in a specific embodiment of this utility model;

[0089] Figure 45 This is a schematic diagram of the backlight structure of a liquid crystal display screen in the prior art.

[0090] The following layers are listed: 100. Top Layer, 200. Power Layer, 300. Ground Layer, 400. Bottom Layer, 110. MCU Chip, 111. Crystal Oscillator for Peripheral Circuits, 112. Ground Via, 120. Power Circuit, 130. Feedback Signal Area, 140. Inductor Area, 210. DVDD 5V Area, 220. 3.3V Area, 230. AU 3.3V Area, 240. 5V Area, 250. 3.3V HD Area, 310. Sensitive Signal Line, 320. GND, 330. AGND, 340. GND-AU, 350. EX_GND, 410. Socket, 420. Heatsink, 430. Interface Module, 440. Plug-in, 450. Differential Signal Line, 460. High Current Path Detailed Implementation

[0091] The present invention will be further illustrated below with reference to specific embodiments. It should be understood that these embodiments are only for illustrating the present invention and are not intended to limit the scope of the present invention. After reading the present invention, any modifications of the present invention in various equivalent forms by those skilled in the art will fall within the scope defined by the appended claims.

[0092] This utility model application claims protection for a PCB design structure for an automotive dashboard based on R5F10DPJ, such as... Figure 1 , 13 As shown in Figures 14, 15, 41, and 42, the structure comprises a top layer 100, a power layer 200, a ground layer 300, and a bottom layer 400 stacked sequentially, wherein:

[0093] The top layer 100 is used to arrange the MCU chip 110 and lay out power lines and high-speed signal lines; the power layer 200 is used to divide the power domain and lay out power lines; the ground layer 300 is used to provide multiple reference ground planes and divide the ground network formed by the reference ground planes; the ground layer 300 is also used to lay out sensitive signal lines 310; the bottom layer 400 is used to lay out sockets 410, heat dissipation devices 420, interface modules 430 and plug-ins 440; the bottom layer 400 is also used for low-speed signal routing.

[0094] It should be noted that, as Figure 2 , 7 As shown in Figures 8, 9, 10, 11, 12, 43, and 44, the crystal oscillator 111 of the peripheral circuit of the MCU chip 110 is placed on the left side of the MCU chip 110; the distance between the crystal oscillator 111 of the peripheral circuit and the disk pin of the MCU chip 110 is ≤0.6mm; the wiring order of the clock signal of the MCU chip 110 is resistor, load capacitor, crystal oscillator; a kill zone is set below the crystal oscillator 111 of the peripheral circuit; ground vias 112 are arranged around the bottom of the MCU chip 110 and the circuit periphery; a filter capacitor is set at each power supply pin of the MCU chip 110, and the distance between the power supply pin and the filter capacitor is ≤0.5mm.

[0095] It should be further explained that the circuit layout of the RN6752M and AMT630H chips belongs to the MCU part, and three main parts need attention: First, the crystal oscillator should be placed as close as possible to the I / O port, passing through capacitors first, and the trace length and angle should be as consistent as possible. This area should also be set as a no-copper-layout area to avoid other interference. Second, the filter capacitors should correspond one-to-one with the I / O ports and be as close to the chip as possible. Third, sufficient vias should be placed under the chip to ensure the integrity of signal return.

[0096] It should be noted that the power supply circuit 120 of the top layer 100 is arranged in a straight line and the distance between it and other circuits is 15mil~30mil; the feedback signal area 130 of the top layer 100 is arranged on the side away from the inductor area 140.

[0097] It should be further noted that DC-DC circuits have many external components, complex circuitry, and high requirements for layout and routing. Component placement must conform to an "L" or "I" shape. The placement of filtering components must adhere to the principle of "large to small" on the power path; the component layout should be as compact as possible to minimize the power path; sufficient space should be left for vias and copper pours to meet the current carrying capacity of the power module's input / output channels; the location of vias for layer changes must consider the position of the filtering components, with input vias placed before the filtering components and output vias placed after the filtering components; loop area must be considered during layout; and the power consumption of the circuit board should be estimated to select an appropriate trace width.

[0098] It should be further explained that 90% of the components (MCU, display driver, interfaces, etc.) are placed in the top 100, and some power lines and high-speed signal lines (such as LVDS, CAN) are laid out; the interference sources (such as DC-DC) in the top 100 are centrally located and far away from sensitive signal areas, and key signal lines (such as clock) are grounded.

[0099] It should be further noted that the inductor area 140 is equipped with an unshielded inductor; a prohibited area is set below the unshielded inductor, where it is forbidden to place components, lay copper, or make traces.

[0100] It should be noted that the power layer 200 uses a grid-shaped partitioning structure to divide the power domain into DVDD5V area 210, 3.3V area 220, AU3.3V area 230, 5V area 240 and 3.3VHD area 250 to avoid power overlap coupling; each power domain is connected by copper pours and vias; thicker traces are used in non-copper pour areas, with trace widths of 10 mil to 30 mil.

[0101] It should be further noted that decoupling capacitors are placed in the 3.3VHD area at 250, and the distance between the decoupling capacitors and the high-frequency power supply is less than 100mil.

[0102] It should be further noted that the TMI3113 power supply is an LDO power supply circuit, which has relatively fewer external components compared to a DC-DC power supply circuit. However, attention should still be paid to the current path, including the placement order of large and small filter capacitors, the placement of inductors, and so on.

[0103] It should be noted that the ground layer 300 uses a sensitive signal line 310 for routing, and grounding shielding wires are installed on both sides of the sensitive signal line 310.

[0104] It should be further explained that ground plane 300 is divided into different ground planes including GND320, AGND330, GND-AU340, and EX_GND350, and these planes are connected by zero-ohm resistors. The traces of ground plane 300 are distributed in a grid pattern and are not parallel to the traces of power plane 200 and bottom plane 400, respectively. Ground plane 300 prioritizes ensuring the ground integrity of the area beneath the MCU and analog circuits.

[0105] It should be noted that the differential signal line 450 of the bottom layer 400 is routed through vias on the bottom layer 400; the width of the high current path 460 of the bottom layer 400 is ≥0.5mm; the heat dissipation area of ​​the bottom layer 400 is drilled with ground vias, the diameter of the ground vias in the heat dissipation area is 0.3mm and the spacing between the vias is 1mm; the filter capacitor is connected to the power supply pin through vias.

[0106] It should be further explained that the bottom 400 layer houses the sockets, heat dissipation devices, and the remaining 10% of the components, and completes the low-speed signal wiring (such as buttons and LIN communication).

[0107] It should be noted that the overall circuit design framework of this utility model includes a main control module, a power supply module, and a display module;

[0108] The main control module uses a low-power, high-performance 100-pin R5F10DP main control chip, AD buttons, AT24C08 memory, and a wake-up port. The power module's 5V to 5V conversion circuit uses an MPQ4423H chip for the BUCK circuit, and the USB power circuit, 5V to 3.3V conversion, and 1.3V circuit are all implemented using a TMI3113 for step-down output. Figure 3 , 4 As shown in Figures 5 and 6, the AMT630HV100 chip in the display module supports JPEG / MJPEG and H.264 video decoding and can implement multiple communication methods in accordance with the AEC-Q100 standard, making it a high-performance video display chip.

[0109] It should be noted that this utility model proposes a systematic solution to the electromagnetic interference (EMI) problem caused by the switching power supply (DCDC) in automotive dashboards. The interference mainly originates from:

[0110] High-frequency switching noise: The switching transistors (frequency 1MHz) of DC-DC chips such as MPQ4423H generate di / dt spikes (measured peak value > 2A / ns) when they are turned on / off, which are radiated through parasitic parameters.

[0111] Layout coupling interference: Power lines (such as VBAT) are routed in parallel with sensitive signal lines (LVDS, ADC), resulting in crosstalk (coupling coefficient > 20%).

[0112] Ground bounce effect: Incomplete ground plane causes excessively high impedance of high frequency return path (>0.5Ω@100MHz), which aggravates common mode radiation.

[0113] It should be further explained that, to solve the electromagnetic interference problem, this invention optimizes the filter circuit; a suitable filter circuit and a suitable suppression capacitor are used. The filter capacitor can filter out interference signals from the switching frequency and spare part frequency, and at the same time, it can reduce the amplitude of spike signals in the circuit and reduce the degree of radiated interference. Low-pass filters, passive filters, etc. can be selected, and appropriate cutoff frequencies and stopband bandwidths can be set. The suppression capacitor can reduce electromagnetic noise and improve the circuit's anti-interference ability. Its selection requires consideration not only of capacitance, withstand voltage, and temperature resistance, but also parameters such as ESR and ESL.

[0114] It should be further explained that, in order to solve the electromagnetic interference problem, this utility model optimizes the PCB design and layout; under existing conditions, the layout of components is planned as reasonably as possible, and key signals such as switching transistors and transformers are placed further away from sensitive signals and kept at a certain distance from other components to avoid the possibility of mutual interference; regarding wiring, the length of signal traces can be shortened, as the longer the signal trace, the greater the electromagnetic radiation and interference it may receive; signals are classified, and power lines and signal lines are separated to reduce the serious interference and impact of large inrush currents and peak voltages on signal lines on power traces; in multilayer boards, ground planes and shielding layers can be used for mutual isolation.

[0115] It should be further explained that the main items of electromagnetic compatibility (EMC) testing include radiated interference (RI) testing, electromagnetic radiated immunity (RS) testing, conducted interference (CI) testing, electromagnetic immunity (CS) testing, electrical fast transient / burst (EFT) testing, surge testing, and electrostatic discharge (ESD) testing. EMC testing is an important test in the automotive electronics field to verify the reliability and safety of products. Passing EMC testing ensures that products operate normally in complex electromagnetic interference environments.

[0116] It should be noted that, as Figure 16As shown, the main control chip of this invention is a 16-bit microcontroller from Renesas Electronics. Among the many R5D10 models, the 100-pin R5F10DP was chosen for practicality and cost-effectiveness. The R5F10DP chip is a low-power, high-performance chip based on a RISC (Reduced Instruction Set Computer) architecture. Its operating voltage is approximately between 2.7V and 5.5V, with multiple selectable voltage inputs. This chip can operate normally between -40℃ and 85℃ and can adapt to extreme working environments. Therefore, this chip is commonly used in industrial control, automotive electronics, and other fields. Furthermore, the development environment supports multiple compilers and simulators, facilitating user debugging.

[0117] It should be noted that, as Figure 17 As shown, this invention uses an 8MHz crystal oscillator, with a load capacitor used to adjust the oscillation frequency, thereby generating a stable oscillation signal. The load capacitor is selected as 20pF based on calculations. Generally, the reset signal is logic low; under normal operating conditions, the reset signal is logic high. The circuit design is as follows... Figure 18 As shown. The resistance and capacitance values ​​can be adjusted according to actual needs and the chip datasheet.

[0118] It should be noted that, as Figure 19 As shown, the storage circuit uses the AT24C08, a two-wire serial EEPROM, with selectable 128×8, 256×8, 512×8, 1024×8, or 2048×8 configurations. It features high reliability, with up to one million data write cycles and a data retention period of up to one hundred years.

[0119] It should be noted that, as Figure 20 As shown, this invention offers two wake-up methods: one via the car battery (VBAT) and the other via the key (IGN). A rectifier diode, model 1N4007W, with a forward current of up to 1A, is connected in series at the power supply. A switching diode, BAV99, is used for rectification at the connection to the 5V power supply; this component is placed primarily for ESD protection, reducing the impact of static electricity on the circuit. The BAV99 also provides limiting and protection functions; when used in conjunction with an RC filter circuit, it effectively suppresses conducted interference. When IGN or VBAT is connected, the diode conducts in the forward direction, connecting to the 5V power supply, and the signals POWER and AD0 receive a logic high level; conversely, it disconnects from the 5V power supply.

[0120] It should be noted that, as Figure 21As shown, the button uses a low-level connection mode, connecting to ground when pressed and being at a high level when disconnected. A 0.1uF capacitor is connected in parallel, utilizing the principle of non-sudden change in capacitance to reduce mechanical bounce of the button.

[0121] It should be noted that, as Figure 2 As shown, the LCD main control chip is an HMI display control chip manufactured by Kaiyang, specifically model AMT630HV100. This chip supports JPEG / MJPEG and H.264 video decoding and can implement multiple communication methods compliant with the AEC-Q100 standard, making it a high-performance video display chip. This chip model was chosen for this project to improve user experience. In the schematic design, a 0.1uF capacitor is connected in parallel at the power supply connection to filter high-frequency interference, eliminate coupling, and improve chip performance. Appropriate crystal oscillators and start-up capacitors are selected according to the chip datasheet.

[0122] It should be noted that the LCD interface circuit, such as Figure 22 As shown, the signal is connected using a 33-ohm resistor array for easy impedance matching.

[0123] It should be noted that, as Figure 23 As shown, the LCD backlight circuit uses a boost converter circuit composed of MP3302. The MP3302 employs current control mode and a fixed-frequency architecture to regulate the LED current, which can be acquired through a sampling resistor. Its low feedback voltage of 200mV reduces power loss, thereby improving conversion efficiency. If an overvoltage condition occurs due to an open circuit, the MP3302 will be turned off to reduce losses. In addition, the MP3302 features input undervoltage lockout (UVLO) protection, current limiting protection, and thermal overload protection to prevent chip damage in case of output overload. The enable input is a PWM signal, which can be adjusted as needed.

[0124] It should be noted that, as Figure 24 As shown, the video decoding circuit uses the RN6752 as the control chip. This chip's high performance and low power consumption make it an ideal choice for in-vehicle entertainment systems, ensuring high-definition video playback and supporting multitasking, making it a common choice for such projects. According to the chip's datasheet, a suitable crystal oscillator and matching capacitors are selected to ensure proper crystal oscillation. Some signals require pull-up resistors, with a common value of 4.7kΩ chosen. The power input is also filtered before being input to ensure the chip does not malfunction due to excessive power ripple.

[0125] It should be noted that, as Figure 25As shown, the storage module uses the MX25L12833FM chip, which supports single-supply operation and latch protection. It uses the SPI protocol for fast read / write operations, and any module can be erased individually. Its capacity reaches 128 Mbit, which is more than sufficient for everyday needs.

[0126] It should be noted that, as Figure 26 As shown, the JTAG test interface circuit uses JTAG to implement functions such as program download, debugging, and viewing pin status.

[0127] It should be noted that the BOOT circuit, as Figure 27 As shown, the BOOT circuit refers to the pin of the microcontroller, whose main function is to determine the microcontroller's startup mode. After the microcontroller is powered on or reset, it first starts the internal crystal oscillator. On the fourth SysTick, the internal circuit of the microcontroller latches the value of the BOOT pin, that is, it saves the value of the BOOT pin, and then determines different startup modes based on the value of the BOOT pin.

[0128] It should be noted that the SD card interface is as follows: Figure 28 As shown, the choice of SD card is based on the user's needs, and the user decides on the model, storage capacity, etc.

[0129] It should be noted that, as Figure 29 , 30 As shown, the Wi-Fi and Bluetooth module uses a pre-built module, which can be used independently for either Bluetooth or Wi-Fi functionality, supporting 802.11a / b / g / n / ac. While using a module directly increases costs, it also reduces some circuit debugging work.

[0130] It should be noted that, as Figure 31 As shown, the I2S audio output circuit uses a 3.3V power supply. Because other modules share the same power supply, a zero-ohm resistor is used for connection. This serves both as isolation and as a fuse to protect the circuit, and also facilitates later disconnection from other parts for independent debugging. The audio section is a sensitive signal and susceptible to interference from other signals, so its ground is also isolated from other grounds using a zero-ohm resistor to ensure stable performance and the independence of this module.

[0131] It should be noted that, as Figure 32 As shown, the CAN (Controller Area Network) communication uses the SIT1040Q chip, which is used in trucks, buses, cars, industrial control and other fields. It can reach a speed of 1Mbps and has the ability to transmit differential signals between the bus and the CAN protocol controller.

[0132] It should be noted that, as Figure 33As shown, the radio circuit is primarily powered by a battery, which then supplies power to the RF connector via a linear regulator. The UM3202Q, as a dual-channel anti-ESD level converter, provides the necessary level conversion for data transmission in multi-voltage systems, meeting the radio's operational requirements. This part of the circuit also involves sensitive signals and needs to be isolated from other grounds.

[0133] It should be noted that, as Figure 34 As shown, the FSC-BT956B is used for the voice Bluetooth circuit module because it is a high-performance, highly integrated multimedia system-on-a-chip solution with Bluetooth audio functionality. Its specific features include Bluetooth v4.2, support for BR / EDR, UART programming and data interfaces (up to 921600bps baud rate), data interface compatibility supporting UART, GPIO, I2C, PWM, etc., and up to four PWM outputs. The CH442E is used to implement USB channel selection.

[0134] It should be noted that, as Figure 35 As shown, the audio channel uses the 74HC4052D logic chip, which is a dual 4-channel analog multiplexer / demultiplexer with low power consumption, low on-resistance, and high linearity.

[0135] It should be noted that, as Figure 36 As shown, the signal to be detected by the signal acquisition circuit is divided by resistors, filtered by capacitors, and then input to the main control chip via diodes. This circuit is a low-level acquisition circuit.

[0136] It should be noted that, as Figure 37 As shown, the reversing radar and camera power circuits are powered by the key start. The power control circuit used is similar to that of the WIFI analog circuit, but because the power supply is different, a diode is placed here for rectification and to prevent current backflow into the subsequent circuits.

[0137] It should be noted that, as Figure 38 As shown, the power amplifier module circuit uses the TDA7388, an AB-class audio power amplifier typically used in high-end automotive radio applications. It is based on a fully complementary PNP / NPN architecture. In configuration, the TDA7388 allows rail-to-rail operation. Its output voltage is not absolutely fixed but swings, therefore a bootstrap capacitor is not required. Because it is key-start powered, a simple filter circuit is needed for filtering, along with a series diode.

[0138] It should be noted that, as Figure 39As shown, the frequency source in a frequency output circuit is the core component for signal generation in various electronic systems. It is widely used in oscillators, modems, signal generators, and other devices to provide the necessary signals for various communication and control systems. In digital circuits and microprocessors, the frequency source provides a clock signal to ensure the synchronized operation of all parts of the system. A stable frequency source can improve the timing accuracy of the system, reduce errors, and enhance system reliability. In laboratory and engineering testing, the frequency source is used to generate standard signals to test and measure the characteristics and performance of circuits.

[0139] It should be noted that other signal detection interfaces, such as Figure 40 As shown, this part of the circuit is a socket used to connect signals transmitted by external sensors. The collected signals mainly include brake malfunction, driver / passenger seatbelt status, multimedia signals, etc.

[0140] In the above detailed description, various features are combined together in a single embodiment to simplify this disclosure. This approach to disclosure should not be construed as reflecting an intention that embodiments of the claimed subject matter require more features than are explicitly stated in each claim. Rather, as reflected in the appended claims, the present invention is in a state with fewer features than all of the disclosed individual embodiments. Therefore, the appended claims are hereby clearly incorporated into the detailed description, wherein each claim stands alone as a preferred embodiment of the present invention.

[0141] The disclosed embodiments have been described above to enable any person skilled in the art to implement or use this invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein can be applied to other embodiments without departing from the spirit and scope of this disclosure. Therefore, this disclosure is not limited to the embodiments given herein, but is consistent with the widest scope of the principles and novel features disclosed in this application.

[0142] The foregoing description includes examples of one or more embodiments. It is certainly impossible to describe all possible combinations of components or methods in order to describe the above embodiments, but those skilled in the art will recognize that further combinations and arrangements of the various embodiments are possible. Therefore, the embodiments described herein are intended to cover all such changes, modifications, and variations that fall within the scope of the appended claims. Furthermore, the term "comprising" as used in the specification or claims is interpreted in a manner similar to the term "including," as interpreted when used as a conjunction in the claims. Additionally, the use of any term "or" in the specification of the claims is intended to mean "non-exclusive or."

[0143] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of this utility model. It should be understood that the above description is only a specific embodiment of this utility model and is not intended to limit the scope of protection of this utility model. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this utility model should be included within the scope of protection of this utility model.

Claims

1. A PCB design structure for an automotive dashboard based on R5F10DPJ, characterized in that: It comprises a top layer (100), a power layer (200), a ground layer (300), and a bottom layer (400) stacked sequentially, wherein: The top layer (100) is used to arrange the MCU chip (110) and lay out power lines and high-speed signal lines; the power layer (200) is used to divide the power domain and lay out the power lines; the ground layer (300) is used to provide multiple reference ground planes and divide the ground network formed by the reference ground planes; the ground layer (300) is also used to lay out sensitive signal lines (310); the bottom layer (400) is used to lay out sockets (410), heat dissipation devices (420), interface modules (430) and plug-ins (440); the bottom layer (400) is also used for low-speed signal wiring.

2. The automotive dashboard PCB design structure based on R5F10DPJ according to claim 1, characterized in that: The crystal oscillator (111) of the peripheral circuit of the MCU chip (110) is placed on the left side of the MCU chip (110); the distance between the crystal oscillator (111) of the peripheral circuit and the disk pin of the MCU chip (110) is ≤0.6mm; the wiring order of the clock signal of the MCU chip (110) is resistor, load capacitor, crystal oscillator; a kill zone is set below the crystal oscillator (111) of the peripheral circuit; ground vias (112) are arranged around the bottom of the MCU chip (110) and the circuit periphery; a filter capacitor is set at each power supply pin of the MCU chip (110), and the distance between the power supply pin and the filter capacitor is ≤0.5mm.

3. The automotive dashboard PCB design structure based on R5F10DPJ according to claim 2, characterized in that: The power supply circuit (120) of the top layer (100) is arranged in a straight line and the distance between it and other circuits is 15mil~30mil; the feedback signal area (130) of the top layer (100) is arranged on the side away from the inductor area (140).

4. The automotive dashboard PCB design structure based on R5F10DPJ according to claim 3, characterized in that: The inductor area (140) is provided with an unshielded inductor; a prohibited area is provided below the unshielded inductor, where it is prohibited to place devices, lay copper, or make traces.

5. The automotive dashboard PCB design structure based on R5F10DPJ according to claim 1, characterized in that: The power layer (200) adopts a grid-shaped partitioning structure to divide the power domain into DVDD5V area (210), 3.3V area (220), AU3.3V area (230), 5V area (240) and 3.3VHD area (250); each power domain is connected by copper pour and via; the non-copper pour area uses thickened traces with a trace width of 10 mil to 30 mil.

6. The automotive dashboard PCB design structure based on R5F10DPJ according to claim 5, characterized in that: 3.3 A decoupling capacitor is arranged in the VHD area (250), and the distance between the decoupling capacitor and the high-frequency power supply is <100mil.

7. The automotive dashboard PCB design structure based on R5F10DPJ according to claim 1, characterized in that: The stratum (300) is routed using the sensitive signal line (310), and grounding shielding wires are provided on both sides of the sensitive signal line (310).

8. The automotive dashboard PCB design structure based on R5F10DPJ according to claim 7, characterized in that: The ground plane (300) is divided into different ground planes including GND (320), AGND (330), GND-AU (340) and EX_GND (350), and each ground plane is connected by a zero-ohm resistor; the traces of the ground plane (300) are distributed in a grid pattern and are not parallel to the traces of the power layer (200) and the bottom layer (400), respectively.

9. The automotive dashboard PCB design structure based on R5F10DPJ according to claim 1, characterized in that: The differential signal line (450) of the bottom layer (400) is routed on the bottom layer (400) through holes; the width of the high current path (460) of the bottom layer (400) is ≥0.5mm; the heat dissipation area of ​​the bottom layer (400) is punched with ground vias, the diameter of the ground vias of the heat dissipation area is 0.3mm and the hole spacing is 1mm; the filter capacitor is connected to the power supply pin through vias.

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