A solar cell and a photovoltaic module

By creating local PN junctions with opposite conductivity at local locations on the battery substrate, a parallel bypass diode structure is formed, which solves the problem of hot spot effect in semiconductor solar cells, simplifies the structure of photovoltaic modules, and improves the safety performance of batteries.

CN224538639UActive Publication Date: 2026-07-21ZHEJIANG DASHENG NEW ENERGY TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
ZHEJIANG DASHENG NEW ENERGY TECH CO LTD
Filing Date
2025-06-30
Publication Date
2026-07-21

AI Technical Summary

Technical Problem

Existing semiconductor solar cells are prone to hot spot effects when covered by shading objects, leading to problems such as module delamination and burning. Existing bypass diodes have complex structures and need to be improved.

Method used

By creating local PN junctions with opposite conductivity at local locations on the battery substrate, a parallel bypass diode structure is formed, which simplifies the photovoltaic module structure and protects the battery by conducting during hot spots.

Benefits of technology

It reduces the risk of hot spots, improves the safety performance of batteries, and simplifies the structural assembly of photovoltaic modules.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses a solar cell and photovoltaic module, through making opposite conductive polarity local PN junction in the partial position of cell base, form the PN junction structure of parallel bypass diode, help to simplify the structure of subsequent photovoltaic module, the convenient assembly forming, the local PN junction polarity with the cell base PN junction polarity formed by first doped semiconductor part and second doped semiconductor part is opposite, can form the bypass diode structure parallel with cell base, when the hot spot of cell occurs, the voltage of cell both ends is reversed, the voltage of local PN junction both ends formed by the contact of third doped semiconductor part and fourth doped semiconductor part is forward bias at this time, then the local PN junction is conducted, and the current passes through from this area to protect cell base, reduce the hot spot risk, improve the safety performance of cell.
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Description

Technical Field

[0001] This utility model relates to the field of battery technology, specifically to a solar cell and a photovoltaic module. Background Technology

[0002] Photovoltaic cells are currently the most widely used solar power generation technology. They generate electricity using the photovoltaic effect, which involves semiconductors forming a PN junction. In practical use, conventional semiconductor solar cells (such as mainstream crystalline silicon solar cells) may be obstructed by objects like bird droppings, leaves, and dust. This obstruction can cause localized temperature increases and hot spots. If the temperature of these hot spots exceeds a certain threshold, it can lead to problems such as photovoltaic module delamination, backsheet burning, and glass shattering, rendering the entire solar cell unusable and potentially posing a fire hazard.

[0003] Existing semiconductor solar cells generally do not have hot spot protection capabilities. They typically use external bypass diodes at the photovoltaic module end to reduce the risk of hot spots in the encapsulated cells inside the module. When a cell in the cell string is shaded and generates a hot spot effect, the parallel diode can conduct and shunt the current, reducing the current flowing through the cell in the string, thereby reducing the heat generation power of the shaded cell and controlling the hot spot temperature of the cell to some extent. However, this structure makes the photovoltaic module structure complex and needs to be improved. Utility Model Content

[0004] To address at least one of the aforementioned technical deficiencies, this utility model provides the following technical solution:

[0005] This application discloses a solar cell, including a cell substrate. The cell substrate includes a first doped semiconductor layer and a second doped semiconductor layer stacked and bonded together, with the first doped semiconductor layer and the second doped semiconductor layer having opposite conduction types. A local PN junction is provided at a central notch, a peripheral notch, or the periphery of the substrate. The local PN junction includes a third doped semiconductor layer and a fourth doped semiconductor layer stacked and bonded together, with the third doped semiconductor layer and the fourth doped semiconductor layer having opposite conduction types.

[0006] By creating local PN junctions with opposite conductivity at local locations on the battery substrate, a parallel bypass diode PN junction structure is formed, which helps simplify the structure of subsequent photovoltaic modules and facilitates assembly.

[0007] The polarity of this local PN junction is opposite to that of the PN junction of the battery substrate formed by the first and second doped semiconductor parts, thus forming a bypass diode structure connected in parallel with the battery substrate. When a hot spot occurs in the battery, the voltage across the battery terminals is reverse biased. At this time, the voltage across the local PN junction formed by the contact of the third and fourth doped semiconductor parts is forward biased, so the local PN junction is turned on, and the current flows through this region, thereby protecting the battery substrate, reducing the risk of hot spots, and improving the safety performance of the battery.

[0008] Furthermore, the first doped semiconductor layer has an N-type conductivity, the second doped semiconductor layer has a P-type conductivity, the third doped semiconductor layer has a P-type conductivity, and the fourth doped semiconductor layer has an N-type conductivity.

[0009] Furthermore, the first doped semiconductor layer has a P-type conductivity, the second doped semiconductor has an N-type conductivity, the third doped semiconductor has an N-type conductivity, and the fourth doped semiconductor has a P-type conductivity.

[0010] Furthermore, the first doped semiconductor layer and the third doped semiconductor layer are on the same plane, and the second doped semiconductor layer and the fourth doped semiconductor layer are on the same plane.

[0011] For local PN junctions at the middle notch, peripheral notch, or periphery of the substrate, if a single local PN junction is set, the length and other dimensions of the local PN junction can be selected according to the requirements. For example, the local PN junction at the periphery of the substrate can be the same length as the side it is located on. Of course, multiple local PN junctions can also be distributed at intervals, such as multiple local PN junctions distributed at intervals along the length or width direction of the substrate. For local PN junctions at the middle or peripheral notch of the substrate, refer to the setting of local PN junctions at the periphery of the substrate.

[0012] For example, preferably, multiple notches are provided at intervals in the middle or peripheral wall of the substrate, and local PN junctions are provided at the notches.

[0013] For example, preferably, a plurality of local PN junctions are arranged at intervals along the length direction of the side of the substrate.

[0014] The second aspect of this application discloses a photovoltaic module, including the aforementioned solar cell.

[0015] Compared with the prior art, the beneficial effects of this utility model are as follows:

[0016] 1. This utility model forms a PN junction directly at the battery substrate by doping the conductor layer with different conductivity types, forming a PN junction structure of a parallel bypass diode. On the one hand, this helps to simplify the structure of subsequent photovoltaic modules, and on the other hand, it helps to reduce the risk of hot spots in the battery and improve the safety performance of the battery. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of this utility model, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of the local PN junction distribution configuration in Example 1;

[0019] Figure 2 This is a schematic diagram of the local PN junction distribution configuration in Example 1;

[0020] Figure 3 This is a schematic diagram of the local PN junction distribution configuration in Example 1;

[0021] Figure 4 This is a schematic diagram of the local PN junction distribution configuration in Example 1;

[0022] Figure 5 This is a schematic diagram of the local PN junction distribution configuration in Example 1;

[0023] The attached figures are labeled as follows:

[0024] 01. First doped semiconductor layer; 02. Second doped semiconductor layer; 03. Third doped semiconductor layer; 04. Fourth doped semiconductor layer; 05. Local PN junction. Detailed Implementation

[0025] The present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0026] Example 1

[0027] Example 1

[0028] like Figures 1-5 As shown, in this example, a solar cell includes a cell substrate, which includes a first doped semiconductor layer 01 and a second doped semiconductor layer 02 stacked and bonded together. The first and second doped semiconductor layers are made of materials such as silicon substrate, germanium-silicon substrate, germanium substrate, or gallium arsenide substrate. The crystal phase of all doped semiconductor layers can be amorphous, microcrystalline, nanocrystalline, single crystal, or polycrystalline.

[0029] If the first doped semiconductor layer 01 and the second doped semiconductor layer 02 have opposite orientation types, then the first doped semiconductor layer 01 and the second doped semiconductor layer 02 will contact each other to form a PN junction.

[0030] In this example, a local PN junction 05 is placed around the substrate formed by the first doped semiconductor layer 01 and the second doped semiconductor layer 02. The local PN junction 05 may include a third doped semiconductor layer 03 and a fourth doped semiconductor layer 04, which are stacked and bonded together. Figure 1 As shown, the third doped semiconductor layer 03 and the first doped semiconductor layer 01 are on the same plane, and the fourth doped semiconductor layer 04 and the second doped semiconductor layer 02 are on the same plane. The third doped semiconductor layer 03 and the fourth doped semiconductor layer 04 have opposite conductivity types, and the third doped semiconductor layer 03 and the fourth doped semiconductor layer 04 are in contact to form a local PN junction 05. This local PN junction is of a single type, specifically as shown below. Figure 3 As shown, local PN junctions extend in a strip shape along the length of the side surface of the substrate around the substrate. Of course, multiple local PN junctions can also be distributed at intervals around the substrate along the length of the side surface of the substrate.

[0031] In addition, notches can be formed on the peripheral wall of the base, such as Figure 2 As shown, two notches are formed at intervals on the peripheral wall of the base, and local PN junctions are placed in the notches. Of course, more notches can be added and local PN junctions can be placed in them.

[0032] In addition, a notch can be formed in the middle of the base, such as Figure 4 , Figure 5 As shown, one or more notches are formed in the middle of the substrate, and local PN junctions are placed in the notches. The length, width, thickness, etc. of the local PN junctions can be selected according to the requirements.

[0033] Regarding the conductivity type of the first doped semiconductor layer, the second doped semiconductor layer, the third doped semiconductor layer, and the fourth doped semiconductor layer, for example, the conductivity type of the first doped semiconductor layer 01 is N-type, the conductivity type of the second doped semiconductor layer 02 is P-type, the conductivity type of the third doped semiconductor layer 03 is P-type, and the conductivity type of the fourth doped semiconductor layer 04 is N-type.

[0034] Alternatively, the first doped semiconductor layer 01 has a P-type conductivity, the second doped semiconductor layer 02 has an N-type conductivity, the third doped semiconductor layer 03 has an N-type conductivity, and the fourth doped semiconductor layer 04 has a P-type conductivity.

[0035] By creating PN junctions with opposite conduction polarities at local locations on the battery substrate, a parallel bypass diode PN junction structure is formed. This integrated structure helps simplify the subsequent photovoltaic module structure and facilitates assembly. This solar cell structure can provide bypass protection for the battery substrate, reduce the risk of hot spots, and improve the battery's safety performance.

[0036] Example 2

[0037] A photovoltaic module comprising the solar cell disclosed in Example 1.

[0038] The above are merely preferred embodiments of this utility model. The protection scope of this utility model is not limited to the above embodiments. All technical solutions falling within the scope of this utility model's concept are within its protection scope. It should be noted that for those skilled in the art, any improvements and modifications made without departing from the principle of this utility model should also be considered within its protection scope.

Claims

1. A solar cell, characterized in that, The substrate includes a first doped semiconductor layer (01) and a second doped semiconductor layer (02) stacked and bonded together, wherein the first doped semiconductor layer (01) and the second doped semiconductor layer (02) have opposite conduction types. A local PN junction (05) is provided at the middle notch, the peripheral wall notch, or the periphery of the substrate. The local PN junction (05) includes a third doped semiconductor layer (03) and a fourth doped semiconductor layer (04) stacked and bonded together, wherein the third doped semiconductor layer (03) and the fourth doped semiconductor layer (04) have opposite conduction types.

2. A solar cell as described in claim 1, characterized in that: The first doped semiconductor layer (01) has an N-type conductivity, the second doped semiconductor layer (02) has a P-type conductivity, the third doped semiconductor layer (03) has a P-type conductivity, and the fourth doped semiconductor layer (04) has an N-type conductivity.

3. A solar cell as described in claim 1, characterized in that: The first doped semiconductor layer (01) has a P-type conductivity, the second doped semiconductor layer (02) has an N-type conductivity, the third doped semiconductor layer (03) has an N-type conductivity, and the fourth doped semiconductor layer (04) has a P-type conductivity.

4. A solar cell as described in claim 1, characterized in that: The first doped semiconductor layer (01) and the third doped semiconductor layer (03) are on the same plane, and the second doped semiconductor layer (02) and the fourth doped semiconductor layer (04) are on the same plane.

5. A solar cell as described in claim 1, characterized in that: Multiple notches are provided at intervals in the middle or on the peripheral wall of the substrate, and a local PN junction (05) is provided at the notch.

6. A solar cell as described in claim 1, characterized in that: Multiple local PN junctions (05) are spaced apart along the length of the side of the substrate.

7. A photovoltaic module, characterized in that: Includes the solar cell according to any one of claims 1-6.