A heterojunction solar cell
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- JA SOLAR TECH YANGZHOU
- Filing Date
- 2025-07-18
- Publication Date
- 2026-07-21
Smart Images
Figure CN224538652U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to a heterojunction solar cell. Background Technology
[0002] Currently, the metal grid lines of heterojunction solar cells are mainly obtained through screen printing. That is, during the fabrication of heterojunction solar cells, metal electrodes are fabricated on the formed ITO. Currently, screen printing of silver paste / silver-coated copper paste is the primary method for fabricating metal electrodes for heterojunction solar cells. However, due to the relatively high cost of both ITO and silver paste, electroplating is being explored as a method to fabricate metal electrodes in order to control the cost of heterojunction solar cells.
[0003] Currently, the method of preparing metal electrodes for heterojunction solar cells by electroplating involves either combining a metal seed layer with a developing solution, a developing process, and an exposure process to form a mask in the area outside the metal seed layer, or using ink to create a mask in the area outside the metal seed layer so that the electroplating process only occurs in the metal seed layer.
[0004] The existing method of preparing metal electrodes for heterojunction solar cells using conventional exposure, development, and electroplating is not only complex and requires high precision, but also prone to foreign matter residue after the introduction of developer or ink, which can adversely affect the heterojunction solar cells. Utility Model Content
[0005] In view of this, the present invention provides a heterojunction solar cell. The preparation process of the heterojunction solar cell can avoid the use of cumbersome processes such as exposure and development. It can not only avoid the influence of foreign matter (developer or ink, etc.) remaining in the exposure and development process, and avoid the risk of yield loss caused by poor exposure and development process, but also reduce production costs. It is beneficial to improve the reliability of the metal electrode set in the heterojunction solar cell, and to improve the performance and yield of the heterojunction solar cell.
[0006] Specifically, this utility model provides the following technical solution:
[0007] This utility model provides a heterojunction solar cell, comprising:
[0008] Battery substrate;
[0009] A transparent conductive layer disposed on the main surface of the battery substrate;
[0010] A metal seed layer is spaced apart on the transparent conductive layer, the metal seed layer containing stacked metal particles;
[0011] A first dielectric layer is disposed on the transparent conductive layer and located in a region outside the metal seed layer;
[0012] A second dielectric layer is discontinuously disposed on the surface of the metal seed layer, such that the metal seed layer includes a plating failure area not covered by the second dielectric layer.
[0013] A fine-grained layer stacked on the second dielectric layer and the unplated area;
[0014] And an additional conductive layer stacked on the fine-grained layer.
[0015] The first aspect of the above-mentioned utility model has the following advantages or beneficial effects:
[0016] The heterojunction solar cell provided in this embodiment of the invention utilizes a metal seed layer containing stacked metal particles, a first dielectric layer disposed outside the metal seed layer, and a second dielectric layer scattered on the surface of some of the metal particles. This allows the transparent conductive layer to be completely covered by the first dielectric layer. The metal seed layer has unplated areas, and a fine-grained layer is then stacked on the second dielectric layer and the unplated areas. This allows the fine-grained layer and the transparent conductive layer to form a stable contact through the unplated areas. Consequently, the additional conductive layer stacked on the fine-grained layer can form a stable contact and electrical connection with the metal seed layer through the fine-grained layer. This eliminates the need for a mask, avoids cumbersome processes such as exposure and development, and avoids the risk of introducing foreign matter into the heterojunction solar cell due to exposure and development, as well as the risk of yield loss due to poor exposure and development.
[0017] In addition, the metal electrode is composed of a metal seed layer, a non-plating area, a fine grain layer and an additional conductive layer. The fine grain layer can ensure a stable electrical connection between the metal seed layer and the additional conductive layer, which effectively improves the reliability of the metal electrode of the heterojunction solar cell and is conducive to improving the performance and yield of the heterojunction solar cell.
[0018] In addition, by introducing a fine-grained layer, the gaps between the metal particles contained in the metal seed layer can be filled, and the missing plating area and the additional conductive layer can be electrically connected better, increasing the indirect contact area between the additional conductive layer and the metal seed layer. This can effectively reduce the line resistance and contact resistance of the metal electrode of the heterojunction solar cell, thereby improving the series resistance and photoelectric conversion efficiency of the heterojunction solar cell. Attached Figure Description
[0019] Figure 1 This is a partial cross-sectional structural schematic diagram of a heterojunction solar cell provided according to an embodiment of the present invention;
[0020] Figure 2 This is a partial cross-sectional structural schematic diagram of the first structure of a heterojunction solar cell provided according to an embodiment of the present invention;
[0021] Figure 3This is a partial cross-sectional structural schematic diagram of the second structure of a heterojunction solar cell provided according to an embodiment of the present invention;
[0022] Figure 4 This is a schematic diagram of the main process of a method for preparing a heterojunction solar cell according to an embodiment of the present invention;
[0023] Figure 5 This is a schematic diagram of the structural changes of the metal electrode corresponding to the preparation steps of this utility model embodiment;
[0024] Figure 6 This is a SEM image of the metal seed layer provided according to an embodiment of the present invention.
[0025] Figure label:
[0026] 10-Battery substrate; 11-Silicon wafer; 12-Front-side intrinsic amorphous silicon layer; 13-Front-side doped amorphous silicon layer; 20-Transparent conductive layer; 30-Metal seed layer; 41-First dielectric layer; 42-Second dielectric layer; 50-Unplated area; 60-Fine grain layer; 70-Additional conductive layer; 80-Conductive protective layer; 91-Back-side intrinsic amorphous silicon layer; 92-Back-side doped amorphous silicon layer; 93-Back-side passivation layer; 94-Back-side metal electrode. Detailed Implementation
[0027] Compared to other types of solar cells (such as TOPCon cells), the high cost of heterojunction solar cells is mainly due to the need for a relatively expensive and thick indium tin oxide (ITO) layer (typically, the ITO layer thickness on one side of a heterojunction solar cell is about 100 nm, and on both sides it is about 200 nm) and the consumption of a large amount of low-temperature silver paste (the unit price of low-temperature silver paste is higher than that of high-temperature silver paste and other metal pastes). Currently, in order to reduce the cost of heterojunction solar cells, a lower-cost copper is electroplated onto the printed metal seed layer. During the electroplating process, copper plating inevitably forms on the ITO layer outside the metal seed layer. Currently, to avoid copper plating on the ITO layer outside the metal seed layer, a developing mask is prepared on the ITO layer outside the metal seed layer using a combination of developing solution, developing process, and exposure process. Alternatively, other types of masks are prepared on the ITO layer outside the metal seed layer. This method of introducing a mask inevitably results in mask residue during the mask removal process. Mask residue can affect the performance of heterojunction solar cells, such as photoelectric conversion efficiency, stability, reliability, and lifespan. In addition, the method of setting the mask using a developing solution also has problems such as complex process steps, high cost, and low yield.
[0028] Further research revealed that in existing electroplating processes, copper is directly electroplated onto the metal seed layer. Due to the relatively large particle size of the metal particles contained in the metal seed layer (generally above 2μm), and the relatively large copper particles formed by the currently used acidic copper plating process (also generally above 2μm), there will be a large number of stacking gaps between the metal particles contained in the metal seed layer and the copper particles formed by electroplating. This will lead to high line resistance, poor tensile strength, and poor electrical stability and reliability of the metal electrode.
[0029] To address the aforementioned problems of existing heterojunction solar cells, this invention provides a novel heterojunction solar cell structure and its fabrication method.
[0030] In this embodiment of the invention, "one structure disposed on another structure" means that the one structure is located on the side of the other structure away from the battery substrate 10, and does not specifically mean that the structure is located above the other structure. For example, regarding the metal seed layer 30 disposed on the transparent conductive layer 20, if the metal seed layer 30 and the transparent conductive layer 20 are located on the back side of the heterojunction solar cell, then during the use of the heterojunction solar cell, the metal seed layer 30 is located below the transparent conductive layer 20; if the metal seed layer 30 and the transparent conductive layer 20 are located on the front side of the heterojunction solar cell, then during the use of the heterojunction solar cell, the metal seed layer 30 is located above the transparent conductive layer 20. Furthermore, "one structure disposed on another structure" can be in direct or indirect contact with the other structure. Indirect contact between one structure and another generally means that other structures may exist between the two structures.
[0031] It should be noted that the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first" and "second" may explicitly or implicitly include one or more of that feature. For example, in the embodiments of this utility model, "first" and "second" in the first dielectric layer 41 and the second dielectric layer 42 are used to distinguish the positions of the dielectric layers and the differences in the structure of the dielectric layers at different positions; they do not refer to the number or arrangement of the dielectric layers. Furthermore, in the description of this utility model, "multiple" means two or more, unless otherwise explicitly specified.
[0032] The embodiments of this utility model are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements or functional layers having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this utility model, and should not be construed as limiting this utility model.
[0033] in, Figures 1 to 3 This diagram shows a cross-sectional view of a heterojunction solar cell provided in an embodiment of the present invention. Figure 4 A schematic diagram showing the main process of fabricating heterojunction solar cells is provided. Figure 5 This diagram illustrates the structural changes of the metal electrode during the fabrication process. Figure 6 This image shows a scanning electron microscope (SEM) image of a portion of the surface of a heterojunction solar cell containing the metal electrode region.
[0034] like Figures 1 to 3 As shown, the heterojunction solar cell may include:
[0035] Battery substrate 10;
[0036] A transparent conductive layer 20 is disposed on the main surface of the battery substrate 10;
[0037] A metal seed layer 30 is spaced apart on the transparent conductive layer 20, and the metal seed layer 30 contains stacked metal particles;
[0038] The first dielectric layer 41 is disposed on the transparent conductive layer 20 and located in the region outside the metal seed layer 30;
[0039] The second dielectric layer 42 is discontinuously disposed on the surface of the metal seed layer 30, so that the metal seed layer 30 includes a plating gap 50 not covered by the second dielectric layer 42.
[0040] A fine-grained layer 60 is stacked on the second dielectric layer 42 and the unplated area 50;
[0041] And an additional conductive layer 70 stacked on the fine-grained layer 60.
[0042] Among them, such as Figures 1 to 3 As shown, the battery substrate 10 generally includes a monocrystalline silicon wafer 11, a front-side intrinsic amorphous silicon layer 12 formed on the main surface of the monocrystalline silicon wafer 11, and a front-side doped amorphous silicon layer 13 stacked on the front-side intrinsic amorphous silicon layer 12. It can be understood that... Figures 1 to 3 The main surface of the battery substrate 10 is shown as a polished surface only, but the main surface of the battery substrate 10 in the heterojunction solar cell provided in this embodiment can also be a textured surface. Additionally, the front intrinsic amorphous silicon layer 12 can be replaced with a front intrinsic microcrystalline silicon layer, and correspondingly, the front doped amorphous silicon layer 13 can be replaced with a front doped microcrystalline silicon layer.
[0043] It is worth noting that the transparent conductive layer 20 disposed on the main surface of the battery substrate 10 means that the transparent conductive layer 20 is located on the side of the front doped amorphous silicon layer 13 that is away from the front intrinsic amorphous silicon layer 12.
[0044] The metal seed layer 30, the fine grain layer 60, and the additional conductive layer 70 constitute part or all of the metal electrode.
[0045] Generally speaking, such as Figures 1 to 3 As shown, the transparent conductive layer 20, metal seed layer 30, first dielectric layer 41, second dielectric layer 42, plating gap 50, fine grain layer 60, and additional conductive layer 70 belong to the front side of the heterojunction solar cell. The back side of the heterojunction solar cell may include: a back intrinsic amorphous silicon layer 91, a back doped amorphous silicon layer 92, a back passivation layer 93, and a back metal electrode 94, wherein, as shown... Figure 2 As shown, the structure of the back metal electrode 94 is the same as that of the front metal electrode (including a metal seed layer 30, a first dielectric layer 41, a second dielectric layer 42, a plating gap 50, a fine grain layer 60, and an additional conductive layer 70); alternatively, it can also be as follows: Figure 3 As shown, the back metal electrode 94 is an existing metal electrode formed by conventional methods such as printing or electroplating. The front side of the heterojunction solar cell generally refers to the main surface facing sunlight during its use; the back side refers to the main surface facing away from sunlight. It should be noted that the aforementioned intrinsic amorphous silicon layer 91 on the back side can be replaced with an intrinsic microcrystalline silicon layer, and correspondingly, the back doped amorphous silicon layer 92 can be replaced with a back doped microcrystalline silicon layer.
[0046] against Figures 1 to 3 The provided heterojunction solar cell utilizes the combination of the stacked metal particles contained in the metal seed layer 30, the first dielectric layer 41 disposed in the area outside the metal seed layer 30, and the second dielectric layer 42 scattered on the surface of some of the metal particles. This allows the transparent conductive layer 20 to be completely covered by the first dielectric layer 41. The metal seed layer 30 has a plating gap 50. A fine grain layer 60 is stacked on the second dielectric layer 42 and the plating gap 50, and a stable contact can be formed between the fine grain layer 60 and the transparent conductive layer 20 through the plating gap 50. Thus, the additional conductive layer 70 stacked on the fine grain layer 60 can form a stable contact and electrical connection with the metal seed layer 30 through the fine grain layer 60. This eliminates the need for complex processes such as exposure and development, and also avoids the need to introduce masks through exposure and development processes. It also avoids the risk of introducing foreign matter into the heterojunction solar cell due to exposure and development, as well as the risk of yield loss due to poor exposure and development processes.
[0047] In addition, the metal electrode is composed of a metal seed layer, a non-plating area, a fine grain layer and an additional conductive layer. The fine grain layer can ensure a stable electrical connection between the metal seed layer and the additional conductive layer, which effectively improves the reliability of the metal electrode of the heterojunction solar cell and is conducive to improving the performance and yield of the heterojunction solar cell.
[0048] In addition, regarding Figures 1 to 3 The provided heterojunction solar cell, by introducing a fine-grained layer 60, can fill the gaps between the metal particles contained in the metal seed layer 30 and can better electrically connect the missing plating area 50 and the additional conductive layer 70, thereby increasing the indirect contact area between the additional conductive layer 70 and the metal seed layer 30. This can effectively reduce the line resistance and contact resistance of the metal electrode of the heterojunction solar cell, thereby improving the series resistance and photoelectric conversion efficiency of the heterojunction solar cell.
[0049] Furthermore, targeting Figures 1 to 3 The provided heterojunction solar cell, by introducing a fine-grained layer, has a relatively large effective contact area between the additional conductive layer 70 and the fine-grained layer 60, as well as between the fine-grained layer 60 and the metal seed layer 30, thereby effectively improving the adhesion and tensile strength of the metal electrode.
[0050] As described above, the various functional layers, including the transparent conductive layer 20, the metal seed layer 30, the first dielectric layer 41, the second dielectric layer 42, the underplating region 50, the fine grain layer 60, and the additional conductive layer 70, work together to improve the performance of the heterojunction solar cell. The structure of each functional layer also affects the coordination between them; the structure of each functional layer will be explained below.
[0051] The thickness of the transparent conductive layer 20 is generally set to 5nm to 150nm. For example, this thickness can be 5nm, 10nm, 15nm, 20nm, 25nm, 30nm, 35nm, 40nm, 45nm, 50nm, 60nm, 65nm, 70nm, 75nm, 80nm, 90nm, 100nm, 120nm, or 150nm. Preferably, the thickness of the transparent conductive layer 20 is 5nm to 100nm. Furthermore, the transparent conductive layer 20 can be an indium tin oxide (ITO) film, or a fluorine-doped tin oxide (FTO) layer, a tin oxide layer, a tungsten-doped indium oxide (IWO) layer, an indium cerium oxide (ICO) layer, an aluminum-doped zinc oxide layer, or a cerium-doped zinc oxide layer, etc. Compared to existing heterojunction solar cells that use a thickness of at least 100nm, this embodiment of the invention, due to the provision of the first dielectric layer 41, can reduce the thickness of the transparent conductive layer 20. This ensures uniform coverage of the transparent conductive layer 20 while reducing the cost of the transparent conductive layer and the amount of indium used, thereby reducing the cost of the heterojunction solar cell. Furthermore, the thinned transparent conductive layer, in conjunction with the first dielectric layer 41, can improve the light utilization efficiency of the solar cell.
[0052] Furthermore, regarding the aforementioned metal seed layer 30, in order to enable the metal seed layer 30 to have a suitable roughness and to make the surface of the metal seed layer 30 exhibit better granularity in order to ensure the compactness of the fine grain layer 60, this embodiment of the present invention obtains this by adjusting the diameter of the metal particles contained in the metal seed layer 30 and / or the thickness of the metal seed layer 30.
[0053] Specifically, in the heterojunction solar cell provided in this embodiment of the present invention, the diameter of the metal particles contained in the metal seed layer 30 is generally controlled between 0.5 μm and 20 μm. For example, the diameter of the metal particles contained in the metal seed layer 30 can be 0.5 μm, 1 μm, 2 μm, 2.2 μm, 2.5 μm, 2.8 μm, 3 μm, 3.3 μm, 3.5 μm, 3.7 μm, 4 μm, 4.1 μm, 4.3 μm, 4.5 μm, 4.8 μm, 5 μm, 7 μm, 9 μm, 10 μm, 12 μm, 15 μm, 18 μm, or 20 μm, etc. By controlling the diameter of the metal particles, the surface roughness of the metal seed layer 30 can be effectively improved during the formation of the second dielectric layer 42. Furthermore, the area of the missed plating region 50 can be effectively controlled by utilizing the metal particles on the surface of the metal seed layer 30 during the formation of the second dielectric layer 42, thereby increasing the effective contact area between the fine-grained layer 60 and the metal seed layer 30. It is worth noting that in the same metal electrode of the same heterojunction solar cell, the diameter of the metal particles contained in the metal seed layer 30 is not limited to one type; that is, the metal seed layer 30 can contain metal particles of multiple diameters within the same metal electrode, meaning the size of the metal particles contained in the metal seed layer 30 is uneven. By controlling the metal seed layer 30 to contain metal particles of multiple diameters, on the one hand, the surface roughness of the metal seed layer 30 and the diversity of the curved surfaces on the surface of the metal seed layer 30 can be improved, which helps to increase the area of the missed plating region 50; on the other hand, the metal seed layer 30 can have a wider process window, effectively reducing the process difficulty of forming the metal seed layer 30.
[0054] Furthermore, the thickness of the metal seed layer 30 is generally controlled between 0.5 μm and 20 μm. For example, the thickness of the metal seed layer 30 can be 0.5 μm, 1 μm, 2 μm, 2.5 μm, 4 μm, 5 μm, 6 μm, 8 μm, 10 μm, 12 μm, 15 μm, 18 μm, or 20 μm, etc. In this embodiment of the invention, the thickness of the metal seed layer 30 is matched with the diameter of most of the metal particles in the metal seed layer 30. Generally, the number of stacked metal particles in the thickness direction of the metal seed layer 30 generally does not exceed 5, so as to effectively improve the surface roughness of the metal seed layer 30 and the area of the unplated region 50 on the surface of the metal seed layer 30.
[0055] Furthermore, this embodiment of the invention controls the width of the metal electrode in the heterojunction solar cell provided by adjusting the width of the metal seed layer 30, thereby ensuring the conductivity and reliability of the metal electrode. Specifically, the width of the metal seed layer 30 is generally 5μm to 80μm. For example, the width of the metal seed layer 30 can be 5μm, 10μm, 12μm, 15μm, 16μm, 18μm, 20μm, 25μm, 30μm, 40μm, 55μm, 70μm, or 80μm, etc. Further, the width of the metal seed layer 30 is matched with the diameter of the metal particles contained in the metal seed layer 30 and the thickness of the metal seed layer, which helps to reduce the resistance loss of the metal electrode formed based on the metal seed layer 30. It is worth noting that the width of the metal seed layer 30 is preferably in the range of 5μm to 40μm. The width of the metal seed layer can be even wider. For example, the width of the metal seed layer 30 printed from copper paste can be 70μm to 80μm, such as 70μm, 72μm, 75μm or 80μm.
[0056] The metal seed layer 30 may include one or more of silver, copper, nickel, aluminum, and titanium. Specifically, the metal seed layer 30 can be formed by coating and curing a paste containing one or more of silver, copper, nickel, aluminum, and titanium. Preferably, the metal seed layer 30 is formed by coating and curing a silver-coated copper paste or a copper paste. The metal seed layer 30 can also be formed by physical vapor deposition using a mask with one or more of silver, copper, nickel, aluminum, and titanium. When using a silver-coated copper paste to form the metal seed layer 30, a silver-coated copper paste with a silver content of less than 30% is preferred. This coating can be done using existing solar cell manufacturing processes such as printing, spraying, laser transfer, thermal transfer, or inkjet printing. This silver-coated copper paste or copper paste is a low-cost and commonly used raw material for metal electrodes in solar cells, effectively controlling the production cost of the metal seed layer 30. In addition, the metal seed layer 30 is formed using existing solar cell production processes, which can be directly completed using existing solar cell production lines or equipment, effectively reducing the equipment investment cost of the heterojunction solar cell provided in this embodiment of the present invention.
[0057] Furthermore, the first dielectric layer 41 is generally formed of a material with high resistivity or insulating properties. For example, the first dielectric layer 41 may include one or more of the following materials:
[0058] The materials used in the first dielectric layer 41 include silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium nitride, titanium oxide, fluorine-doped tin oxide (SnO2:F), cadmium stannate (Cd2SnO3), or tin oxide. Additionally, the material included in the first dielectric layer 41 can also be a tantalum-based material. For example, the first dielectric layer 41 can be tantalum-doped titanium oxide (TiO2:Ta) or similar materials containing tantalum-based materials and titanium oxide.
[0059] In addition, the second dielectric layer 42 is generally also formed of a material with high resistivity or insulation. For example, the second dielectric layer 42 may include one or more of the following materials:
[0060] Silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium nitride, titanium oxide, fluorine-doped tin oxide (SnO2:F), CdSnO4, or tin oxide. Additionally, the material included in the first dielectric layer 41 can also be other tantalum-based materials. For example, the second dielectric layer 42, for materials containing tantalum-based materials and titanium oxide, can be tantalum-doped titanium oxide (TiO2:Ta), etc.
[0061] It is worth noting that when the first dielectric layer 41 and the second dielectric layer 42 are located on the front side of the heterojunction solar cell, the first dielectric layer 41 and the second dielectric layer 42 are transparent films to ensure the light utilization rate of the heterojunction solar cell.
[0062] The thickness of the first dielectric layer 41 is typically 5 nm to 200 nm. For example, the thickness of the first dielectric layer 41 can be 5 nm, 8 nm, 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, 40 nm, 50 nm, 80 nm, 100 nm, 110 nm, 130 nm, 150 nm, 170 nm, 180 nm, 190 nm, or 200 nm. By controlling the thickness of the first dielectric layer 41, it can completely cover and isolate the area outside the metal seed layer 30 of the transparent conductive layer 20. This prevents the formation of conductive material outside the metal seed layer 30 of the transparent conductive layer 20 during the formation of the fine-grained layer 60 and the additional conductive layer 70. On one hand, the first dielectric layer 41 can compensate for the reduced thickness of the transparent conductive layer 20, ensuring complete coverage of the main surface of the battery substrate 10. On the other hand, the first dielectric layer 41 has a passivation effect, which helps to improve the photoelectric conversion efficiency of the heterojunction solar cell.
[0063] Furthermore, the thickness of the second dielectric layer 42 can be 5nm to 200nm. For example, the thickness of the first dielectric layer 41 can be 5nm, 8nm, 10nm, 15nm, 20nm, 25nm, 30nm, 40nm, 50nm, 80nm, 100nm, 110nm, 130nm, 150nm, 170nm, 180nm, 190nm, or 200nm, etc. On one hand, the thickness of the second dielectric layer 42 is determined by the thickness of the first dielectric layer 41; on the other hand, controlling the thickness of the second dielectric layer 42 can effectively ensure the existence of the unplated area 50.
[0064] More specifically, the first dielectric layer 41 and the second dielectric layer 42 are formed simultaneously. The first dielectric layer 41 and the second dielectric layer 42 can be formed by physical vapor deposition (PVD), plasma-enhanced chemical vapor deposition (PECVD), atmospheric pressure chemical vapor deposition (APCVD), or evaporation. Preferably, the first dielectric layer 41 and the second dielectric layer 42 are deposited at a temperature between 60°C and 250°C. For example, the deposition temperature can be 60°C, 70°C, 80°C, 100°C, 120°C, 150°C, 180°C, 200°C, 220°C, or 250°C. Because the surface roughness and state of the transparent conductive layer 20 and the metal seed layer 30 are completely different, during the simultaneous formation of the first dielectric layer 41 and the second dielectric layer 42, it can be ensured that the first dielectric layer 41 completely covers the area of the transparent conductive layer 20 outside the metal seed layer 30, and an unplated area 50 can exist on the surface of the metal seed layer 30. In addition, by simultaneously forming the first dielectric layer 41 and the second dielectric layer 42, the introduction of a mask can be avoided, the fabrication process can be reduced, and the fabrication complexity of the first dielectric layer 41 and the second dielectric layer 42 can be reduced. This helps to improve the photoelectric conversion efficiency of heterojunction solar cells while effectively improving the yield of heterojunction solar cells.
[0065] Further, regarding the fine-grained layer 60, the diameter of the grains contained in the fine-grained layer 60 is 0.03 μm to 1 μm. Exemplarily, the diameter of the grains contained in the fine-grained layer 60 can be 0.03 μm, 0.05 μm, 0.08 μm, 0.1 μm, 0.15 μm, 0.2 μm, 0.5 μm, 0.55 μm, 0.65 μm, 0.8 μm, 0.9 μm, or 1 μm, etc. Preferably, the grain diameter is 0.03 μm to 0.1 μm. More preferably, the grain diameter is 0.03 μm to 0.05 μm. Exemplarily, the grain diameter can be 0.03 μm, 0.04 μm, 0.05 μm, 0.06 μm, 0.07 μm, 0.08 μm, 0.09 μm, or 0.1 μm, etc. By controlling the diameter of the grains contained in the fine grain layer 60, it is ensured that the fine grain layer 60 can fill the gaps between the missing plating area 50 and the metal particles contained in the metal seed layer 30 relatively well, which helps to reduce the line resistance and contact resistance of the metal electrode formed based on the metal seed layer 30.
[0066] Furthermore, the thickness of the fine-grained layer 60 is generally greater than or equal to 0.1 μm, and less than or equal to 2 μm. For example, the thickness of the fine-grained layer 60 can be 0.1 μm, 0.3 μm, 0.5 μm, 0.6 μm, 0.8 μm, 0.9 μm, 1 μm, 1.2 μm, 1.4 μm, 1.5 μm, 1.6 μm, 1.8 μm, 1.9 μm, or 2 μm, etc. By controlling the thickness of the fine-grained layer 60, it can be ensured that the fine-grained layer 60 can completely cover the under-plating area 50 as much as possible. This allows the under-plating area 50 of the metal seed layer 30, the fine-grained layer 60, and the additional conductive layer 70 to work together, improving the reliability of the metal electrode formed based on the metal seed layer 30, as well as the contact resistance and line resistance of the metal electrode. It also effectively controls the cost of the heterojunction solar cell.
[0067] The fine-grained layer 60 may include one or more of copper, silver, tin, cobalt, nickel, and aluminum.
[0068] The aforementioned fine-grained layer 60 is generally formed by electroless plating or electroplating. The metal ions in the selected electroless or electroplating solution, after oxidation-reduction, form relatively small grains (diameter in the range of 0.03 μm to 1 μm) with orderly grain packing. Furthermore, the electroless or electroplating solution is generally neutral, weakly acidic, or weakly alkaline. For example, the plating type for the fine-grained layer 60 can be any one or a combination of electroless nickel plating, electroless copper plating, electroless silver plating, electroplating nickel, copper pyrophosphate plating, other alkaline copper plating, or electroplating silver. Further, the plating type used to form the fine-grained layer 60 may include a complexing agent, which coordinates with the metal ions, reducing the metal ion dissociation rate and the rate of metal ion grain formation, thereby effectively controlling the grain size of the fine-grained layer 60. Furthermore, for the electroplating to form the fine-grained layer 60, a low current density is generally used. For example, the current density is higher than 0.1 ASD (amperes per square foot) and lower than 5 ASD. For instance, the current density can be 0.5 ASD, 1 ASD, 1.5 ASD, 1.8 ASD, 2 ASD, 2.5 ASD, 3 ASD, 4 ASD, or 4.5 ASD, etc. Preferably, the current density is higher than 0 ASD and lower than 2 ASD. For instance, the current density can be 0.1 ASD, 0.2 ASD, 0.5 ASD, 0.8 ASD, 1 ASD, 1.2 ASD, 1.5 ASD, or 1.8 ASD, etc.
[0069] Furthermore, the thickness of the additional conductive layer 70 can be 2μm to 40μm. For example, the thickness of the additional conductive layer 70 can be 2μm, 4μm, 5μm, 6μm, 7μm, 8μm, 10μm, 15μm, 18μm, 20μm, 25μm, 28μm, 30μm, 35μm, 38μm, or 40μm, etc. By controlling the thickness of the conductive layer 70, the contact area between the additional conductive layer 70 and the fine-grained layer 60 can be effectively guaranteed, reducing the contact resistance of the metal electrode and improving the tensile strength, stability, and reliability of the metal electrode.
[0070] The additional conductive layer 70 typically contains grains with larger sizes than the fine-grained layer 60. By controlling the grain size of the additional conductive layer 70, a wider process window can be achieved, reducing the operational difficulty of the additional conductive layer 70, simplifying the process, lowering operating costs, improving the yield of heterojunction solar cells, and effectively reducing the cost of heterojunction solar cells. More specifically, the additional conductive layer 70 is composed of copper and / or silver.
[0071] Specifically, the additional conductive layer 70 can be formed by electroplating. More specifically, the electroplating current density typically used to form the additional conductive layer 70 is 2 ASD to 20 ASD. For example, the electroplating current density can be 2 ASD, 4 ASD, 5 ASD, 8 ASD, 10 ASD, 12 ASD, 15 ASD, 18 ASD, or 20 ASD, etc. Further, the temperature used for electroplating to form the additional conductive layer 70 is typically 20°C to 40°C. For example, the temperature can be 20°C, 22°C, 25°C, 28°C, 30°C, 35°C, 38°C, or 40°C, etc. With this electroplating current density, the additional conductive layer 70 can be formed using existing low-cost plating agents. For example, the plating agent used to form the additional conductive layer 70 can be acidic copper plating such as acidic copper sulfate, and the copper content in this plating agent can be arbitrary.
[0072] Furthermore, the heterojunction solar cell may also include a conductive protective layer 80 stacked on the outside of the additional conductive layer 70. This conductive protective layer 80 can protect the additional conductive layer 70, prevent oxidation of the additional conductive layer 70, and effectively improve the conductivity of the metal electrode.
[0073] The conductive protective layer 80 may contain tin grains, copper grains, or silver grains. Generally, the grain size contained in the conductive protective layer 80 is smaller than the grain size contained in the additional conductive layer 70, and the grain size contained in the conductive protective layer 80 is larger than the grain size contained in the fine grain layer 60. This ensures that the conductive protective layer 80 can completely cover the additional conductive layer 70 and reduces the manufacturing process difficulty of the conductive protective layer 80.
[0074] For example, the thickness of the conductive protective layer 80 is generally 0.5 μm to 5 μm. For instance, the thickness of the conductive protective layer 80 can be 0.5 μm, 1 μm, 1.5 μm, 2 μm, 2.5 μm, 3 μm, 3.5 μm, 4 μm, 4.5 μm, or 5 μm, etc. More specifically, for the conductive protective layer 80 containing tin grains, if the conductive protective layer 80 is obtained by electroplating, its thickness is generally 0.5 μm to 5 μm; if the conductive protective layer 80 is obtained by chemical plating, its thickness is generally 0.5 μm to 1 μm. For example, the thickness of the conductive protective layer 80 can be 0.5 μm, 0.6 μm, 0.7 μm, 0.8 μm, 0.9 μm, or 1 μm, etc. For the conductive protective layer 80 containing silver grains, whether it is obtained by electroplating or electroless plating, its thickness is generally 0.5μm~3μm. For example, the thickness of the conductive protective layer 80 can be 0.5μm, 1μm, 1.5μm, 2μm, 2.5μm or 3μm.
[0075] Furthermore, this embodiment of the invention also provides a method for fabricating a heterojunction solar cell. For example... Figure 4As shown, the fabrication method of this heterojunction solar cell may include the following steps:
[0076] Step S401: Prepare a transparent conductive layer 20 on the battery substrate 10.
[0077] This step can employ existing techniques (such as chemical vapor deposition) to prepare the transparent conductive layer 20. Unlike existing transparent conductive layers, the transparent conductive layer 20 prepared in this step is a thinned film, with a thickness ranging from 5 nm to 150 nm. For example, the thickness can be 5 nm, 10 nm, 15 nm, 20 nm, 25 nm, 30 nm, 32 nm, 35 nm, 40 nm, 43 nm, 45 nm, 48 nm, 50 nm, 60 nm, 65 nm, 70 nm, 80 nm, 90 nm, 100 nm, 120 nm, or 150 nm. Preferably, the thickness of the transparent conductive layer 20 prepared in this step is 5 nm to 100 nm. The transparent conductive layer 20 can be an indium tin oxide (ITO) film, or a fluorine-doped tin oxide (FTO) layer, a tin oxide layer, a tungsten-doped indium oxide (IWO) layer, an indium cerium oxide (ICO) layer, an aluminum-doped zinc oxide layer, or a cerium-doped zinc oxide layer, etc. For example, if the transparent conductive layer 20 is an ITO film, it may include, but is not limited to, ITO991, ITO973, or ITO9010.
[0078] Step S402: Prepare a metal seed layer 30 containing stacked metal particles at intervals on the transparent conductive layer 20.
[0079] For example, the structure of the metal seed layer 30 obtained after this step is as follows: Figure 5 As shown.
[0080] This step can be achieved by coating the transparent conductive layer 20 at intervals and then curing it. Alternatively, it can be formed using a mask and physical vapor deposition. For the coating method, commonly used methods such as inkjet printing, spraying, laser transfer, and thermal transfer can be employed. The coating paste generally contains one or more of silver, copper, nickel, aluminum, and titanium. Preferably, the coating paste is a silver-coated copper paste or a copper paste; for the silver-coated copper paste, a silver content of less than 30% can be selected. Furthermore, the coating process is generally carried out with a stencil to control the coating position, width, and thickness of the metal seed layer 30. The wet weight of the printed paste after curing generally decreases by more than 20%, and the wet weight decrease is less than 90%. For example, the wet weight of the printed paste after curing may decrease by 25%, 30%, 40%, 50%, 80%, or 90%, etc. For the formation of a transparent conductive layer 20 by physical vapor deposition using a mask, the selected paste generally contains one or more of silver, copper, nickel, aluminum, and titanium.
[0081] Further, the thickness of the slurry applied in this step is generally 1.5 μm to 30 μm, preferably 1.5 μm to 5 μm. The thickness of the metal seed layer 30 obtained after curing is generally 0.5 μm to 20 μm. Preferably, the thickness of the metal seed layer 30 obtained after curing is 0.5 μm to 2 μm. Exemplarily, the height of the applied slurry can be 1.5 μm, 3 μm, 4 μm, 5 μm, 10 μm, 15 μm, 20 μm, 25 μm, or 30 μm, etc. The thickness of the metal seed layer 30 obtained after curing can be 0.5 μm, 1 μm, 2 μm, 5 μm, 8 μm, 10 μm, 12 μm, 15 μm, 18 μm, or 20 μm, etc.
[0082] The width of the slurry printed in this step is generally 7μm to 90μm. The width of the formed metal seed layer 30 can be 5μm to 80μm. For example, the width of the slurry printed in this step is 7μm, 12μm, 17μm, 19μm, 22μm, 25μm, 28μm, 30μm, 35μm, 40μm, 43μm, 45μm, 50μm, 60μm, 80μm, 85μm, or 90μm, etc. The width of the metal seed layer 30 can be 5μm, 8μm, 10μm, 12μm, 15μm, 18μm, 20μm, 25μm, 30μm, 35μm, 40μm, 50μm, 55μm, 60μm, 70μm, or 80μm, etc.
[0083] The metal seed layer 30 formed in this step contains metal particles with uneven sizes, which effectively improves the surface roughness and surface diversity of the metal seed layer 30, thereby reducing the area of the second dielectric layer 42 prepared subsequently, and increasing the area of the subsequently obtained under-plating area 50.
[0084] Further, the curing temperature in this step is generally 80℃~250℃. For example, the curing temperature can be 80℃, 90℃, 100℃, 110℃, 120℃, 140℃, 150℃, 180℃, 200℃, 220℃, or 250℃, etc. The curing time can be 2min~30min, preferably 2min~10min. For example, the curing time can be 2min, 4min, 5min, 7min, 9min, 10min, 15min, 18min, 20min, 25min, 28min, or 30min, etc.
[0085] Step S403: A first dielectric layer 41 is formed in the area outside the metal seed layer 30 in the transparent conductive layer 20, and a second dielectric layer 42 is formed on the metal seed layer 30 in a discontinuous manner, so that the metal seed layer 30 includes a plating failure area 50 not covered by the second dielectric layer 42.
[0086] For example, the structure of the second dielectric layer 42 covering the metal seed layer 30 and the unplated area 50 not covered by the second dielectric layer 42 obtained after this step is as follows: Figure 5 As shown.
[0087] This step forms a second dielectric layer 42 on the metal seed layer 30 by deposition (such as PECVD, PVD, APCVD or evaporation), and forms a first dielectric layer 41 in the transparent conductive layer 20 outside the metal seed layer 30. Due to the difference between the surface of the metal seed layer 30 and the surface of the transparent conductive layer 20, differentiated dielectric layers can be deposited simultaneously on the surface of the metal seed layer 30 and the surface of the transparent conductive layer 20.
[0088] The materials used to form the first dielectric layer 41 and the second dielectric layer 42 in this step are generally high-resistivity or insulating materials. For example, the material can be silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium nitride, titanium oxide, fluorine-doped tin oxide (SnO2:F), cadmium stannate (Cd2SnO3), or tin oxide. Additionally, the material included in the first dielectric layer 41 can also be a tantalum-based material. For example, the first dielectric layer 41, for materials containing tantalum-based materials and titanium oxide, can be tantalum-doped titanium oxide (TiO2:Ta), etc.
[0089] Deposition temperatures generally range from room temperature to 250°C. For example, deposition temperatures can be 60°C, 70°C, 80°C, 100°C, 120°C, 150°C, 180°C, 200°C, 220°C, or 250°C.
[0090] Because the surface roughness and state of the transparent conductive layer 20 and the metal seed layer 30 are completely different, during the simultaneous formation of the first dielectric layer 41 and the second dielectric layer 42, it can be ensured that the first dielectric layer 41 can completely cover the area outside the metal seed layer 30 of the transparent conductive layer 20, and there can be a missed plating area 50 on the surface of the metal seed layer 30. In addition, by simultaneously forming the first dielectric layer 41 and the second dielectric layer 42, the introduction of a mask can be avoided, the fabrication steps can be reduced, and the fabrication complexity of the first dielectric layer 41 and the second dielectric layer 42 can be reduced. This helps to improve the photoelectric conversion efficiency of heterojunction solar cells while effectively improving the yield of heterojunction solar cells.
[0091] Furthermore, the thickness of the first dielectric layer 41 and the second dielectric layer 42 formed in this step is generally 5nm to 200nm. For example, the thickness of the first dielectric layer 41 and the second dielectric layer 42 can be 5nm, 7nm, 10nm, 15nm, 20nm, 25nm, 30nm, 40nm, 50nm, 80nm, 100nm, 110nm, 130nm, 150nm, 170nm, 180nm, 190nm, or 200nm, etc.
[0092] Step S404: Form a fine-grained layer 60 on the metal seed layer 30.
[0093] For example, the fine-grained layer 60 structure obtained after this step, covering the metal seed layer 30, is as follows: Figure 5 As shown.
[0094] This step involves forming a fine-grained layer 60 through electroplating or electroless plating. Specifically, the metal ions in the electroless plating or electroplating solution used to form the fine-grained layer 60, after oxidation and reduction, result in relatively small grains (diameter in the range of 0.03 μm to 1 μm) with orderly grain packing. Furthermore, the electroless plating or electroplating solution is generally neutral, weakly acidic, or weakly alkaline. For example, the composition of the fine-grained layer 60 may include one or more of copper, silver, tin, cobalt, nickel, and aluminum. Preferably, the solution used for electroless plating or electroplating may be any one or a combination of electroless nickel plating, electroless copper plating, electroless silver plating, electroplating nickel, copper pyrophosphate plating, other alkaline copper plating, or electroplating silver. Preferably, the plating agent used in this step is an alkaline copper plating agent, such as copper pyrophosphate or copper citrate. Introducing a complexing agent into the plating agent slows down the ionization of metal ions (such as copper ions), which helps to form small grains and makes the crystallization finer.
[0095] Furthermore, in this step, a low current density is generally used for electroplating to form the fine-grained layer 60. For example, the current density is higher than 0.1 ASD (amperes per square foot) and lower than 5 ASD. For instance, the current density can be 0.1 ASD, 0.3 ASD, 0.5 ASD, 1 ASD, 1.5 ASD, 1.8 ASD, 2 ASD, 2.5 ASD, 3 ASD, 4 ASD, or 5 ASD, etc. Preferably, the current density is higher than 0.1 ASD and lower than 2 ASD. For instance, the current density can be 0.1 ASD, 0.2 ASD, 0.5 ASD, 0.8 ASD, 1 ASD, 1.2 ASD, 1.5 ASD, 1.8 ASD, or 2 ASD, etc.
[0096] Furthermore, the grain diameter of the fine-grained layer 60 formed in this step is generally 0.03 μm to 1 μm. Exemplarily, the grain diameter of the fine-grained layer 60 can be 0.03 μm, 0.05 μm, 0.08 μm, 0.1 μm, 0.15 μm, 0.2 μm, 0.5 μm, 0.55 μm, 0.65 μm, 0.8 μm, 0.9 μm, or 1 μm, etc. Preferably, the grain diameter is 0.03 μm to 0.1 μm. More preferably, the grain diameter is 0.03 μm to 0.05 μm. Exemplarily, the grain diameter can be 0.03 μm, 0.04 μm, 0.05 μm, 0.06 μm, 0.07 μm, 0.08 μm, 0.09 μm, or 0.1 μm, etc. By controlling the diameter of the grains contained in the fine grain layer 60, it is ensured that the fine grain layer 60 can fill the gaps between the missing plating area 50 and the metal particles contained in the metal seed layer 30 relatively well, which helps to reduce the line resistance and contact resistance of the metal electrode formed based on the metal seed layer 30.
[0097] Furthermore, the thickness of the fine-grained layer 60 formed in this step is generally greater than or equal to 0.1 μm, and less than or equal to 2 μm. For example, the thickness of the fine-grained layer 60 can be 0.1 μm, 0.3 μm, 0.5 μm, 0.6 μm, 0.8 μm, 0.9 μm, 1 μm, 1.2 μm, 1.4 μm, 1.5 μm, 1.6 μm, 1.8 μm, 1.9 μm, or 2 μm, etc. By controlling the thickness of the fine-grained layer 60, it can be ensured that the fine-grained layer 60 can completely cover the under-plating area 50 as much as possible. This allows the under-plating area 50 of the metal seed layer 30, the fine-grained layer 60, and the additional conductive layer 70 to work together, improving the reliability of the metal electrode formed based on the metal seed layer 30, as well as the contact resistance and line resistance of the metal electrode. It also effectively controls the cost of the heterojunction solar cell.
[0098] For example, in this embodiment of the invention, copper citrate is selected as the plating agent. The electroplating solution formulation may include 5 g / L to 20 g / L of copper ions, 100 g / L to 200 g / L of citric acid, 2 mL / L to 5 mL / L of complexing agent, and 5 mL / L to 10 mL / L of additives. The complexing agent can be a commercially available complexing agent capable of complexing with copper ions. The additives may be commonly used additives for copper electroplating (such as brighteners like sodium dodecyl sulfate, hexadecyltrimethyl betaine, or polyoxyethylene dodecyl ether, surfactants like alkyl aryl sulfonates, anionic wetting agents like sodium dodecyl sulfate, degreasing agents, leveling agents, etc.). The type of complexing agent and the type of additives are not limited here. Exemplarily, the mass-volume concentration of copper ions in the electroplating solution formulation may be 5 g / L, 8 g / L, 10 g / L, 12 g / L, 15 g / L, 18 g / L, or 20 g / L, etc. The electroplating solution formulation may include citric acid at concentrations of 100 g / L, 120 g / L, 130 g / L, 150 g / L, 170 g / L, 180 g / L, or 200 g / L. The complexing agent may be present at concentrations of 2 mL / L, 3 mL / L, 4 mL / L, or 5 mL / L. The additives may be present at concentrations of 5 mL / L, 6 mL / L, 7 mL / L, or 10 mL / L.
[0099] The electroplating process of this invention preferably uses pulsed power electroplating to further control the grain size of the fine grain layer 60. Specifically, an electroplating solution containing metal ions and a complexing agent is combined with pulsed electroplating to form the fine grain layer 60 on the metal seed layer 30, thereby controlling the grain size contained in the fine grain layer 60.
[0100] Step S405: An additional conductive layer 70 is formed on the fine-grained layer 60.
[0101] Specifically, this step involves forming an additional conductive layer 70 on the fine-grained layer 60 via electroplating. For example, the structure of the additional conductive layer 70 covering the fine-grained layer 60 obtained after this step is as follows: Figure 5 As shown. The additional conductive layer 70 is composed of copper and / or silver.
[0102] When the fine-grained layer 60 contains copper grains, copper electroplating is preferred in this step because copper has the closest electrical conductivity to copper and is inexpensive. Furthermore, considering the tolerance of heterojunction solar cells, the complexity of the process and operation, and cost, acidic copper sulfate plating is preferred in this step because it is simple and has low operating costs.
[0103] More specifically, the electroplating current density typically used to form the additional conductive layer 70 is 2 ASD to 20 ASD. For example, the electroplating current density can be 2 ASD, 4 ASD, 5 ASD, 8 ASD, 10 ASD, 12 ASD, 15 ASD, 18 ASD, or 20 ASD, etc. Furthermore, the temperature used for electroplating to form the additional conductive layer 70 is typically 20°C to 40°C. For example, the temperature can be 20°C, 22°C, 25°C, 28°C, 30°C, 35°C, 38°C, or 40°C, etc. With this electroplating current density, the additional conductive layer 70 can be formed using existing low-cost plating methods. For example, the plating method for forming the additional conductive layer 70 can be acidic copper plating such as acidic copper sulfate, and the copper content in this plating method can be arbitrary.
[0104] in addition, Figure 5 It also shows that after omitting step S404, on the metal seed layer 30 formed in step S402, after passing through the second dielectric layer 42 formed in step S403 and the unplated area 50 not covered by the second dielectric layer 42, the process directly enters step S405 to form the additional conductive layer 70. Since the fine grain layer 60 is omitted, there will be a relatively large gap between the metal seed layer 30 and the additional conductive layer 70, which will result in high metal electrode line resistance and contact resistance.
[0105] Furthermore, following step S405, the process may further include forming a conductive protective layer 80 on the outside of the additional conductive layer 70 by electroplating. This conductive protective layer 80 generally contains tin grains, copper grains, or silver grains. Generally, the grain size of the conductive protective layer 80 is smaller than the grain size of the additional conductive layer 70, and the grain size of the conductive protective layer 80 is larger than the grain size of the fine-grained layer 60. This ensures that the conductive protective layer 80 can completely cover the additional conductive layer 70 and reduces the manufacturing process difficulty of the additional conductive layer 70.
[0106] For example, the thickness of the conductive protective layer 80 is generally 0.5 μm to 5 μm. For instance, the thickness of the conductive protective layer 80 can be 0.5 μm, 1 μm, 1.5 μm, 2 μm, 2.5 μm, 3 μm, 3.5 μm, 4 μm, 4.5 μm, or 5 μm, etc. More specifically, for the conductive protective layer 80 containing tin grains, if the conductive protective layer 80 is obtained by electroplating, its thickness is generally 0.5 μm to 5 μm; if the conductive protective layer 80 is obtained by chemical plating, its thickness is generally 0.5 μm to 1 μm. For example, the thickness of the conductive protective layer 80 can be 0.5 μm, 0.6 μm, 0.7 μm, 0.8 μm, 0.9 μm, or 1 μm, etc. For the conductive protective layer 80 containing silver grains, whether it is obtained by electroplating or electroless plating, its thickness is generally 0.5μm~3μm. For example, the thickness of the conductive protective layer 80 can be 0.5μm, 1μm, 1.5μm, 2μm, 2.5μm or 3μm.
[0107] The method for fabricating a heterojunction solar cell provided in this embodiment of the invention involves a metal seed layer 30 containing stacked metal particles, a first dielectric layer 41 disposed outside the metal seed layer 30, and a second dielectric layer 42 scattered on the surface of some of the metal particles. This allows the transparent conductive layer 20 to be completely covered by the first dielectric layer 41. The metal seed layer 30 has a plating gap 50, which can be precisely deposited onto the second dielectric layer 42 and the plating gap 50 by electroplating or chemical plating. A stable contact is formed between the crystalline layer 60 and the transparent conductive layer 20 through the unplated area 50. Thus, the additional conductive layer 70 stacked on the fine crystalline layer 60 can form a stable contact and electrical connection with the metal seed layer 30 through the fine crystalline layer 60. This heterojunction solar cell fabrication process can avoid the use of cumbersome processes such as exposure and development. It can not only avoid the influence of foreign matter (developer or ink, etc.) remaining in the exposure and development process, but also avoid the risk of yield loss caused by poor exposure and development process. Moreover, this fabrication method can reduce production costs, eliminate the need for a mask, and avoid the presence of foreign matter in the heterojunction solar cell.
[0108] In addition, the heterojunction solar cell prepared by this method consists of a metal seed layer 30, a non-plated region 50, a fine grain layer 60 and an additional conductive layer 70 forming a metal electrode. The fine grain layer 60 can ensure a stable electrical connection between the metal seed layer 30 and the additional conductive layer 70, which effectively improves the reliability of the metal electrode of the heterojunction solar cell and is beneficial to improving the performance of the heterojunction solar cell.
[0109] In addition, by introducing a fine-grained layer 60, this preparation method can fill the gaps between the metal particles contained in the metal seed layer 30 and can better electrically connect the missing plating area 50 and the additional conductive layer 70, thereby increasing the indirect contact area between the additional conductive layer 70 and the metal seed layer 30. This can effectively reduce the line resistance and contact resistance of the metal electrode of the heterojunction solar cell, thereby improving the series resistance and photoelectric conversion efficiency of the heterojunction solar cell.
[0110] Furthermore, compared with the existing process of preparing a mask by exposure and development with a developer and then using electroplating to prepare heterojunction solar cells, the preparation method provided by this embodiment of the invention omits these cumbersome process steps, reduces production costs, and the entire preparation process does not require the introduction of other materials into the cell. In the electroplating process, there is no need to align and introduce a mask, which allows the electroplating process to selectively electroplat the fine grain layer 60 and the additional conductive layer 70 only on the metal seed layer 30, and can effectively improve the yield.
[0111] The above steps are provided only to help understand the structure, method, and core idea of this utility model. For those skilled in the art, various improvements and modifications can be made to this utility model without departing from its principles, and these improvements and modifications also fall within the scope of protection of the claims of this utility model.
Claims
1. A heterojunction solar cell, characterized in that, include: Battery substrate (10); A transparent conductive layer (20) is disposed on the main surface of the battery substrate (10). A metal seed layer (30) is spaced apart on the transparent conductive layer (20), the metal seed layer (30) containing stacked metal particles; A first dielectric layer (41) is disposed on the transparent conductive layer (20) and located outside the metal seed layer (30); The second dielectric layer (42) is discontinuously disposed on the surface of the metal seed layer (30), such that the metal seed layer (30) includes a plating failure area (50) not covered by the second dielectric layer (42). A fine-grained layer (60) is stacked on the second dielectric layer (42) and the unplated area (50). And an additional conductive layer (70) stacked on the fine-grained layer (60).
2. The heterojunction solar cell according to claim 1, characterized in that, The thickness of the transparent conductive layer (20) is 5nm~150nm.
3. The heterojunction solar cell according to claim 1, characterized in that, The metal seed layer (30) contains metal particles with a diameter of 0.5 μm to 20 μm; And / or, The thickness of the metal seed layer (30) is 0.5 μm to 20 μm; And / or, The width of the metal seed layer (30) is 5μm~80μm.
4. The heterojunction solar cell according to claim 1, characterized in that, The thickness of the first dielectric layer (41) is 5 nm to 200 nm; And / or, The thickness of the second dielectric layer (42) is 5nm~200nm.
5. The heterojunction solar cell according to claim 1, characterized in that, The fine-grained layer (60) contains grains with a diameter of 0.03 μm to 1 μm.
6. The heterojunction solar cell according to claim 5, characterized in that, The fine-grained layer (60) contains grains with a diameter of 0.03 μm to 0.1 μm.
7. The heterojunction solar cell according to any one of claims 1, 5, and 6, characterized in that, The thickness of the fine-grained layer (60) is greater than or equal to 0.1 μm, and the thickness of the fine-grained layer (60) is less than or equal to 2 μm.
8. The heterojunction solar cell according to claim 1, 5, or 6, characterized in that, The thickness of the additional conductive layer (70) is 2μm~40μm; And / or, The additional conductive layer (70) contains grains with a larger size than the grains contained in the fine-grained layer (60).
9. The heterojunction solar cell according to claim 1, characterized in that, Also includes: A conductive protective layer (80) is stacked on the outside of the additional conductive layer (70).
10. The heterojunction solar cell according to claim 9, characterized in that, The conductive protective layer (80) contains a smaller grain size than the additional conductive layer (70), and the conductive protective layer (80) contains a larger grain size than the fine grain layer (60). And / or, The thickness of the conductive protective layer (80) is 0.5μm~5μm.