Optoelectronic semiconductor device

Abstract

The photoelectric semiconductor device provided by the utility model, include: epitaxial laminated, the epitaxial laminated contains first type semiconductor layer, active layer and second type semiconductor layer that set up in turn, and have opposite first surface and second surface, wherein the first surface is the light emitting surface, conductive substrate is bonded through bonding layer and is set in the second surface, wherein, the bonding layer is bonded through metal layer and indium layer and forms, and the metal layer includes the flexible metal film layer and rigid metal film layer that are stacked alternately. Based on the above setting, the flexible metal film layer and rigid metal film layer that are stacked alternately are bonded as the metal layer and indium layer, through the conductivity and tensility of flexible metal film layer, under the bonding environment of temperature rise and pressure, the metal layer can better contact with indium layer, so as to continuously adjust the fit angle of metal layer and indium layer, so as to reduce the bonding gap of bonding surface.

Description

Technical Field

[0001] This utility model relates to the field of optoelectronic semiconductor devices, and in particular to an optoelectronic semiconductor device. Background Technology

[0002] With the rapid development of semiconductor technology and the gradual improvement of related performance, the application of optoelectronic semiconductor devices (such as LED chips or VCSEL lasers) is becoming increasingly widespread. Specifically, an optoelectronic semiconductor device includes an epitaxial stack and N-type and P-type electrodes respectively disposed on the epitaxial stack. The epitaxial wafer includes a P-type semiconductor layer, an N-type semiconductor layer, and an active layer located between the P-type and N-type semiconductor layers. When current flows through the optoelectronic semiconductor device, holes in the P-type semiconductor and electrons in the N-type semiconductor move towards the active layer and recombine there, thus enabling the optoelectronic semiconductor device to function.

[0003] Currently, vertically oriented optoelectronic semiconductor devices typically require the epitaxial stack to be peeled from the growth substrate and rebonded to a conductive substrate such as Si. Common Si bonding techniques include Si-Si direct bonding (SDB), anodic bonding, and Si-Si bonding using metal solders. SDB and anodic bonding are less commonly used due to their high interface resistance, large capacitance, and poor thermal conductivity. In contrast, Si wafer bonding using metal solders is a mature semiconductor process, facilitates the formation of ohmic contacts at the interface, and has low interface parasitic parameters, thus it is widely used in microelectronic fabrication. Common metal solders include Al, Au, Ti, and In, with metal-In bonding being one of the most common bonding methods.

[0004] However, due to factors such as poor wafer flatness, the commonly used metal-In bonding method in the industry introduces gas at the bonding surface during bonding, resulting in significant voids in the bonding layer. This problem persists in semiconductor manufacturing. Surveys indicate that even with optimal bonding temperature and a relatively good bonding surface, the bonding area only reaches about 60%, leaving 40% voids. This significantly increases interface resistance, affecting ohmic contacts. Furthermore, this bonding method results in high stress and numerous defects at the interface, leading to a high recombination rate of charge carriers and making the bonding layer prone to detachment.

[0005] In view of this, the inventors specifically designed an optoelectronic semiconductor device, which led to this invention. Utility Model Content

[0006] The purpose of this invention is to provide an optoelectronic semiconductor device and its fabrication method to reduce the bonding gap in the bonding layer.

[0007] To achieve the above objectives, the technical solution adopted by this utility model is as follows:

[0008] A photoelectric semiconductor device, comprising:

[0009] An epitaxial stack comprising a first type semiconductor layer, an active layer, and a second type semiconductor layer stacked sequentially, and having opposing first and second surfaces, wherein the first surface is a light-emitting surface;

[0010] A conductive substrate is bonded to the second surface via a bonding layer;

[0011] The bonding layer is formed by bonding a metal layer to an indium layer, and the metal layer comprises alternating stacked flexible metal film layers and rigid metal film layers.

[0012] Preferably, the contact surface between the metal layer and the indium layer is a flexible metal film layer.

[0013] Preferably, the contact surface between the metal layer and the conductive substrate is a rigid metal film layer.

[0014] Preferably, the thickness of the flexible metal film layer is D1, and the thickness of the rigid metal film layer is D2, then D2 / 10≤D1≤3*D2.

[0015] Preferably, the metal layer comprises alternating stacked flexible nanometal films and rigid metal films.

[0016] Preferably, the metal layer comprises any one or more of gold, silver, copper, palladium, and gold-tin alloy.

[0017] Preferably, the flexible gold film layer includes a gold nanowire film layer, and the rigid metal film layer includes a rigid gold film layer.

[0018] Preferably, the gold nanowire film layer comprises a jellyfish-cluster gold nanowire thin film.

[0019] Preferably, the optoelectronic semiconductor device includes an LED chip or a VCSEL laser.

[0020] Preferably, the optoelectronic semiconductor device includes a vertical structure AlGaInP-based LED chip, wherein the first type semiconductor layer includes a P-type confinement layer, the second type semiconductor layer includes an N-type confinement layer, and the first surface is disposed on the side of the second type confinement layer away from the active layer, and the bonding layer is disposed on the side of the first type confinement layer away from the active layer.

[0021] Between the bonding layer and the first type of confinement layer, there are sequentially stacked reflectors and P-type window layers.

[0022] Furthermore, the reflector includes an ODR reflector.

[0023] Furthermore, the P-type confinement layer includes a P-type AlInP confinement layer, the active layer includes an AlGaInP multiple quantum well layer, and the N-type confinement layer includes an N-type AlInP confinement layer.

[0024] Preferably, the optoelectronic semiconductor device includes a vertical GaN-based light-emitting diode, wherein the first type semiconductor layer includes an N-type GaN layer, the second type semiconductor layer includes a P-type GaN layer, and the first surface is disposed on the side of the P-type GaN layer away from the active layer, and the bonding layer is disposed on the side of the N-type GaN layer away from the active layer.

[0025] Preferably, the optoelectronic semiconductor device includes a VCSEL laser, in which the first type semiconductor layer includes an N-type waveguide layer, the second type semiconductor layer includes a P-type waveguide layer, and the first surface is disposed on the side of the P-type waveguide layer away from the active layer, and the bonding layer is disposed on the side of the N-type waveguide layer away from the active layer.

[0026] Specifically, a P-type DBR layer is provided on the side of the P-type waveguide layer away from the active layer, and an N-type DBR layer is provided on the side of the N-type waveguide layer away from the active layer.

[0027] This utility model also provides a method for fabricating an optoelectronic semiconductor device, comprising:

[0028] An epitaxial stack is provided, the epitaxial stack comprising a first type semiconductor layer, an active layer and a second type semiconductor layer stacked sequentially, and having a first surface and a second surface opposite to each other, wherein the first surface is a light-emitting surface;

[0029] An indium layer is disposed on the second surface;

[0030] A conductive substrate is provided, and a metal layer is disposed on the surface of the conductive substrate. The metal layer includes alternately stacked flexible metal film layers and rigid metal film layers, wherein the rigid metal film layers are obtained by sputtering process.

[0031] The conductive substrate is formed on the second surface by bonding the metal layer to the indium layer.

[0032] As can be seen from the above technical solution, the optoelectronic semiconductor device provided by this utility model includes: an epitaxial stack, wherein the epitaxial stack comprises a first type semiconductor layer, an active layer, and a second type semiconductor layer stacked sequentially, and has a first surface and a second surface opposite to each other, wherein the first surface is a light-emitting surface; a conductive substrate, which is bonded to the second surface by a bonding layer; wherein the bonding layer is formed by bonding a metal layer and an indium layer, and the metal layer comprises alternately stacked flexible metal film layers and rigid metal film layers. Based on the above configuration, during the bonding process between the alternately stacked flexible metal film layers and the indium layer, the conductivity and tensile properties of the flexible metal film layer allow the metal layer to better contact the indium layer under the bonding environment of increased temperature and pressure, thereby continuously adjusting the bonding angle between the metal layer and the indium layer and reducing the bonding gap at the bonding surface.

[0033] Secondly, by using a flexible metal film layer as the contact surface between the metal layer and the indium layer, the adhesion angle of the flexible metal film layer to the indium layer can be adjusted more fully. Furthermore, by using a rigid metal film layer as the contact surface between the metal layer and the conductive substrate, the supporting effect of the metal layer on the conductive substrate is further ensured.

[0034] Then, by setting D2 / 10≤D1≤3*D2, where the thickness of the flexible metal film layer is D1 and the thickness of the rigid metal film layer is D2, the bonding angle between the flexible metal film layer and the indium layer is sufficiently adjusted, while also further ensuring the supporting effect of the rigid metal film layer on the conductive substrate.

[0035] Next, by incorporating a gold nanowire film layer into the flexible gold film layer, the stability of the gold nanowire film layer after high bending is further mitigated, thus reducing damage to the metal layer during the bonding process. Furthermore, by including a jellyfish-cluster gold nanowire film layer into the gold nanowire film layer, the unique layered orientation structure of the jellyfish-shaped gold nanowires is fully utilized to ensure the high conductivity and stretchability of the flexible gold film layer.

[0036] Finally, this invention also provides a method for fabricating an optoelectronic semiconductor device, which achieves the aforementioned beneficial effects while having a simple fabrication process, facilitating product commercialization. Furthermore, the rigid metal film layer is obtained using a sputtering process, and the lower temperature sputtering environment reduces damage to the morphology of the flexible metal film layer. Attached Figure Description

[0037] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0038] Figure 1 This is a schematic diagram of the structure of an optoelectronic semiconductor device provided in Embodiment 1 of this utility model;

[0039] Figure 2 This is a schematic diagram of the structure of the metal layer of an optoelectronic semiconductor device provided in Embodiment 1 of this utility model;

[0040] Figure 3 This is a schematic diagram of the internal structure of a jellyfish-cluster gold nanowire thin film for an optoelectronic semiconductor device provided in Embodiment 1 of this utility model.

[0041] Figure 4 This is a schematic diagram of the optoelectronic semiconductor device of the vertical AlGaInP-based LED chip provided in Embodiment 2 of this utility model.

[0042] Figure 5 This is a schematic diagram of the optoelectronic semiconductor device of the vertical GaN-based light-emitting diode provided in Embodiment 3 of this utility model.

[0043] Figure 6 This is a schematic diagram of the optoelectronic semiconductor device structure of the VCSEL laser provided in Embodiment 4 of this utility model;

[0044] Explanation of symbols in the diagram:

[0045] 1.1, Type I semiconductor layer;

[0046] 1.2 Active layer;

[0047] 1.3, Type II semiconductor layer;

[0048] 1.4, P-type window layer;

[0049] 1.5 Dielectric section;

[0050] 1.6 Contact holes;

[0051] 1.7, First reflective layer;

[0052] 1.8, P-type DBR layer;

[0053] 1.9, N-type DBR layer;

[0054] 2. Indium layer;

[0055] 3. Metal layer;

[0056] 3.1 Flexible metal film layer;

[0057] 3.2 Rigid metal film layer;

[0058] 4. Conductive substrate. Detailed Implementation

[0059] To make the content of this utility model clearer, the following description, in conjunction with the accompanying drawings, further illustrates the present utility model. This utility model is not limited to this specific embodiment. All other embodiments obtained by those skilled in the art based on the embodiments of this utility model without inventive effort are within the scope of protection of this utility model.

[0060] like Figure 1 As shown, an optoelectronic semiconductor device includes:

[0061] An epitaxial stack comprising a first type semiconductor layer 1.1, an active layer 1.2, and a second type semiconductor layer 1.3 stacked sequentially, and having opposing first and second surfaces, wherein the first surface is a light-emitting surface;

[0062] The conductive substrate 4 is bonded to the second surface via a bonding layer;

[0063] The bonding layer is formed by bonding the metal layer 3 to the indium layer 2, and as shown in the figure. Figure 2 As shown, the metal layer 3 includes alternating stacked flexible metal film layers 3.1 and rigid metal film layers 3.2.

[0064] It should be noted that the thicknesses of the flexible metal film layer 3.1 and the rigid metal film layer 3.2 are affected by the flexible metal morphology, therefore the specific thickness is not limited and depends on the application. Additionally, the number of cycles is 1-10, including endpoint values, depending on the application. Based on the above, in one embodiment of this application, the contact surface between the metal layer 3 and the indium layer 2 is the flexible metal film layer 3.1.

[0065] Based on the above, in one embodiment of this application, the contact surface between the metal layer 3 and the conductive substrate 4 is a rigid metal film layer 3.2.

[0066] Based on the above, in one embodiment of this application, the thickness of the flexible metal film layer 3.1 is D1, and the thickness of the rigid metal film layer 3.2 is D2, then D2 / 10≤D1≤3*D2.

[0067] Based on the above, in one embodiment of this application, the metal layer 3 includes alternately stacked flexible nanometal film layers and rigid metal film layers 3.2.

[0068] Based on the above, in one embodiment of this application, the metal layer 3 includes any one or more of gold, silver, copper, palladium, and gold-tin alloy.

[0069] Based on the above, in one embodiment of this application, the flexible gold film layer includes a gold nanowire film layer, and the rigid metal film layer 3.2 includes a rigid gold film layer.

[0070] Based on the above, in one embodiment of this application, such as Figure 3 As shown, the gold nanowire film layer comprises a jellyfish-cluster gold nanowire thin film.

[0071] This embodiment also provides a method for fabricating an optoelectronic semiconductor device, specifically including:

[0072] An epitaxial stack is provided, the epitaxial stack comprising a first type semiconductor layer 1.1, an active layer 1.2 and a second type semiconductor layer 1.3 stacked sequentially, and having a first surface and a second surface opposite to each other, wherein the first surface is a light-emitting surface;

[0073] An indium layer 2 is disposed on the second surface;

[0074] A conductive substrate 4 is provided, and a metal layer 3 is provided on the surface of the conductive substrate 4. The metal layer 3 includes alternately stacked flexible metal film layers 3.1 and rigid metal film layers 3.2, wherein the rigid metal film layer 3.2 is obtained by sputtering process.

[0075] The conductive substrate 4 is formed on the second surface by bonding the metal layer 3 to the indium layer 2.

[0076] As can be seen from the above technical solution, the optoelectronic semiconductor device provided by this utility model includes: an epitaxial stack, wherein the epitaxial stack comprises a first type semiconductor layer 1.1, an active layer 1.2, and a second type semiconductor layer 1.3 stacked sequentially, and has a first surface and a second surface opposite to each other, wherein the first surface is a light-emitting surface; a conductive substrate 4, which is bonded to the second surface by a bonding layer; wherein the bonding layer is formed by bonding a metal layer 3 to an indium layer 2, and the metal layer 3 comprises alternately stacked flexible metal film layers 3.1 and rigid metal film layers 3.2. Based on the above configuration, during the bonding process between the metal layer 3 and the indium layer 2, the alternately stacked flexible metal film layers 3.1 and rigid metal film layers 3.2, through the conductivity and stretchability of the flexible metal film layer 3.1, allow the metal layer 3 to better contact the indium layer 2 under the bonding environment of heating and pressurization, thereby continuously adjusting the bonding angle between the metal layer 3 and the indium layer 2, thereby reducing the bonding gap at the bonding surface.

[0077] Secondly, by setting the contact surface between the metal layer 3 and the indium layer 2 as a flexible metal film layer 3.1, the adhesion angle of the flexible metal film layer 3.1 to the indium layer 2 can be adjusted more fully. Furthermore, by setting the contact surface between the metal layer 3 and the conductive substrate 4 as a rigid metal film layer 3.2, the supporting effect of the metal layer 3 on the conductive substrate 4 is further guaranteed.

[0078] Then, by setting D2 / 10≤D1≤3*D2, where the thickness of the flexible metal film layer 3.1 is D1 and the thickness of the rigid metal film layer 3.2 is D2, the bonding angle between the flexible metal film layer 3.1 and the indium layer 2 is sufficiently adjusted, while also further ensuring the supporting effect of the rigid metal film layer 3.2 on the conductive substrate 4.

[0079] Next, by incorporating a gold nanowire film layer into the flexible gold film layer, the stability of the gold nanowire film layer after high bending is further mitigated to prevent damage to the metal layer 3 during the bonding process. Furthermore, by including a jellyfish-cluster gold nanowire film layer into the gold nanowire film layer, the unique layered orientation structure of the jellyfish-shaped gold nanowires is fully utilized to ensure the high conductivity and stretchability of the flexible gold film layer.

[0080] Finally, this utility model also provides a method for manufacturing a semiconductor device, which, while achieving the aforementioned beneficial effects, has a simple manufacturing process and is conducive to product commercialization. Meanwhile, the rigid metal film layer 3.2 is obtained using a sputtering process, and the lower temperature sputtering environment reduces damage to the morphology of the flexible metal film layer 3.1.

[0081] Example 2

[0082] like Figure 4 As shown, based on Embodiment 1, this embodiment proposes an optoelectronic semiconductor device that applies Embodiment 1 to a vertical AlGaInP-based LED chip; the first type semiconductor layer 1.1 includes a P-type confinement layer, the second type semiconductor layer 1.3 includes an N-type confinement layer, and the light-emitting surface is disposed on the side of the second type semiconductor layer 1.3 away from the active layer 1.2, and the bonding layer is disposed on the side of the first type semiconductor layer 1.1 away from the active layer 1.2;

[0083] Among them, a reflector and a P-type window layer 1.4 are stacked sequentially between the bonding layer and the first type of confinement layer.

[0084] Furthermore, the reflector includes an ODR reflector. Specifically, it includes:

[0085] A first reflective layer 1.7 is disposed on the bonding layer and includes a conductive reflective material that reflects light generated from the active layer 1.2; and a second reflective layer is disposed on the first reflective layer 1.7 and includes one or more dielectric portions 1.5 that reflect light generated from the active layer 1.2 and one or more contact holes 1.6 filled with conductive filler to electrically connect the first type semiconductor layer 1.1 and the first reflective layer 1.7.

[0086] The first reflective layer 1.7 may be formed of a conductive reflective material including at least one of Ag, Al, Au, AuZn alloy, and AuBe alloy, which have high reflectivity, to reflect light. Furthermore, the first reflective layer 1.7 may include Ni (a bonding conductive material) on a portion or all of its surface to improve the adhesion between the conductive reflective material and the other layer. Considering the reflectivity of the first reflective layer 1.7...

[0087] The refractive index of the dielectric portion 1.5 can be lower than that of the second type semiconductor layer 1.3 to reflect moving light. The dielectric portion 1.5 can be any one or more of SiO2, Si3N4, or MgF2 with a refractive index lower than that of the second type semiconductor layer 1.3.

[0088] The conductive filler filling the contact hole 1.6 can be the same material as the conductive reflective material of the first reflective layer 1.7.

[0089] Furthermore, the P-type confinement layer includes a P-type AlInP confinement layer, the active layer 1.2 includes an AlGaInP multiple quantum well layer, the N-type confinement layer includes an N-type AlInP confinement layer, and the P-type window layer 1.4 includes a P-GaP layer.

[0090] The N-type dopant of the N-type semiconductor layer can be formed from, for example, Si, Ge, or Sn. The P-type dopant of the P-type semiconductor layer can be formed from, for example, Mg, Zn, or Be.

[0091] The conductive substrate 4 can be any of Ni, Cu and Si, or any of Mo substrate, SiC substrate, Ge substrate, molybdenum copper alloy substrate or tungsten copper alloy substrate.

[0092] The bonding layer is formed by bonding a metal layer 3 to an indium layer 2, and the metal layer 3 includes alternating stacked flexible metal film layers 3.1 and rigid metal film layers 3.2.

[0093] It should be noted that the thickness of the flexible metal film layer 3.1 and the rigid metal film layer 3.2 is affected by the shape of the flexible metal, so the specific thickness is not limited and depends on the application. In addition, the number of cycles is 1-10, including the endpoint values, depending on the application.

[0094] Based on the above, in one embodiment of this application, the contact surface between the metal layer 3 and the indium layer 2 is a flexible metal film layer 3.1.

[0095] Based on the above, in one embodiment of this application, the contact surface between the metal layer 3 and the conductive substrate 4 is a rigid metal film layer 3.2.

[0096] Based on the above, in one embodiment of this application, the thickness of the flexible metal film layer 3.1 is D1, and the thickness of the rigid metal film layer 3.2 is D2, then D2 / 10≤D1≤3*D2.

[0097] Based on the above, in one embodiment of this application, the metal layer 3 includes alternately stacked flexible nanometal film layers and rigid metal film layers 3.2.

[0098] Based on the above, in one embodiment of this application, the metal layer 3 includes any one or more of gold, silver, copper, palladium, and gold-tin alloy.

[0099] Based on the above, in one embodiment of this application, the flexible gold film layer includes a gold nanowire film layer, and the rigid metal film layer 3.2 includes a rigid gold film layer.

[0100] Based on the above, in one embodiment of this application, the gold nanowire film layer comprises a jellyfish cluster gold nanowire thin film.

[0101] As can be seen from the above technical solution, the optoelectronic semiconductor device of the vertical structure AlGaInP-based LED chip provided by this utility model, through the alternating stacking of flexible metal film layer 3.1 and rigid metal film layer 3.2 as metal layer 3 and indium layer 2 bonding process, through the conductivity and tensile properties of flexible metal film layer 3.1, under the bonding environment of heating and pressurization, metal layer 3 can better contact indium layer 2, thereby continuously adjusting the bonding angle between metal layer 3 and indium layer 2, thereby reducing the bonding gap of bonding surface.

[0102] Secondly, by setting the contact surface between the metal layer 3 and the indium layer 2 as a flexible metal film layer 3.1, the adhesion angle of the flexible metal film layer 3.1 to the indium layer 2 can be adjusted more fully. Furthermore, by setting the contact surface between the metal layer 3 and the conductive substrate 4 as a rigid metal film layer 3.2, the supporting effect of the metal layer 3 on the conductive substrate 4 is further guaranteed.

[0103] Then, by setting D2 / 10≤D1≤3*D2, where the thickness of the flexible metal film layer 3.1 is D1 and the thickness of the rigid metal film layer 3.2 is D2, the bonding angle between the flexible metal film layer 3.1 and the indium layer 2 is sufficiently adjusted, while also further ensuring the supporting effect of the rigid metal film layer 3.2 on the conductive substrate 4.

[0104] Next, by incorporating a gold nanowire film layer into the flexible gold film layer, the stability of the gold nanowire film layer after high bending is further mitigated to prevent damage to the metal layer 3 during the bonding process. Furthermore, by including a jellyfish-cluster gold nanowire film layer into the gold nanowire film layer, the unique layered orientation structure of the jellyfish-shaped gold nanowires is fully utilized to ensure the high conductivity and stretchability of the flexible gold film layer.

[0105] Example 4

[0106] like Figure 5 As shown, based on Embodiment 1, this embodiment proposes an optoelectronic semiconductor device that applies Embodiment 1 to a vertical GaN-based light-emitting diode; the first type semiconductor layer 1.1 includes an N-type GaN layer, the second type semiconductor layer 1.3 includes a P-type GaN layer, and the light-emitting surface is disposed on the side of the P-type GaN layer away from the active layer 1.2, and the bonding layer is disposed on the side of the N-type GaN layer away from the active layer 1.2.

[0107] The N-type dopant of the N-type semiconductor layer can be formed from, for example, Si, Ge, or Sn. The P-type dopant of the P-type semiconductor layer can be formed from, for example, Mg, Zn, or Be.

[0108] The conductive substrate 4 can be any of Ni, Cu and Si, or any of Mo substrate, SiC substrate, Ge substrate, molybdenum copper alloy substrate or tungsten copper alloy substrate.

[0109] The bonding layer is formed by bonding a metal layer 3 to an indium layer 2, and the metal layer 3 includes alternating stacked flexible metal film layers 3.1 and rigid metal film layers 3.2.

[0110] Based on the above, in one embodiment of this application, the contact surface between the metal layer 3 and the indium layer 2 is a flexible metal film layer 3.1.

[0111] Based on the above, in one embodiment of this application, the contact surface between the metal layer 3 and the conductive substrate 4 is a rigid metal film layer 3.2.

[0112] Based on the above, in one embodiment of this application, the thickness of the flexible metal film layer 3.1 is D1, and the thickness of the rigid metal film layer 3.2 is D2, then D2 / 10≤D1≤3*D2.

[0113] Based on the above, in one embodiment of this application, the metal layer 3 includes alternately stacked flexible nanometal film layers and rigid metal film layers 3.2.

[0114] It should be noted that the thickness of the flexible metal film layer 3.1 and the rigid metal film layer 3.2 is affected by the shape of the flexible metal, so the specific thickness is not limited and depends on the application. In addition, the number of cycles is 1-10, including the endpoint values, depending on the application.

[0115] Based on the above, in one embodiment of this application, the metal layer 3 includes any one or more of gold, silver, copper, palladium, and gold-tin alloy.

[0116] Based on the above, in one embodiment of this application, the flexible gold film layer includes a gold nanowire film layer, and the rigid metal film layer 3.2 includes a rigid gold film layer.

[0117] Based on the above, in one embodiment of this application, the gold nanowire film layer comprises a jellyfish cluster gold nanowire thin film.

[0118] As can be seen from the above technical solution, the optoelectronic semiconductor device of the vertical structure GaN-based LED chip provided by this utility model, through the alternating stacked flexible metal film layer 3.1 and rigid metal film layer 3.2 as metal layer 3 and indium layer 2 bonding process, through the conductivity and tensile properties of flexible metal film layer 3.1, under the bonding environment of heating and pressurization, metal layer 3 can better contact indium layer 2, thereby continuously adjusting the bonding angle between metal layer 3 and indium layer 2, thereby reducing the bonding gap of bonding surface.

[0119] Secondly, by setting the contact surface between the metal layer 3 and the indium layer 2 as a flexible metal film layer 3.1, the adhesion angle of the flexible metal film layer 3.1 to the indium layer 2 can be adjusted more fully. Furthermore, by setting the contact surface between the metal layer 3 and the conductive substrate 4 as a rigid metal film layer 3.2, the supporting effect of the metal layer 3 on the conductive substrate 4 is further guaranteed.

[0120] Then, by setting D2 / 10≤D1≤3*D2, where the thickness of the flexible metal film layer 3.1 is D1 and the thickness of the rigid metal film layer 3.2 is D2, the bonding angle between the flexible metal film layer 3.1 and the indium layer 2 is sufficiently adjusted, while also further ensuring the supporting effect of the rigid metal film layer 3.2 on the conductive substrate 4.

[0121] Next, by incorporating a gold nanowire film layer into the flexible gold film layer, the stability of the gold nanowire film layer after high bending is further mitigated to prevent damage to the metal layer 3 during the bonding process. Furthermore, by including a jellyfish-cluster gold nanowire film layer into the gold nanowire film layer, the unique layered orientation structure of the jellyfish-shaped gold nanowires is fully utilized to ensure the high conductivity and stretchability of the flexible gold film layer.

[0122] Example 4

[0123] like Figure 6 As shown, based on Embodiment 1, this embodiment proposes an optoelectronic semiconductor device that applies Embodiment 1 to a VCSEL laser; the first type semiconductor layer 1.1 includes an N-type waveguide layer, the second type semiconductor layer 1.3 includes a P-type waveguide layer, and the light-emitting surface is disposed on the side of the P-type waveguide layer away from the active layer 1.2, and the bonding layer is disposed on the side of the N-type waveguide layer away from the active layer 1.2;

[0124] Specifically, a P-type DBR layer 1.8 is provided on the side of the P-type waveguide layer away from the active layer 1.2, and an N-type DBR layer 1.9 is provided on the side of the N-type waveguide layer away from the active layer 1.2.

[0125] The conductive substrate 4 can be any of Ni, Cu and Si, or any of Mo substrate, SiC substrate, Ge substrate, molybdenum copper alloy substrate or tungsten copper alloy substrate.

[0126] The bonding layer is formed by bonding a metal layer 3 to an indium layer 2, and the metal layer 3 includes alternating stacked flexible metal film layers 3.1 and rigid metal film layers 3.2.

[0127] Based on the above, in one embodiment of this application, the contact surface between the metal layer 3 and the indium layer 2 is a flexible metal film layer 3.1.

[0128] It should be noted that the thickness of the flexible metal film layer 3.1 and the rigid metal film layer 3.2 is affected by the shape of the flexible metal, so the specific thickness is not limited and depends on the application. In addition, the number of cycles is 1-10, including the endpoint values, depending on the application.

[0129] Based on the above, in one embodiment of this application, the contact surface between the metal layer 3 and the conductive substrate 4 is a rigid metal film layer 3.2.

[0130] Based on the above, in one embodiment of this application, the thickness of the flexible metal film layer 3.1 is D1, and the thickness of the rigid metal film layer 3.2 is D2, then D2 / 10≤D1≤3*D2.

[0131] Based on the above, in one embodiment of this application, the metal layer 3 includes alternately stacked flexible nanometal film layers and rigid metal film layers 3.2.

[0132] Based on the above, in one embodiment of this application, the metal layer 3 includes any one or more of gold, silver, copper, palladium, and gold-tin alloy.

[0133] Based on the above, in one embodiment of this application, the flexible gold film layer includes a gold nanowire film layer, and the rigid metal film layer 3.2 includes a rigid gold film layer.

[0134] Based on the above, in one embodiment of this application, the gold nanowire film layer comprises a jellyfish cluster gold nanowire thin film.

[0135] As can be seen from the above technical solution, the optoelectronic semiconductor device of the VCSEL laser provided by this utility model uses alternately stacked flexible metal film layers 3.1 and rigid metal film layers 3.2 as metal layer 3 to bond with indium layer 2. Through the conductivity and stretchability of flexible metal film layer 3.1, under the bonding environment of heating and pressurization, metal layer 3 can better contact indium layer 2, thereby continuously adjusting the bonding angle between metal layer 3 and indium layer 2, thereby reducing the bonding gap of bonding surface.

[0136] Secondly, by setting the contact surface between the metal layer 3 and the indium layer 2 as a flexible metal film layer 3.1, the adhesion angle of the flexible metal film layer 3.1 to the indium layer 2 can be adjusted more fully. Furthermore, by setting the contact surface between the metal layer 3 and the conductive substrate 4 as a rigid metal film layer 3.2, the supporting effect of the metal layer 3 on the conductive substrate 4 is further guaranteed.

[0137] Then, by setting D2 / 10≤D1≤3*D2, where the thickness of the flexible metal film layer 3.1 is D1 and the thickness of the rigid metal film layer 3.2 is D2, the bonding angle between the flexible metal film layer 3.1 and the indium layer 2 is sufficiently adjusted, while also further ensuring the supporting effect of the rigid metal film layer 3.2 on the conductive substrate 4.

[0138] Next, by incorporating a gold nanowire film layer into the flexible gold film layer, the stability of the gold nanowire film layer after high bending is further mitigated to prevent damage to the metal layer 3 during the bonding process. Furthermore, by including a jellyfish-cluster gold nanowire film layer into the gold nanowire film layer, the unique layered orientation structure of the jellyfish-shaped gold nanowires is fully utilized to ensure the high conductivity and stretchability of the flexible gold film layer.

[0139] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0140] It should also be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that an article or apparatus comprising a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such an article or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the article or apparatus that includes the aforementioned element.

[0141] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A photoelectric semiconductor device, characterized in that, include: An epitaxial stack comprising a first type semiconductor layer, an active layer, and a second type semiconductor layer stacked sequentially, and having opposing first and second surfaces, wherein the first surface is a light-emitting surface; A conductive substrate is bonded to the second surface via a bonding layer; The bonding layer is formed by bonding a metal layer to an indium layer, and the metal layer comprises alternating stacked flexible metal film layers and rigid metal film layers.

2. The optoelectronic semiconductor device according to claim 1, characterized in that, The contact surface between the metal layer and the indium layer is a flexible metal film layer.

3. The optoelectronic semiconductor device according to claim 1, characterized in that, If the thickness of the flexible metal film is D1 and the thickness of the rigid metal film is D2, then D2 / 10≤D1≤3*D2.

4. The optoelectronic semiconductor device according to claim 1, characterized in that, The metal layer comprises alternating stacked flexible nanometal films and rigid metal films.

5. The optoelectronic semiconductor device according to claim 1, characterized in that, The metal layer includes any one or more of gold, silver, copper, palladium, and gold-tin alloys.

6. The optoelectronic semiconductor device according to claim 1, characterized in that, The flexible gold film layer includes a gold nanowire film layer, and the rigid metal film layer includes a rigid gold film layer.

7. The optoelectronic semiconductor device according to claim 6, characterized in that, The gold nanowire film layer includes a jellyfish-cluster gold nanowire thin film.

8. The optoelectronic semiconductor device according to any one of claims 1 to 7, characterized in that, The optoelectronic semiconductor device includes an LED chip or a VCSEL laser.

9. The optoelectronic semiconductor device according to claim 8, characterized in that, The optoelectronic semiconductor device includes a vertical structure AlGaInP-based LED chip, wherein the first type semiconductor layer includes a P-type confinement layer, the second type semiconductor layer includes an N-type confinement layer, and the first surface is disposed on the side of the second type confinement layer away from the active layer, and the bonding layer is disposed on the side of the first type confinement layer away from the active layer. Between the bonding layer and the first type of confinement layer, there are sequentially stacked reflectors and P-type window layers.

10. The optoelectronic semiconductor device according to claim 9, characterized in that, The reflector includes an ODR reflector.

11. The optoelectronic semiconductor device according to claim 9, characterized in that, The P-type confinement layer includes a P-type AlInP confinement layer, the active layer includes an AlGaInP multiple quantum well layer, and the N-type confinement layer includes an N-type AlInP confinement layer.

12. The optoelectronic semiconductor device according to claim 8, characterized in that, The optoelectronic semiconductor device includes a vertical GaN-based light-emitting diode, wherein the first type semiconductor layer includes an N-type GaN layer, the second type semiconductor layer includes a P-type GaN layer, and the first surface is disposed on the side of the P-type GaN layer away from the active layer, and the bonding layer is disposed on the side of the N-type GaN layer away from the active layer.

13. The optoelectronic semiconductor device according to claim 8, characterized in that, The optoelectronic semiconductor device includes a VCSEL laser, wherein the first type semiconductor layer includes an N-type waveguide layer, the second type semiconductor layer includes a P-type waveguide layer, and the first surface is disposed on the side of the P-type waveguide layer away from the active layer, and the bonding layer is disposed on the side of the N-type waveguide layer away from the active layer. Specifically, a P-type DBR layer is provided on the side of the P-type waveguide layer away from the active layer, and an N-type DBR layer is provided on the side of the N-type waveguide layer away from the active layer.

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