Stage for wafer surface processing

Abstract

The utility model discloses a kind of wafer surface processing's platform, belong to semiconductor manufacturing equipment technical field, the platform includes circular metal substrate, multiple-stage annular adsorption chamber being arranged on substrate upper portion, and four groups are 90 ° uniformly distributed air passage, air passage is communicated multiple-stage adsorption chamber and converges to central air passage;Substrate center is equipped with the vacuum passage that penetrates, its lower end is connected double vacuum interface;Adsorption chamber corresponding area distribution has the micropore array that penetrates substrate upper surface;Vacuum passage outside spiral coiled cooling flow channel, four groups air passage area vertical embedded heat conduction column array;Substrate upper surface edge symmetry is arranged four pieces ceramic cambered surface limit plate, improve wafer adsorption uniformity by multiple-stage adsorption chamber and distributed air passage, combined spiral cooling flow channel and heat conduction column array realize accurate temperature control, simultaneously utilize fixed ceramic limit plate to complete high reliability positioning under the condition of no mechanical movement, significantly optimize semiconductor processing precision and stability.

Description

Technical Field

[0001] This utility model relates to the field of semiconductor manufacturing equipment technology, specifically to a vacuum adsorption stage for wafer surface processing (such as photolithography, etching, deposition), which is particularly suitable for nanoscale processes requiring high positioning accuracy and temperature uniformity. Background Technology

[0002] Wafer stages are critical equipment in semiconductor manufacturing, and their performance directly affects processing accuracy. However, current mainstream stages suffer from the following technical shortcomings:

[0003] 1. Insufficient adsorption uniformity: Single-point vacuum adsorption can easily lead to wafer edge warping. In high-speed rotation processes, the displacement can reach more than 0.1 mm, resulting in linewidth deviations exceeding 10%.

[0004] 2. Inefficient thermal management: The unreasonable layout of cooling channels often results in a temperature difference of more than 2°C between the center and the edge of the wafer, which leads to thermal stress deformation and thin film stress cracking.

[0005] Therefore, there is an urgent need for a stage solution that can simultaneously optimize adsorption uniformity and temperature control accuracy. Utility Model Content

[0006] 1. Technical problem to be solved:

[0007] To address the problems existing in the prior art, the purpose of this utility model is to provide a stage for wafer surface processing. By integrating multi-level adsorption chambers, spiral cooling channels, and fixed limiting structures, it achieves uniform distribution of adsorption force, precise control of temperature gradient, and zero-fault positioning, thereby improving the yield of semiconductor manufacturing.

[0008] 2. Technical Solution:

[0009] To solve the above problems, the present invention adopts the following technical solution.

[0010] A stage for wafer surface processing includes: a substrate, which is a circular metal platform;

[0011] An annular adsorption chamber is located inside the top side of the substrate and includes an inner annular chamber, a middle annular chamber, and an outer annular chamber that are concentrically distributed from the inside to the outside.

[0012] The airway is divided into four groups and is evenly distributed at 90°. Each group of airways connects the inner ring chamber, the middle ring chamber and the outer ring chamber. The four groups of airways converge into the central airway.

[0013] A vacuum channel is located inside the center of the substrate, with its upper end connected to the central air channel and its lower end having two vacuum interfaces.

[0014] A micropore array penetrates the upper surface of the substrate and is distributed in the region corresponding to the annular adsorption chamber, with a pore size of 0.1-0.5 mm;

[0015] The cooling channel is spirally coiled around the outside of the vacuum channel, with the inlet located on the lower left side of the substrate and the outlet located on the upper right side of the substrate.

[0016] A heat-conducting pillar array is vertically arranged in the substrate area between four sets of air channels;

[0017] A ring-shaped support frame is fixedly connected to the bottom of the substrate;

[0018] Four ceramic curved limiting plates are symmetrically distributed at 90° and fixed to the edge of the upper surface of the substrate, with the top height of the curved limiting plates being lower than the thickness of the wafer they support.

[0019] A further improvement is that the heat-conducting pillar array is made of copper-molybdenum alloy or nickel-plated copper, has a diameter of 1-3mm, and the lower end of the heat-conducting pillar array extends to the adjacent area of ​​the cooling channel.

[0020] A further improvement is that a partitioned thermocouple is embedded in the substrate, with the thermocouple probe positions corresponding to the inner ring chamber, middle ring chamber, and outer ring chamber regions.

[0021] A further improvement is that it also includes a temperature control unit, which is connected to the coolant inlet and outlet via a pressure-resistant hose. The temperature control unit includes a circulating pump, a TEC semiconductor cooling chip, a heater, and a temperature sensor.

[0022] A further improvement is that it also includes a vacuum pump, which is connected to a vacuum interface via a vacuum pipeline, and the vacuum pump is integrated with the temperature control unit and installed inside the annular support frame.

[0023] A further improvement is that the temperature control unit is linked to the vacuum pump signal, and when the thermocouple detects an abnormal temperature, the vacuum pump power is automatically increased by 20%.

[0024] 3. Beneficial effects:

[0025] Compared with the prior art, the technical solution provided by this utility model has the following advantages:

[0026] (1) Comprehensive improvement in adsorption performance: The multi-level chamber combined with the distributed gas channel structure significantly improves the adsorption force at the wafer edge; the dual vacuum interface design greatly shortens the adsorption response time and effectively suppresses wafer warping.

[0027] (2) Precise and efficient temperature control: The spiral cooling channel and the heat-conducting column array work together to achieve uniform temperature distribution on the substrate surface; the zoned temperature monitoring system can dynamically respond to local heat load changes.

[0028] (3) Improved operational reliability: The fixed ceramic limiting plate achieves positioning without mechanical movement, while avoiding scratching the wafer edge and significantly reducing the risk of mechanical failure; the linkage control of the temperature control system and vacuum adsorption enhances stability under extreme working conditions.

[0029] It should be noted that the structures not described in this utility model are the same as or can be implemented using existing technology, and will not be elaborated here, as they do not involve the design points and improvement directions of this utility model. Attached Figure Description

[0030] Figure 1 This is a schematic diagram of the overall structure of this utility model;

[0031] Figure 2 This is a cross-sectional structural diagram of the present invention.

[0032] Explanation of the labels in the diagram:

[0033] 1. Substrate;

[0034] 2. Annular adsorption chamber; 21. Inner annular chamber; 22. Middle annular chamber; 23. Outer annular chamber;

[0035] 3. Vacuum channel; 31. Vacuum interface;

[0036] 4. Airway; 5. Micropore array;

[0037] 6. Cooling channel; 61. Inlet; 62. Outlet;

[0038] 7. Heat-conducting column array; 8. Annular support frame; 9. Arc-shaped limiting plate; 10. Temperature control unit; 11. Vacuum pump. Detailed Implementation

[0039] To facilitate understanding of this utility model, a more comprehensive description of the utility model will be given below with reference to the accompanying drawings, which show several embodiments of the utility model. However, the utility model can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of the utility model will be more thorough and complete. Example

[0040] Please see Figures 1-2 A wafer surface processing stage, the main components of which are as follows:

[0041] I. Component Installation and Structural Relationship

[0042] 1. Substrate 1 processing:

[0043] A circular platform is machined from a 6061 aluminum alloy forged blank.

[0044] The upper surface is anodized (film thickness 20μm) to improve wear resistance and insulation.

[0045] 2. Adsorption system integration:

[0046] Annular adsorption chamber 2: Inner annular chamber 21, middle annular chamber 22, and outer annular chamber 23 are milled inside the substrate 1;

[0047] Airway 4: Four sets of L-shaped airways are distributed at 90°, and are connected to three-level chambers through processing, eventually converging into the central airway;

[0048] Micropore array 5: Laser drilling (0.2 mm diameter, 2 mm spacing) is performed on the upper surface of the substrate 1 in the corresponding area of ​​the chamber, followed by polishing to ensure that it is connected to the gas path of the annular adsorption chamber 2.

[0049] 3. Cooling system installation:

[0050] Cooling channel 6: A spiral channel is formed inside the substrate 1 by 3D printing, 8mm from the upper surface;

[0051] Inlet 61 and outlet 62: Drill holes and tap wires on the side wall of substrate 1. Inlet 61 is located at the lower left and outlet 62 is located at the upper right.

[0052] 4. Auxiliary structure installation:

[0053] Heat-conducting pillar array 7: Vertical holes are drilled in the substrate 1 area between the four sets of air channels, and nickel-plated copper pillars are pressed in.

[0054] The curved limiting plate 9 is fixed to the substrate at a position symmetrically distributed at 90° by ceramic bolts, with a height of 0.3mm (compatible with 0.6mm thick wafers).

[0055] Circular support frame 8: Stainless steel flange is bolted to the bottom of base plate 1, with a reserved equipment compartment inside.

[0056] II. Operating Procedures and Working Principle

[0057] 1. Wafer placement stage:

[0058] The robotic arm places the wafer on the stage, and the wafer is placed into the center point of four arc-shaped limiting plates 9 that are symmetrically distributed at 90°.

[0059] 2. Vacuum adsorption stage:

[0060] Start vacuum pump 11, and the gas passes through the following sequentially: back side of wafer → micropore 5 → three-stage chamber → four sets of gas channels 4 → central gas channel → vacuum channel 3;

[0061] The dual vacuum interfaces 31 provide simultaneous suction, accelerating the adsorption force formed on the surface of the substrate 1.

[0062] 3. Temperature control stage:

[0063] Temperature control unit 10 pumps in 25℃ deionized water, with the flow direction as follows: inlet 61 → spiral channel 6 → outlet 62;

[0064] Heat transfer path: wafer → substrate 1 → thermal pillar array 7 → coolant;

[0065] The zoned thermocouples monitor the temperature of the chamber area in real time and feed it back to the temperature control unit to dynamically adjust the flow rate.

[0066] 4. Exception handling linkage:

[0067] When the thermocouple detects a local temperature rise, the temperature control unit 10 increases the coolant flow rate, and at the same time, the power of the vacuum pump 11 increases by 20% to compensate for the loss of adsorption force caused by thermal deformation.

[0068] 5. Reset after processing:

[0069] The vacuum and cooling systems are shut down, the robotic arm removes the wafer, and the stage is ready for the next cycle.

[0070] The main features implemented in this solution are:

[0071] 1. Mechanism for improving adsorption uniformity:

[0072] Four sets of 90° airways 4 → Balance the pressure distribution of the three-stage chambers and eliminate adsorption dead zones;

[0073] Dual vacuum interface 31 → shortens gas flow path and accelerates response.

[0074] 2. Temperature uniformity guarantee mechanism:

[0075] Spiral flow channel 6 surrounds vacuum channel 3 → heat exchange path covering the entire substrate area;

[0076] The heat-conducting column array 7 penetrates vertically to establish a rapid heat conduction channel between the adsorption zone and the cooling layer.

[0077] 3. System integration advantages mechanism:

[0078] The vacuum pump 11 and the temperature control unit 10 are built into the support frame 8, which shortens the pipeline length and reduces heat loss and flow resistance.

[0079] The above-described embodiments are merely illustrative of certain implementations of this utility model, and their descriptions are relatively specific and detailed. However, they should not be construed as limiting the scope of this utility model patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this utility model, and these modifications and improvements all fall within the protection scope of this utility model. Therefore, the protection scope of this utility model patent should be determined by the appended claims.

Claims

1. A stage for wafer surface processing, characterized in that: include: The substrate (1) is a circular metal platform; An annular adsorption chamber (2) is located inside the top side of the substrate (1), including an inner annular chamber (21), a middle annular chamber (22) and an outer annular chamber (23) that are concentrically distributed from the inside to the outside. Airways (4) are evenly distributed in the circumferential direction inside the substrate (1). Each airway connects the inner ring chamber (21), the middle ring chamber (22) and the outer ring chamber (23). The four airways converge into the central airway. Vacuum channel (3) is located inside the center of substrate (1), with the upper end connected to the central air channel and the lower end having two vacuum interfaces (31). A micropore array (5) penetrates the upper surface of the substrate (1) and is distributed in the area corresponding to the annular adsorption chamber (2), with a pore size of 0.1-0.5 mm; The cooling channel (6) is spirally coiled around the outside of the vacuum channel (3), with the inlet (61) located on the lower left side of the substrate and the outlet (62) located on the upper right side of the substrate. A heat-conducting column array (7) is vertically disposed in the substrate area between four sets of air channels (4); An annular support frame (8) is fixedly connected to the bottom of the substrate (1); Four ceramic arc-shaped limiting plates (9) are symmetrically distributed at 90° and fixed to the upper surface edge of the substrate (1), and the top height of the arc-shaped limiting plates (9) is lower than the thickness of the wafer they support.

2. The wafer surface processing stage according to claim 1, characterized in that: The heat-conducting column array (7) is made of copper-molybdenum alloy or nickel-plated copper, with a diameter of 1-3 mm, and the lower end of the heat-conducting column array (7) extends to the adjacent area of ​​the cooling channel (6).

3. The wafer surface processing stage according to claim 1, characterized in that: The substrate (1) is embedded with partitioned thermocouples, and the thermocouple probes are positioned to correspond to the substrate surface areas of the inner ring chamber (21), the middle ring chamber (22) and the outer ring chamber (23).

4. The wafer surface processing stage according to claim 1, characterized in that: It also includes a temperature control unit (10), which is connected to the coolant inlet (61) and outlet (62) via a pressure-resistant hose. The temperature control unit (10) includes a circulation pump, a TEC semiconductor cooling chip, a heater, and a temperature sensor.

5. A wafer surface processing stage according to claim 1, characterized in that: It also includes a vacuum pump (11), which is connected to a vacuum interface (31) via a vacuum pipeline, and the vacuum pump (11) and the temperature control unit (10) are integrated and installed inside the annular support frame (8).

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