Semiconductor structure and heat dissipation substrate

Abstract

The application provides a semiconductor structure and a heat dissipation substrate. The semiconductor structure comprises a heat dissipation substrate, a plurality of semiconductor elements and a plastic package. The heat dissipation substrate comprises a substrate body, a first metal layer and a second metal layer. The substrate body has a first surface and a second surface facing away from each other. The first metal layer is attached to the first surface of the substrate body and comprises spaced element setting parts and conductive connecting parts. The second metal layer is attached to the first surface of the substrate body and comprises external conductive parts opposite to the conductive connecting parts. The substrate body comprises through holes opposite to the conductive connecting parts, and the through holes are filled with conductive materials. The conductive connecting parts are electrically connected to the external conductive parts through the conductive materials. The plurality of semiconductor elements are arranged on the side of the element setting parts away from the substrate body and are electrically connected to the conductive connecting parts. The plastic package encapsulates the heat dissipation substrate and the plurality of semiconductor elements. The side of the external conductive parts away from the substrate body is exposed from the plastic package.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a semiconductor structure and a heat dissipation substrate. Background Technology

[0002] In traditional DBC module packaging structures, a field-effect transistor and a control chip are typically packaged together. Related technologies involve soldering the DBC onto a lead frame, which requires trimming excess material and bending to form the shape. This complex packaging process results in a relatively large finished product. Summary of the Invention

[0003] This application provides a semiconductor structure comprising:

[0004] A heat dissipation substrate includes a substrate body, a first metal layer, and a second metal layer. The substrate body has a first surface and a second surface that are opposite to each other. The first metal layer is attached to the first surface of the substrate body and includes spaced-apart component placement portions and conductive connection portions. The second metal layer is attached to the first surface of the substrate body and includes an external conductive portion opposite to the conductive connection portion. The substrate body includes a through hole opposite to the conductive connection portion, and the through hole is filled with a conductive material. The conductive connection portion and the opposite external conductive portion are electrically connected through the conductive material.

[0005] Multiple semiconductor elements are spaced apart on the side of the element placement portion away from the substrate body; and are electrically connected to the conductive connection portion.

[0006] A molding compound encapsulates the heat dissipation substrate and the plurality of semiconductor elements; wherein the external conductive portion is exposed outside the molding compound on the side opposite to the substrate body.

[0007] In some embodiments, the second metal layer further includes a heat dissipation portion that is electrically isolated from the external conductive portion.

[0008] In some embodiments, the component placement portion includes a spaced first component placement portion and a second component placement portion, and the conductive connection portion includes a spaced first conductive connection portion and a second conductive connection portion;

[0009] The plurality of semiconductor elements includes a first semiconductor element and a second semiconductor element;

[0010] The first semiconductor element is disposed in the first element setting portion, the second semiconductor element is disposed in the second element setting portion, the first semiconductor element is electrically connected to the first conductive connection portion, the second semiconductor element is connected to the second conductive connection portion, and the first semiconductor element is electrically connected to the second semiconductor element.

[0011] In some embodiments, the first semiconductor element is a control chip, and the second semiconductor element is a field-effect transistor (FET), the FET having a source, a drain, and a gate, the drain of the FET being electrically connected to the second element placement portion; the semiconductor structure further includes:

[0012] The first type of connection lead is used to connect the control chip to the first conductive connection portion, and the control chip to the gate of the field-effect transistor;

[0013] The second type of connecting lead is used to connect the source of the field-effect transistor to the second conductive connection portion.

[0014] In some embodiments, the plurality of semiconductor elements further includes a third semiconductor element disposed on the second element placement portion and spaced apart from the second semiconductor element, wherein the third semiconductor element is connected to the second semiconductor element and the second conductive connection portion.

[0015] In some embodiments, the first semiconductor element is a control chip, the second semiconductor element is an insulated-gate bipolar transistor (IGBT), and the third semiconductor element is a fast recovery diode; the IGBT has an emitter, a collector, and a gate, and the collector of the IGBT is electrically connected to the second element placement portion; the semiconductor structure further includes:

[0016] The first type of connection lead is used to connect the control chip to the first conductive connection portion, and the control chip to the gate of the insulated gate bipolar transistor;

[0017] The second type of connecting lead is used to connect the emitter of the insulated gate bipolar transistor, the fast recovery diode, and the second conductive connection portion.

[0018] In some embodiments, there are multiple first conductive connections and multiple second conductive connections. Some of the first conductive connections, the first element placement portion, the second element placement portion, and the second conductive connections are arranged in the first direction; another portion of the first conductive connections are arranged on at least one side of the first element placement portion in the second direction.

[0019] In some embodiments, the cross-sectional dimensions of the second type of connecting lead are larger than those of the first type of connecting lead.

[0020] This application also provides a heat dissipation substrate, which includes a substrate body, a first metal layer and a second metal layer;

[0021] A substrate body having a first surface and a second surface that are opposite to each other;

[0022] A first metal layer is attached to the first surface of the substrate body and includes spaced element placement portions and conductive connection portions.

[0023] The second metal layer is attached to the first surface of the substrate body and includes an external conductive portion opposite to the conductive connection portion;

[0024] The substrate body includes a through hole opposite to the conductive connection portion, the through hole is filled with conductive material, and the conductive connection portion is electrically connected to the opposite external conductive portion through the conductive material.

[0025] In some embodiments, the conductive connection portion includes a plurality of first conductive connection portions and a plurality of second conductive connection portions; the component placement portion includes spaced-apart first component placement portions and second component placement portions;

[0026] A portion of the first conductive connection portion, the first element placement portion, the second element placement portion, and the second conductive connection portion are arranged in the first direction; another portion of the first conductive connection portion is arranged on at least one side of the first element placement portion in the second direction.

[0027] The main technical effects achieved by the embodiments of this application are:

[0028] The semiconductor structure provided in this application embodiment includes a heat dissipation substrate comprising a first metal layer with spaced element placement portions and conductive connection portions; a second metal layer comprising an external conductive portion opposite to the conductive connection portion; and a substrate body comprising a through hole opposite to the conductive connection portion. The through hole is filled with conductive material, and the conductive connection portion and the opposite external conductive portion are electrically connected through the conductive material. This allows for the electrical lead-out of semiconductor elements through the conductive material in the through hole and the external conductive portion of the conductive connection portion. Compared to related technologies, the structure of the heat dissipation substrate combined with a traditional lead frame reduces the process steps of removing residual edges and bending the lead frame, improves manufacturing efficiency, and facilitates product size control. Attached Figure Description

[0029] Figure 1 This is a side view of a semiconductor structure provided in an exemplary embodiment of this application;

[0030] Figure 2 This is a side view of a partial structure of a semiconductor structure provided in an exemplary embodiment of this application;

[0031] Figure 3 This is a side view of another semiconductor structure provided in an exemplary embodiment of this application;

[0032] Figure 4This is a side view of a partial structure of another semiconductor structure provided in an exemplary embodiment of this application;

[0033] Figure 5 This is a flowchart illustrating a method for fabricating a semiconductor structure according to an exemplary embodiment of this application;

[0034] Figures 6 to 12 Cross-sectional views corresponding to different process stages of a semiconductor structure fabrication method provided using an exemplary embodiment of this application. Detailed Implementation

[0035] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numerals in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0036] The terminology used in this application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The singular forms “a,” “the,” and “the” used in this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and includes any or all possible combinations of one or more of the associated listed items.

[0037] The following is in conjunction with the appendix Figures 1 to 12 The following describes some embodiments of this application in detail. Unless otherwise specified, the embodiments and features described below can be combined with each other.

[0038] Reference Figure 1 and Figure 2 The semiconductor structure 100 includes a heat dissipation substrate 10, multiple semiconductor elements, and a plastic encapsulation 40.

[0039] The heat dissipation substrate 10 includes a substrate body 11, a first metal layer 12, and a second metal layer 13. The substrate body 11 has a first surface S1 and a second surface S2 that are opposite to each other. The first metal layer 12 is attached to the first surface S1 of the substrate body 11 and includes spaced-apart component placement portions 1210 and conductive connection portions 1220. The second metal layer 13 is attached to the first surface S1 of the substrate body 11 and includes an external conductive portion 131 opposite to the conductive connection portion 1220. The substrate body 11 includes a through hole 101 opposite to the conductive connection portion 1220. The through hole 101 is filled with a conductive material 111. The conductive connection portion 1220 and the opposite external conductive portion 131 are electrically connected through the conductive material 111.

[0040] The heat dissipation substrate 10 may be a ceramic substrate (DBC). Correspondingly, the substrate body 11 may be made of ceramic. The first metal layer may be a copper layer. The second metal layer may be a copper layer.

[0041] Multiple semiconductor elements are spaced apart on the side of the element placement portion 1210 away from the substrate body 11; and are electrically connected to the conductive connection portion 1220.

[0042] The molding compound 40 encapsulates the heat dissipation substrate 10 and the plurality of semiconductor elements. The external conductive portion 131 is exposed from the molding compound 40 on the side opposite to the substrate body 11, so as to realize the electrical lead-out of the semiconductor elements inside the semiconductor structure.

[0043] In some embodiments, the conductive material 111 is copper.

[0044] In some embodiments, the second metal layer 13 further includes a heat dissipation portion 132 that is electrically isolated from the external conductive portion 131.

[0045] like Figure 1 and Figure 2 As shown, in some embodiments, the component setting portion 1210 includes a first component setting portion 1211 and a second component setting portion 1212 spaced apart, and the conductive connection portion 1220 includes a first conductive connection portion 1221 and a second conductive connection portion 1222 spaced apart.

[0046] The plurality of semiconductor elements may include a first semiconductor element 21, a second semiconductor element 22, and a third semiconductor element 23. The first semiconductor element 21 is disposed in the first element placement portion 1211. The second semiconductor element 22 and the third semiconductor element 23 are both disposed in the second element placement portion 1212 and are spaced apart. The first semiconductor element 21 is electrically connected to the first conductive connection portion 1221, and the first semiconductor element 21 is electrically connected to the second semiconductor element 22. The second semiconductor element 22 is connected to the second conductive connection portion 1222 via the third semiconductor element 23.

[0047] Specifically, the first semiconductor element 21 may be a control chip, the second semiconductor element 22 may be an insulated gate bipolar transistor (IGBT), and the third semiconductor element 23 may be a fast recovery diode (FRD). The insulated gate bipolar transistor has an emitter, a collector, and a gate, and the collector of the insulated gate bipolar transistor is electrically connected to the second element placement portion 1212.

[0048] The semiconductor structure 100 also includes a first type of connection lead 32 and a second type of connection lead 31.

[0049] In this embodiment, the first type of connection lead 32 is used to connect the control chip to the first conductive connection portion 1221, and the control chip to the gate of the insulated gate bipolar transistor. The second type of connection lead 31 is used to connect the emitter of the insulated gate bipolar transistor, the fast recovery diode, and the second conductive connection portion 1222.

[0050] The third semiconductor element 23 is a fast recovery diode, which has an anode and a cathode. The anode of the fast recovery diode is electrically connected to the second element mounting portion 1212, which is oriented towards the second element mounting portion 1212. Correspondingly, in this embodiment, the second semiconductor element 22 is an insulated gate bipolar transistor (IGBT), and the semiconductor structure 100 can be an intelligent power module (IPM) structure having a fast recovery diode and an IGBT module.

[0051] In some embodiments, the cross-sectional dimension of the second type of connecting lead 31 is larger than that of the first type of connecting lead 32. That is, the second type of connecting lead 31 is thicker and has a larger current carrying capacity than the first type of connecting lead 32.

[0052] In some embodiments, the first type of connecting lead 32 may be a copper wire. In some embodiments, the second type of connecting lead 31 may be an aluminum wire.

[0053] The semiconductor structure 100 also includes a first solder 52 disposed on the first element placement portion 1211 for fixing a corresponding semiconductor element, such as fixing the first semiconductor element 21. The first solder 52 may be silver.

[0054] The semiconductor structure 100 also includes a second solder 51 disposed on the base island for fixing corresponding semiconductor elements, such as fixing the second semiconductor element 22 and the third semiconductor element 23. The second solder 51 may be tin.

[0055] like Figure 1 and Figure 2 In the illustrated embodiment, there are multiple first conductive connection portions 1221 and multiple second conductive connection portions 1222. A portion of the first conductive connection portions 1221, the first element placement portion 1211, the second element placement portion 1212, and the second conductive connection portions 1222 are arranged in the first direction W. In this embodiment, another portion of the first conductive connection portions 1221 are arranged on opposite sides of the first element placement portion 1211 in the second direction L, facilitating the arrangement of multiple first conductive connection portions 1221 and second conductive connection portions 1222.

[0056] It should be noted that, in some other embodiments, some of the first conductive connection portion 1221, the first element setting portion 1211, the second element setting portion 1212 and the second conductive connection portion 1222 are arranged in the first direction W, and another portion of the first conductive connection portion 1221 is arranged on one side of the first element setting portion 1211 in the second direction L.

[0057] In some other embodiments, all the first conductive connection portions 1221, the first element setting portion 1211, the second element setting portion 1212, and all the second conductive connection portions 1222 may be arranged in the first direction W. Compared to arranging all the first conductive connection portions 1221, the first element setting portion 1211, the second element setting portion 1212, and the second conductive connection portions 1222 in the first direction W, the aforementioned arrangement of some of the first conductive connection portions 1221, the first element setting portion 1211, the second element setting portion 1212, and the second conductive connection portions 1222 in the first direction W is more conducive to the setting of multiple conductive connection portions 1220.

[0058] like Figure 3 and Figure 4 As shown, in some other embodiments, in the semiconductor structure 200, the element placement portion 1210 includes a first element placement portion 1211 and a second element placement portion 1212 spaced apart, and the conductive connection portion 1220 includes a first conductive connection portion 1221 and a second conductive connection portion 1222 spaced apart.

[0059] The plurality of semiconductor elements may include a first semiconductor element 21 and a second semiconductor element 22, but not a third semiconductor element.

[0060] Wherein, the first semiconductor element 21 is disposed in the first element setting portion 1211, the second semiconductor element 22 is disposed in the second element setting portion 1212, the first semiconductor element 21 is electrically connected to the first conductive connection portion 1221, the second semiconductor element 22 is connected to the second conductive connection portion 1222, and the first semiconductor element 21 and the second semiconductor element 22 are electrically connected.

[0061] In some embodiments, the first semiconductor element 21 is a control chip, and the second semiconductor element 22 is a field-effect transistor (FET). The FET has a source, a drain, and a gate, and the drain of the FET is electrically connected to the second element placement portion 1212.

[0062] The first type of connection lead 32 is used to connect the control chip to the first conductive connection portion 1221, and the control chip to the gate of the field-effect transistor.

[0063] The second type of connecting lead 31 is used to connect the source of the field-effect transistor to the second conductive connection portion 1222.

[0064] Understandably, Figure 3 and Figure 4 In the illustrated embodiment, the field-effect transistor can be a silicon carbide field-effect transistor (SiC-MOSFET).

[0065] like Figure 5 As shown, this application also provides a method for fabricating a semiconductor structure 100, which may include the following steps S101, S103 and S105:

[0066] In step S101, a heat dissipation substrate is provided. The heat dissipation substrate includes a substrate body, a first metal layer, and a second metal layer. The substrate body has a first surface and a second surface that are opposite to each other. The first metal layer is attached to the first surface of the substrate body and includes spaced-apart component placement portions and conductive connection portions. The second metal layer is attached to the first surface of the substrate body and includes an external conductive portion opposite to the conductive connection portion. The substrate body includes a through hole opposite to the conductive connection portion. The through hole is filled with a conductive material. The conductive connection portion and the opposite external conductive portion are electrically connected through the conductive material.

[0067] In step S103, a plurality of semiconductor elements are disposed at intervals on the side of the element placement portion away from the substrate body; and are electrically connected to the conductive connection portion.

[0068] In step S105, a molding compound is formed, which encapsulates the heat dissipation substrate and the plurality of semiconductor elements; wherein the external conductive portion is exposed from the molding compound on the side opposite to the substrate body.

[0069] The following combination Figures 7 to 12 As shown, taking the fabrication of semiconductor structure 100 as an example, the above fabrication method is described in detail.

[0070] like Figure 6 As shown, in step S101, a heat dissipation substrate 10 is provided. The heat dissipation substrate 10 includes a substrate body 11, a first metal layer 12, and a second metal layer 13. The substrate body 11 has a first surface S1 and a second surface S2 that are opposite to each other. The first metal layer 12 is attached to the first surface S1 of the substrate body 11 and includes spaced-apart element placement portions 1210 and conductive connection portions 1220. The second metal layer 13 is attached to the first surface S1 of the substrate body and includes an external conductive portion 131 opposite to the conductive connection portion 1220. The substrate body 11 includes a through hole 101 opposite to the conductive connection portion 1220. The through hole 101 is filled with a conductive material 111. The conductive connection portion 1220 and the opposite external conductive portion 131 are electrically connected through the conductive material 111.

[0071] The heat dissipation substrate 10 may be a ceramic substrate (DBC). Correspondingly, the substrate body 11 may be made of ceramic. The first metal layer may be a copper layer. The second metal layer may be a copper layer.

[0072] like Figures 7 to 10 As shown, in step S103, a plurality of semiconductor elements are provided, and the plurality of semiconductor elements are spaced apart on the side of the element setting portion 1210 away from the substrate body 11; and are electrically connected to the conductive connection portion 1220.

[0073] The component setting section 1210 includes a first component setting section 1211 and a second component setting section 1212 spaced apart. Setting multiple semiconductor components in step S103 may include the following steps S1031 to S1034.

[0074] In step S1031, a first solder is applied to the second component setting section.

[0075] like Figure 7 As shown, in some embodiments, a second solder 51 is provided in the second element setting section 1212.

[0076] In step S1032, a semiconductor element is placed on the first solder and then cured.

[0077] like Figure 8 As shown, in some embodiments, a second semiconductor element 22 and a third semiconductor element 23 are disposed on the second solder 51 and then cured.

[0078] The second solder 51 can be made of tin. It can be cured by reflow soldering.

[0079] In step S1033, a first solder is provided in the first component setting section. The first solder is different from the second solder.

[0080] like Figure 9 As shown, in some embodiments, a first solder 52 is provided in the first element setting section 1211.

[0081] The first solder 52 is different from the second solder 51. The material of the first solder 52 can be silver.

[0082] In step S1034, a semiconductor element is placed on the second solder and then cured.

[0083] like Figure 10 As shown, in some embodiments, a first semiconductor element 21 is disposed on the first solder 52 and then cured.

[0084] When the first solder 52 is silver, the curing process in step S1034 can be carried out by heating, room temperature curing, or UV light curing lamp.

[0085] After setting multiple semiconductor elements in step S103, the method may include: setting connecting leads to achieve electrical connection between different semiconductor elements and connection between semiconductor elements and conductive connection portion 1220.

[0086] like Figure 11 As shown, a first type of connecting lead 32 and a second type of connecting lead 31 can be provided.

[0087] In some embodiments, the cross-sectional dimension of the second type of connecting lead 31 is larger than that of the first type of connecting lead 32. That is, the second type of connecting lead 31 is thicker and has a larger current carrying capacity than the first type of connecting lead 32.

[0088] In some embodiments, a second type of connecting lead 31 may be provided first, followed by a first type of connecting lead 32. The second type of connecting lead 31 may be an aluminum wire. The first type of connecting lead 32 may be a copper wire.

[0089] like Figure 12As shown, in step S105, a molding compound 40 is formed, which encapsulates the heat dissipation substrate 10 and the plurality of semiconductor elements; wherein, the external conductive portion 131 is exposed from the molding compound 40 on the side opposite to the substrate body 11.

[0090] It should be noted that, in some embodiments, when fabricating the semiconductor structure, the heat dissipation substrate used may be a substrate having a substrate unit, and using such a substrate can form only one semiconductor structure.

[0091] In other embodiments, the heat dissipation substrate used may be a substrate integrating multiple substrate units, and multiple semiconductor structures can be formed using such a substrate. Each substrate unit may correspond to one semiconductor structure. Accordingly, after forming the molding compound 40, the method may further include a slitting step to form multiple semiconductor structures 100.

[0092] This application also provides a heat dissipation substrate 10. The heat dissipation substrate 10 includes a substrate body 11, a first metal layer 12 and a second metal layer 13.

[0093] The substrate body 11 has a first surface S1 and a second surface S2 that are opposite to each other;

[0094] The first metal layer 12 is attached to the first surface S1 of the substrate body 11 and includes spaced element placement portions 1210 and conductive connection portions 1220.

[0095] The second metal layer 13 is attached to the first surface S1 of the substrate body and includes an external conductive portion 131 opposite to the conductive connection portion 1220;

[0096] The substrate body 11 includes a through hole 101 opposite to the conductive connection portion 1220. The through hole 101 is filled with a conductive material 111, and the conductive connection portion 1220 is electrically connected to the opposite external conductive portion 131 through the conductive material 111.

[0097] The specific structure of the heat dissipation substrate 10 can be referred to the relevant descriptions in the above embodiments, and will not be repeated here. It should be noted that in some embodiments, when fabricating the semiconductor structure 100, the substrate used may be a substrate having a substrate unit, and the lead frame used may be a lead frame structure having a lead frame unit. Using such a substrate and lead frame, only one semiconductor structure 100 can be formed.

[0098] In other embodiments, the substrate integrating multiple substrate units uses a lead frame that integrates corresponding multiple lead frame units. Using such a substrate and lead frame, multiple semiconductor structures 100 can be formed. Each lead frame unit and one substrate unit corresponds to one semiconductor structure 100. Accordingly, after forming the molding compound 4050 and before bending the leads included in the lead frame, the method may further include a slitting step to form multiple semiconductor structures 100.

[0099] Other embodiments of this application will readily occur to those skilled in the art upon consideration of the specification and practice of the disclosure herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this application are indicated by the following claims.

[0100] It should be understood that this application is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this application is limited only by the appended claims.

Claims

1. A semiconductor structure, characterized in that, include: A heat dissipation substrate includes a substrate body, a first metal layer, and a second metal layer. The substrate body has a first surface and a second surface that are opposite to each other. The first metal layer is attached to the first surface of the substrate body and includes spaced-apart component placement portions and conductive connection portions. The second metal layer is attached to the first surface of the substrate body and includes an external conductive portion opposite to the conductive connection portion. The substrate body includes a through hole opposite to the conductive connection portion, and the through hole is filled with a conductive material. The conductive connection portion and the opposite external conductive portion are electrically connected through the conductive material. Multiple semiconductor elements are spaced apart on the side of the element placement portion away from the substrate body; and are electrically connected to the conductive connection portion. A molding compound encapsulates the heat dissipation substrate and the plurality of semiconductor elements; wherein the external conductive portion is exposed outside the molding compound on the side opposite to the substrate body.

2. The semiconductor structure as described in claim 1, characterized in that, The second metal layer also includes a heat dissipation portion that is electrically isolated from the external conductive portion.

3. The semiconductor structure as described in claim 1, characterized in that, The component setting part includes a first component setting part and a second component setting part spaced apart, and the conductive connection part includes a first conductive connection part and a second conductive connection part spaced apart; The plurality of semiconductor elements includes a first semiconductor element and a second semiconductor element; The first semiconductor element is disposed in the first element setting portion, the second semiconductor element is disposed in the second element setting portion, the first semiconductor element is electrically connected to the first conductive connection portion, the second semiconductor element is connected to the second conductive connection portion, and the first semiconductor element is electrically connected to the second semiconductor element.

4. The semiconductor structure as described in claim 3, characterized in that, The first semiconductor element is a control chip, and the second semiconductor element is a field-effect transistor (FET). The FET has a source, a drain, and a gate, and the drain of the FET is electrically connected to the second element mounting portion. The semiconductor structure also includes: The first type of connection lead is used to connect the control chip to the first conductive connection portion, and the control chip to the gate of the field-effect transistor; The second type of connecting lead is used to connect the source of the field-effect transistor to the second conductive connection portion.

5. The semiconductor structure as described in claim 3, characterized in that, The plurality of semiconductor elements further includes a third semiconductor element, which is disposed in the second element placement portion and spaced apart from the second semiconductor element, wherein the third semiconductor element is connected to the second semiconductor element and the second conductive connection portion.

6. The semiconductor structure as described in claim 5, characterized in that, The first semiconductor element is a control chip, the second semiconductor element is an insulated-gate bipolar transistor (IGBT), and the third semiconductor element is a fast recovery diode; the IGBT has an emitter, a collector, and a gate, and the collector of the IGBT is electrically connected to the second element's mounting portion; the semiconductor structure further includes: The first type of connection lead is used to connect the control chip to the first conductive connection portion, and the control chip to the gate of the insulated gate bipolar transistor; The second type of connecting lead is used to connect the emitter of the insulated gate bipolar transistor, the fast recovery diode, and the second conductive connection portion.

7. The semiconductor structure as described in claim 3 or 6, characterized in that, There are multiple first conductive connection portions and multiple second conductive connection portions. Some of the first conductive connection portions, the first element setting portion, the second element setting portion and the second conductive connection portion are arranged in a first direction; another portion of the first conductive connection portions are arranged on at least one side of the first element setting portion in a second direction.

8. The semiconductor structure as described in claim 1, characterized in that, The cross-sectional dimensions of the second type of connecting wire are larger than those of the first type of connecting wire.

9. A heat dissipation substrate, characterized in that, The heat dissipation substrate includes a substrate body, a first metal layer and a second metal layer; A substrate body having a first surface and a second surface that are opposite to each other; A first metal layer is attached to the first surface of the substrate body and includes spaced element placement portions and conductive connection portions. The second metal layer is attached to the first surface of the substrate body and includes an external conductive portion opposite to the conductive connection portion; The substrate body includes a through hole opposite to the conductive connection portion, the through hole is filled with conductive material, and the conductive connection portion is electrically connected to the opposite external conductive portion through the conductive material.

10. The heat dissipation substrate as described in claim 9, characterized in that, The conductive connection portion includes a plurality of first conductive connection portions and a plurality of second conductive connection portions; the component placement portion includes spaced first component placement portions and second component placement portions. A portion of the first conductive connection portion, the first element placement portion, the second element placement portion, and the second conductive connection portion are arranged in a first direction; another portion of the first conductive connection portion is arranged on at least one side of the first element placement portion in a second direction.

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