A semiconductor package structure

Abstract

The utility model belongs to the technical field of semiconductor packaging, and disclose a kind of semiconductor packaging structure, including semiconductor chip board;The surface of semiconductor chip board is equipped with packaging assembly, and the packaging assembly includes the substrate of the bottom surface of semiconductor chip board and four respectively installed in the foot brace of the four corners of the substrate and the metal sheet one for packaging heat dissipation, metal sheet two, upper packaging plate, lower packaging plate, positioning rod;The surface of upper packaging plate is equipped with sealing assembly, and the sealing assembly includes the sealing ring of the connecting place of upper packaging plate and lower packaging plate, the utility model has the advantages that the heat generated by chip can be conveniently heat dissipation treatment, avoid unable fast, effectively the heat generated by chip is transmitted to external environment, lead to a large amount of heat accumulation in the inside of packaging, cause chip operating temperature to rise, influence the normal performance of chip, and the connecting gap of packaging can be sealed and handled.

Description

Technical Field

[0001] This utility model belongs to the field of semiconductor packaging technology, specifically a semiconductor packaging structure. Background Technology

[0002] With the rapid development of semiconductor technology, semiconductor devices are widely used in numerous fields such as consumer electronics, automotive electronics, industrial control, and aerospace, becoming a core foundational component driving modern technological progress. Semiconductor packaging, as a crucial step in the semiconductor device manufacturing process, primarily functions to physically protect the chip from damage caused by external environmental factors such as dust, moisture, and mechanical impact. Simultaneously, it establishes the electrical connection between the chip and external circuits, ensuring stable and reliable chip operation.

[0003] In existing technologies, semiconductor packaging structures typically employ metal, ceramic, or plastic casings. Electrical connections between the chip and external pins are achieved through wire bonding, flip-chip bonding, and other methods. Packaging materials are then used to encapsulate the chip and its internal interconnects. However, existing semiconductor packaging structures generally suffer from insufficient heat dissipation performance in practical applications. Specifically, as the integration density of semiconductor chips continues to increase, the heat generated during operation increases dramatically. Existing packaging structures often have inadequate heat dissipation path designs and low thermal conductivity of the packaging materials, failing to quickly and effectively transfer the heat generated by the chip to the external environment. This results in a significant accumulation of heat inside the package, leading to an increase in chip operating temperature. This not only reduces the performance of semiconductor devices, causing issues such as decreased processing speed, increased signal transmission delay, and increased power consumption, but also...

[0004] At the same time, existing semiconductor packaging structures also have significant defects in sealing gaps at the packaging area. During the packaging process, due to the large difference in the coefficients of thermal expansion between the packaging material, the chip, and the packaging shell, gaps are easily generated at the packaging area during packaging and subsequent use due to factors such as temperature changes, vibration, and mechanical stress. This makes it impossible to effectively prevent harmful substances such as dust, moisture, and corrosive gases from the external environment from entering the packaging interior.

[0005] Therefore, a semiconductor packaging structure is proposed to address the above problems. Utility Model Content

[0006] To address the problems mentioned in the background art, this utility model provides a semiconductor packaging structure that can conveniently dissipate heat generated by the chip, avoiding the inability to quickly and effectively transfer the heat generated by the chip to the external environment, which would lead to a large amount of heat accumulating inside the package, causing the chip's operating temperature to rise and affecting the chip's normal performance. It also has the advantages of being able to seal the connection gaps of the package.

[0007] To achieve the above objectives, this utility model provides the following technical solution: a semiconductor packaging structure, including a semiconductor chip board;

[0008] The surface of the semiconductor chip board is equipped with a packaging assembly, which includes a substrate mounted on the bottom surface of the semiconductor chip board, four feet respectively mounted at the four corners of the substrate, and metal sheet one, metal sheet two, upper packaging plate, lower packaging plate, and positioning rod for heat dissipation.

[0009] A sealing assembly is installed on the surface of the upper encapsulation plate. The sealing assembly includes a sealing ring fitted at the connection between the upper encapsulation plate and the lower encapsulation plate, and epoxy resin colloid filling the gap between the upper encapsulation plate and the lower encapsulation plate.

[0010] Preferably, the semiconductor chip board is disposed inside the lower packaging plate, the foot support is attached to the inside of the lower packaging plate, the four positioning rods are respectively installed at the four corners of the upper packaging plate, and the positioning rods are inserted into the positioning holes opened on the surface of the lower packaging plate. The upper packaging plate and the lower packaging plate are detachably connected by bolts. Metal sheet one is embedded inside the lower packaging plate, and metal sheet two is embedded inside the upper packaging plate.

[0011] Preferably, the outer surfaces of the first metal sheet and the second metal sheet are at the same level as the lower encapsulation plate and the upper encapsulation plate, respectively.

[0012] Preferably, the contact surfaces of the second metal sheet and the semiconductor chip plate are coated with thermally conductive silicone.

[0013] Preferably, the first metal sheet and the second metal sheet are copper heat sinks.

[0014] Preferably, the foot support is detachably connected to the interior of the lower encapsulation plate by bolts.

[0015] Preferably, a retaining strip is installed on the inner side of the sealing ring, the retaining strip is engaged in a retaining groove opened on the surface of the upper and lower encapsulation plates, and the sealing ring and the retaining strip are elastically fitted and engaged between the upper and lower encapsulation plates.

[0016] Compared with the prior art, the beneficial effects of this utility model are as follows:

[0017] 1. This utility model incorporates a packaging component, including two metal sheets, specifically designed for heat dissipation. This component can quickly conduct heat generated during the operation of the semiconductor chip board, solving the problem of heat accumulation caused by unreasonable heat dissipation paths and low thermal conductivity in existing packaging structures, and effectively reducing the chip's operating temperature.

[0018] 2. This utility model incorporates a sealing component. A retaining strip is installed on the inner side of the sealing ring, and the strip engages with the slots of the upper and lower sealing plates. This, combined with an elastic interference fit, creates a dual fixing method that ensures the sealing ring fits tightly against the upper and lower sealing plates, further enhancing the sealing tightness and preventing dust and moisture intrusion over a long period. This significantly improves the reliability and durability of the seal. The epoxy resin colloid fills the joint gaps, further filling tiny gaps and forming a comprehensive sealing barrier. Attached Figure Description

[0019] Figure 1 This is a schematic diagram of the overall structure of this utility model;

[0020] Figure 2 This is a schematic diagram of the structure of the semiconductor chip board, upper packaging board, and lower packaging board of this utility model;

[0021] Figure 3 This is a schematic diagram of the structure of the lower packaging plate and substrate of this utility model;

[0022] Figure 4 This is a schematic diagram of the lower packaging plate and metal sheet of this utility model;

[0023] Figure 5 This is a schematic cross-sectional view of the upper packaging plate of this utility model.

[0024] In the diagram: 1. Semiconductor chip board; 2. Packaging assembly; 21. Substrate; 22. Foot support; 23. Metal sheet one; 24. Metal sheet two; 25. Upper packaging board; 26. Lower packaging board; 27. Positioning rod; 28. Thermally conductive silicone; 3. Sealing assembly; 31. Sealing ring; 32. Epoxy resin colloid; 33. Clip. Detailed Implementation

[0025] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0026] like Figures 1 to 5 As shown, this utility model provides a semiconductor packaging structure, including a semiconductor chip board 1;

[0027] A packaging assembly 2 is mounted on the surface of a semiconductor chip board 1. The packaging assembly 2 includes a substrate 21 mounted on the bottom surface of the semiconductor chip board 1, four feet 22 respectively mounted at the four corners of the substrate 21, and metal sheet 23, metal sheet 24, upper packaging plate 25, lower packaging plate 26, and positioning rod 27 for heat dissipation.

[0028] The semiconductor chip board 1 is disposed inside the lower packaging board 26. The foot support 22 is attached to the inside of the lower packaging board 26. Four positioning rods 27 are respectively installed at the four corners of the upper packaging board 25, and the positioning rods 27 are inserted into the positioning holes opened on the surface of the lower packaging board 26. The upper packaging board 25 and the lower packaging board 26 are detachably connected by bolts. Metal sheet 1 23 is embedded inside the lower packaging board 26, and metal sheet 24 is embedded inside the upper packaging board 25. The metal sheet 1 23 and metal sheet 24 are set up specifically for heat dissipation of the package, which can quickly conduct the heat generated by the semiconductor chip board 1 during operation. This solves the problem of heat accumulation caused by unreasonable heat dissipation path and low thermal conductivity in the existing packaging structure, and effectively reduces the chip operating temperature.

[0029] The outer surfaces of metal sheet 23 and metal sheet 24 are at the same level as the lower encapsulation plate 26 and the upper encapsulation plate 25, respectively, thereby ensuring heat dissipation efficiency and allowing internal heat to be transferred to the outside.

[0030] The contact surface between the metal sheet 24 and the semiconductor chip board 1 is coated with thermally conductive silicone 28, which makes the metal sheet 24 and the semiconductor chip board 1 form a tight thermal conduction connection, greatly reducing thermal resistance, improving the efficiency of heat transfer from the semiconductor chip board 1 to the metal sheet 24, further enhancing the overall heat dissipation effect, and avoiding local heat accumulation.

[0031] Metal sheet 1 (23) and metal sheet 2 (24) use copper heat sinks. Copper has excellent thermal conductivity and can quickly absorb and conduct heat.

[0032] The foot support 22 is detachably connected to the inside of the lower packaging plate 26 by bolts, which facilitates the disassembly, maintenance or replacement of the semiconductor chip board 1.

[0033] A sealing component 3 is installed on the surface of the upper encapsulation plate 25. The sealing component 3 includes a sealing ring 31 sleeved at the connection between the upper encapsulation plate 25 and the lower encapsulation plate 26 and an epoxy resin colloid 32 filled in the gap between the upper encapsulation plate 25 and the lower encapsulation plate 26.

[0034] A retaining strip 33 is installed on the inner side of the sealing ring 31. The retaining strip 33 is engaged in the slots opened on the surfaces of the upper encapsulation plate 25 and the lower encapsulation plate 26. The sealing ring 31 and the retaining strip 33 are elastically and interference-fitted between the upper encapsulation plate 25 and the lower encapsulation plate 26. The retaining strip 33 is installed on the inner side of the sealing ring 31 and is engaged in the slots of the upper encapsulation plate 25 and the lower encapsulation plate 26 through the retaining strip 33. With the elastically and interference-fitted engagement, this dual fixing method of engagement and interference fit makes the sealing ring 31 fit tightly with the upper encapsulation plate 25 and the lower encapsulation plate 26, further improving the sealing tightness, preventing dust and moisture intrusion for a long time, and significantly enhancing the sealing reliability and durability. The epoxy resin colloid 32 fills the joint gaps, which can further fill the tiny gaps and form a comprehensive sealing barrier.

[0035] Among them, the structures such as semiconductor chip board 1, upper packaging board 25 and lower packaging board 26 are existing technologies, and their working principles are well-known technologies. The appropriate model is selected according to the actual use.

[0036] Working principle and process: The pre-treated metal sheet 23 is embedded into the preset groove inside the lower encapsulation plate 26, ensuring that the outer side of the metal sheet 23 is flush with the horizontal plane of the lower encapsulation plate 26. During the embedding process, avoid damaging the surface of the metal sheet 23 and the internal structure of the lower encapsulation plate 26. The four feet 22 are respectively attached to the preset installation positions inside the lower encapsulation plate 26. The feet 22 are detachably connected to the lower encapsulation plate 26 by bolts. When tightening the bolts, control the force to prevent the feet 22 from deforming or the lower encapsulation plate 26 from being damaged. The pre-treated metal sheet 24 is embedded into the preset groove inside the upper encapsulation plate 25, ensuring that the outer side of the metal sheet 24 is flush with the horizontal plane of the upper encapsulation plate 25. The upper encapsulation plate 25 is aligned with the lower encapsulation plate 26, so that the positioning rods 27 at the four corners of the upper encapsulation plate 25 are accurately inserted into the positioning holes opened on the surface of the lower encapsulation plate 26. Through the cooperation of the positioning rods 27 and the positioning holes, the relative position of the upper encapsulation plate 25 and the lower encapsulation plate 26 is accurate, avoiding any offset.

[0037] After positioning, the upper packaging plate 25 and the lower packaging plate 26 are detachably connected using bolts. The bolts are tightened in sequence according to the preset bolt installation sequence and tightening torque to ensure that the upper packaging plate 25 and the lower packaging plate 26 are tightly and firmly connected, while avoiding deformation of the packaging plate due to uneven bolt tightening force. During this process, the metal sheet 24 is tightly attached to the thermally conductive silicone 28 on the surface of the semiconductor chip board 1 to form an effective heat conduction path.

[0038] The gap between the upper encapsulation plate 25 and the lower encapsulation plate 26 is filled with epoxy resin 32. During the filling process, it is necessary to ensure that the colloid evenly covers the entire gap without bubbles or voids. After the epoxy resin colloid 32 has cured, the sealing performance of the encapsulation structure is further enhanced, effectively preventing external dust, moisture and other harmful substances from entering the encapsulation.

[0039] Then, the sealing ring 31 with the retaining strip 33 is aligned with the connection between the upper encapsulation plate 25 and the lower encapsulation plate 26, so that the retaining strip 33 on the inner side of the sealing ring 31 is engaged in the groove opened on the surface of the encapsulation plate. The sealing ring 31 and the retaining strip 33 are sleeved and engaged between the upper encapsulation plate 25 and the lower encapsulation plate 26 by using an elastic interference fit, ensuring that the retaining strip 33 and the groove are tightly fitted without looseness or gaps, thus initially achieving a seal at the connection.

[0040] Metal sheet 23 and metal sheet 24 are copper heat sinks that can dissipate internal heat to the outside. Thermally conductive silicone 28 can improve the heat transfer between metal sheet 24 and semiconductor chip board 1. Metal sheet 23 and semiconductor chip board 1 and substrate 21 have a certain space between them through foot support 22, which allows heat to flow and thus improves the heat dissipation effect.

[0041] Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the present invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A semiconductor packaging structure, comprising a semiconductor chip board (1); Its features are: The surface of the semiconductor chip board (1) is equipped with a packaging assembly (2). The packaging assembly (2) includes a substrate (21) mounted on the bottom surface of the semiconductor chip board (1), four feet (22) respectively mounted at the four corners of the substrate (21), and metal sheet one (23), metal sheet two (24), upper packaging plate (25), lower packaging plate (26), and positioning rod (27) for heat dissipation. The surface of the upper encapsulation plate (25) is fitted with a sealing component (3), which includes a sealing ring (31) fitted at the connection between the upper encapsulation plate (25) and the lower encapsulation plate (26) and epoxy resin colloid (32) filling the gap between the upper encapsulation plate (25) and the lower encapsulation plate (26).

2. The semiconductor packaging structure according to claim 1, characterized in that: The semiconductor chip board (1) is disposed inside the lower packaging board (26), the foot support (22) is attached to the inside of the lower packaging board (26), the four positioning rods (27) are respectively installed at the four corners of the upper packaging board (25), and the positioning rods (27) are inserted into the positioning holes opened on the surface of the lower packaging board (26). The upper packaging board (25) and the lower packaging board (26) are detachably connected by bolts. The first metal sheet (23) is embedded inside the lower packaging board (26), and the second metal sheet (24) is embedded inside the upper packaging board (25).

3. A semiconductor packaging structure according to claim 1, characterized in that: The outer surfaces of the first metal sheet (23) and the second metal sheet (24) are at the same level as the lower encapsulation plate (26) and the upper encapsulation plate (25), respectively.

4. A semiconductor packaging structure according to claim 1, characterized in that: The contact surfaces of the metal sheet 2 (24) and the semiconductor chip plate (1) are coated with thermally conductive silicone (28).

5. A semiconductor packaging structure according to claim 1, characterized in that: The first metal sheet (23) and the second metal sheet (24) are made of copper heat sinks.

6. A semiconductor packaging structure according to claim 1, characterized in that: The foot support (22) is detachably connected to the interior of the lower encapsulation plate (26) by bolts.

7. A semiconductor packaging structure according to claim 1, characterized in that: A retaining strip (33) is installed on the inner side of the sealing ring (31). The retaining strip (33) is engaged in the slots opened on the surfaces of the upper encapsulation plate (25) and the lower encapsulation plate (26). The sealing ring (31) and the retaining strip (33) are elastically fitted and engaged between the upper encapsulation plate (25) and the lower encapsulation plate (26).

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