Power-on automatic start-up circuit and electronic device
By using a cascaded design of multiple transistors and circuit optimization, the problems of high cost and poor compatibility of existing automatic power-on circuits have been solved, realizing an efficient and economical multi-interface automatic power-on function, and improving the ease of use and stability of the equipment.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- HUAQIN TECH CO LTD
- Filing Date
- 2025-06-27
- Publication Date
- 2026-07-24
AI Technical Summary
Existing automatic power-on circuits are costly and have poor compatibility, making it difficult to achieve efficient and economical automatic power-on functionality in multi-interface environments.
By employing a cascaded design of multiple transistors and a reasonable power supply configuration, combined with components such as diodes, resistors, and capacitors, the circuit structure is optimized to ensure stability and compatibility.
It features automatic power-on functionality across multiple interfaces, reducing costs, improving ease of use and work efficiency, and exhibiting excellent compatibility and stability.
Smart Images
Figure CN224555595U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of electronic circuit technology, and in particular to an automatic power-on circuit and electronic device. Background Technology
[0002] With the continuous development of technology, the functional requirements of many products are becoming increasingly diversified. One key requirement is the ability to automatically power on upon power-up. For example, in practical use, conference systems and audio equipment often need to automatically start up after being connected to a power source to improve ease of use and work efficiency.
[0003] However, current automatic power-on circuit solutions on the market have some limitations. Some solutions rely on a reset chip to achieve automatic power-on, while others require physical external triggering or CC (Charge Control) triggering for identification, which usually requires the integration of specific chips. These solutions not only increase the cost of the product but also limit its automatic power-on capability in multi-interface input environments.
[0004] In view of the above problems, in order to meet the market demand for an efficient, economical and multi-interface compatible automatic power-on function, it is necessary to conduct in-depth research and improvement on existing automatic power-on technologies to develop a more cost-effective and universal solution.
[0005] The above information is provided as background information only to aid in understanding this disclosure and does not constitute an assertion or admission that any of the above content can be used as prior art relative to this disclosure. Utility Model Content
[0006] This utility model provides an automatic power-on circuit and electronic device to solve the problems of high cost and poor compatibility in the prior art, and realize an efficient, economical automatic power-on function with multi-interface compatibility.
[0007] To achieve the above objectives, this utility model provides the following technical solution:
[0008] In the first aspect, this utility model provides an automatic power-on circuit, including at least two power input interfaces U, a first transistor Q1, a second transistor Q2, a third transistor Q3, a fourth transistor Q4, a first internal power supply V1, and a second internal power supply V2.
[0009] The output terminal of each of the power input interfaces U is connected to the base of the first transistor Q1;
[0010] The collector of the first transistor Q1 is grounded, and the emitter of the first transistor Q1 is connected to the base of the second transistor Q2.
[0011] The collector of the second transistor Q2 is grounded, and the emitter of the second transistor Q2 is connected to the base of the third transistor Q3.
[0012] The collector of the third transistor Q3 is grounded, and the emitter of the third transistor Q3 serves as the output terminal of the power-on automatic start-up circuit.
[0013] The base of the fourth transistor Q4 is connected to the first internal power supply V1, the collector of the fourth transistor Q4 is grounded, and the emitter of the fourth transistor Q4 is connected to the base of the first transistor Q1.
[0014] The second internal power supply V2 is connected to the base of the second transistor Q2 and the base of the third transistor Q3, respectively.
[0015] Furthermore, the automatic power-on circuit also includes at least two diodes D;
[0016] The output terminal of each power input interface U is connected to the positive terminal of a corresponding diode D, and the negative terminal of the diode D is connected to the base of the first transistor Q1.
[0017] Furthermore, the automatic power-on circuit also includes a first resistor R1 and a second resistor R2;
[0018] The first resistor R1 is connected in series between the negative terminal of each diode D and the base of the first transistor Q1;
[0019] One end of the second resistor R2 is connected to the base of the first transistor Q1, and the other end of the second resistor R2 is grounded.
[0020] Furthermore, the automatic power-on circuit also includes a first capacitor C1;
[0021] The first capacitor C1 is connected in parallel across the two ends of the second resistor R2.
[0022] Furthermore, the automatic power-on circuit also includes a third resistor R3;
[0023] The third resistor R3 is connected in series between the first internal power supply V1 and the base of the fourth transistor Q4.
[0024] Furthermore, the automatic power-on circuit also includes a fourth resistor R4;
[0025] The fourth resistor R4 is connected in series between the second internal power supply V2 and the base of the second transistor Q2.
[0026] Furthermore, the automatic power-on circuit also includes a fifth resistor R5;
[0027] The fifth resistor R5 is connected in series between the second internal power supply V2 and the base of the third transistor Q3.
[0028] Furthermore, in the power-on automatic start-up circuit, the second internal power supply V2 is a continuous power supply.
[0029] Furthermore, in the power-on automatic power-on circuit, the first internal power supply V1 powers on after outputting a power-on signal at the output terminal of the power-on automatic power-on circuit.
[0030] Secondly, this utility model provides an electronic device, including the power-on automatic power-on circuit as described in the first aspect above.
[0031] Compared with the prior art, the present invention has the following beneficial effects:
[0032] This utility model provides an automatic power-on circuit and electronic device. Through a cascaded design of multiple transistors and a reasonable power supply configuration, it achieves automatic power-on functionality for two or more power input interfaces without relying on a reset chip or a specific CC trigger chip, significantly reducing product costs. Simultaneously, the circuit structure is simple, easy to implement, and has good compatibility, adapting to various power input scenarios and effectively improving the ease of use and work efficiency of the device. Furthermore, utilizing the internal power supply to provide a stable bias voltage for some transistors further optimizes circuit performance, ensuring the stability and reliability of the automatic power-on function, making it more cost-effective and versatile. It can be widely applied in various electronic devices requiring automatic power-on functionality, such as conference systems and audio equipment.
[0033] This invention has other features and advantages that will be apparent from or will be set forth in detail in the accompanying drawings and the following detailed description, which together serve to explain the particular principles of this invention. Attached Figure Description
[0034] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0035] Figure 1This is one of the circuit principle diagrams of an automatic power-on circuit provided in Embodiment 1 of this utility model;
[0036] Figure 2 This is the second schematic diagram of the circuit principle of an automatic power-on circuit provided in Embodiment 1 of this utility model. Detailed Implementation
[0037] To illustrate the possible application scenarios, technical principles, implementable specific solutions, and achievable objectives and effects of this application in detail, the following description, in conjunction with the listed specific embodiments and accompanying drawings, provides a detailed explanation. The embodiments described herein are merely illustrative of the technical solutions of this application and are therefore intended to limit the scope of protection of this application.
[0038] In this document, the term "embodiment" means that a specific feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The term "embodiment" appearing in various places throughout the specification does not necessarily refer to the same embodiment, nor does it specifically limit its independence or connection with other embodiments. In principle, in this application, as long as there are no technical contradictions or conflicts, the technical features mentioned in each embodiment can be combined in any way to form corresponding implementable technical solutions.
[0039] Unless otherwise defined, the technical terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the use of related terms herein is merely for the purpose of describing particular embodiments and is not intended to limit this application.
[0040] In the description of this application, the term "and / or" is used to describe the logical relationship between objects, indicating that three relationships can exist. For example, A and / or B means: A exists, B exists, and A and B exist simultaneously. Additionally, the character " / " in this document generally indicates that the preceding and following objects have an "or" logical relationship.
[0041] In this application, terms such as “first” and “second” are used only to distinguish one entity or operation from another, and do not necessarily require or imply any actual quantity, hierarchy or order relationship between these entities or operations.
[0042] Unless otherwise specified, the use of terms such as “comprising,” “including,” “having,” or other similar expressions in this application is intended to cover non-exclusive inclusion, which does not exclude the presence of additional elements in a process, method, or product that includes the stated elements, such that a process, method, or product that includes a list of elements may include not only those defined elements but also other elements not expressly listed, or elements inherent to such a process, method, or product.
[0043] In this application, expressions such as "greater than", "less than", and "exceeding" are understood to exclude the stated number; expressions such as "above", "below", and "within" are understood to include the stated number. Furthermore, in the description of the embodiments of this application, "multiple" means two or more (including two), and similar expressions related to "multiple" are also understood in this way, such as "multiple groups" and "multiple times", unless otherwise explicitly specified.
[0044] In the description of the embodiments of this application, the space-related expressions used, such as "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "vertical," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential," indicate the orientation or positional relationship based on the orientation or positional relationship shown in the specific embodiments or drawings. They are only for the purpose of describing the specific embodiments of this application or for the reader's understanding, and do not indicate or imply that the device or component referred to must have a specific position, a specific orientation, or be constructed or operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of this application.
[0045] Unless otherwise expressly specified or limited, the terms "installation," "connection," "linking," "fixing," and "setting," as used in the description of the embodiments of this application, should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral setting; it can be a mechanical connection, an electrical connection, or a communication connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be the internal connection of two components or the interaction between two components. For those skilled in the art to which this application pertains, the specific meaning of the above terms in the embodiments of this application can be understood according to the specific circumstances.
[0046] Example 1
[0047] Please refer to Figure 1This utility model provides an automatic power-on circuit, designed to achieve automatic power-on functionality for two or more power input interfaces while optimizing cost and performance. The circuit includes at least two power input interfaces U (three power input interfaces are used as an example in the accompanying drawings, labeled U1, U2, and U3 respectively), and four transistors (first transistor Q1, second transistor Q2, third transistor Q3, and fourth transistor Q4). In addition, it also includes two internal power supplies (first internal power supply V1 and second internal power supply V2).
[0048] In terms of circuit connections, the output terminal of each power input interface U is connected to the base of the first transistor Q1. The collector of the first transistor Q1 is grounded, and its emitter is connected to the base of the second transistor Q2. The collector of the second transistor Q2 is also grounded, and its emitter is connected to the base of the third transistor Q3. The collector of the third transistor Q3 is grounded, and its emitter serves as the output terminal of the entire power-on automatic start-up circuit.
[0049] Furthermore, the base of the fourth transistor Q4 is connected to the first internal power supply V1, its collector is grounded, and its emitter is connected to the base of the first transistor Q1. The second internal power supply V2 is connected to the bases of the second transistor Q2 and the third transistor Q3, respectively, providing stable bias voltages for these two transistors.
[0050] It is understandable that P1, P2, and P3 in the attached diagram are high and low level status bits, which are virtual representations.
[0051] In one embodiment of this invention, the second internal power supply V2 is a continuous power supply.
[0052] The first internal power supply V1 powers on after outputting a power-on signal at the output terminal of the automatic power-on circuit.
[0053] Specifically, the automatic power-on circuit has the following three states:
[0054] (1) Default state: There is no power input to the three power input interfaces U1, U2 and U3. At this time, P1 is low level, the first transistor Q1 is not conducting, and due to the long power supply of the second internal power supply V2, P2 is high level, the second transistor Q2 is conducting, P3 is low level, the third transistor Q3 is not conducting, the output terminal OUT is not pulled low to trigger, and the power-on action will not be performed.
[0055]
[0056] (2) Insertion state 1: When any one of the three power input interfaces U1, U2 and U3 is connected to power, P1 is at a high level, which turns on the first transistor Q1. P2 changes from high to low, the second transistor Q2 does not turn on, and P3 is pulled high by the second internal power supply V2, which turns on the third transistor Q3. This realizes that the output terminal OUT is pulled low to trigger the power-on process.
[0057]
[0058] (3) Insertion state 2: When any one of the three power input interfaces U1, U2, and U3 is connected to power and the power-on has been triggered, the first internal power supply V1 is powered on, which turns on the fourth transistor Q4 and pulls P1 low. The first transistor Q1 is not turned on, and P2 is pulled high by the second internal power supply V2, which turns on the second transistor Q2 and pulls P3 low. At the same time, the third transistor Q3 is not turned on, and the situation where the output terminal OUT is pulled low is released, preventing the automatic power-on from being triggered continuously.
[0059]
[0060] This embodiment successfully achieves automatic power-on functionality for two or more power input interfaces by employing a cascaded design of multiple transistors and a reasonable power supply configuration. This design eliminates the need for a reset chip or a specific CC trigger chip, significantly reducing product costs. Furthermore, the circuit structure is simple and clear, easy to implement, and possesses good compatibility, adapting to various power input scenarios and effectively improving the ease of use and operational efficiency of the device.
[0061] Furthermore, by utilizing the internal power supply to provide a stable bias voltage for some transistors, circuit performance is further optimized, ensuring the stability and reliability of the automatic power-on function. This design not only improves the circuit's cost-effectiveness but also gives it broad versatility, enabling its widespread application in various electronic devices requiring automatic power-on functions, such as conference systems and audio equipment. It provides an effective solution for the technological improvement and cost optimization of related products.
[0062] Please refer to Figure 2 In one embodiment of this invention, the automatic power-on circuit further optimizes the connection design of the power input interface to solve the power crosstalk problem that may occur when multiple power sources are connected simultaneously. To this end, the circuit adds at least two diodes D to the original design (the specific number can be configured according to the number of power input interfaces; in the accompanying drawings, three diodes are used as an example, labeled D1, D2, and D3 respectively).
[0063] In terms of circuit connections, the output terminal of each power input interface U is connected to the anode of a corresponding diode D, while the cathode of diode D is connected to the base of the first transistor Q1. Through this design, diode D acts as a unidirectional conductor in the circuit, ensuring that current can only flow from the power input interface to the base of the first transistor Q1, and cannot flow in the reverse direction. This characteristic effectively prevents current crosstalk between different power supplies when multiple power supplies are connected simultaneously, thus avoiding potential power conflicts or equipment damage.
[0064] Furthermore, the addition of diode D provides reverse current protection for each power supply. In practical applications, when multiple power input interfaces are connected simultaneously, some power supplies may malfunction due to voltage fluctuations or other factors. Without reverse current protection, the malfunctioning power supply could affect other normally functioning power supplies through the circuit, leading to instability or even damage to the entire system. By placing diode D at each power input interface, it can be ensured that each power supply operates independently without interference, thereby improving the reliability and stability of the circuit.
[0065] In summary, this embodiment, by introducing diode D into the automatic power-on circuit, not only effectively solves the power crosstalk problem when multiple power sources are connected simultaneously, but also provides reliable reverse current protection for each power source. This design further enhances the circuit's adaptability and stability in complex power supply environments, enabling it to better meet the usage requirements of modern electronic devices in multi-power input scenarios, and providing strong support for the technological upgrade and performance optimization of related products.
[0066] Please refer to this again. Figure 2 In one embodiment of this invention, the automatic power-on circuit further optimizes the circuit's protection mechanism to ensure the stability and reliability of the circuit under different input voltage conditions. To this end, a first resistor R1 and a second resistor R2 are added to the original design.
[0067] In terms of circuit connection, the first resistor R1 is connected in series between the cathode of each diode D and the base of the first transistor Q1. This connection method ensures that after the current passes through the diode D, it is limited by the first resistor R1 before entering the base of the first transistor Q1. One end of the second resistor R2 is connected to the base of the first transistor Q1, and the other end is grounded. Through this series and ground connection, the second resistor R2 and the first resistor R1 together form a voltage divider circuit.
[0068] The main function of these two resistors is to provide voltage protection for the base of the first transistor Q1. In practical applications, the power input interface may be connected to power supplies with different voltages, especially in multi-power input scenarios where the input voltage fluctuation range may be large. If the input voltage is too high, it will directly act on the base of the first transistor Q1, potentially exceeding the maximum voltage that its base can withstand, thereby damaging the transistor and even affecting the normal operation of the entire circuit.
[0069] By introducing a first resistor R1 and a second resistor R2, the circuit can effectively divide the input voltage. When the input voltage is high, part of the voltage is reduced through the voltage division effect of these two resistors, thus ensuring that the voltage reaching the base of the first transistor Q1 is always within its safe operating range. This design not only protects the first transistor Q1 from damage by excessive voltage, but also enhances the overall stability and reliability of the circuit, enabling it to adapt to a wider range of input voltages.
[0070] Furthermore, this voltage divider circuit design offers a degree of flexibility. By appropriately selecting the values of the first resistor R1 and the second resistor R2, the voltage division ratio can be precisely adjusted according to the base voltage requirements of the first transistor Q1 and the input voltage range, thereby achieving the best protection effect for the circuit.
[0071] In summary, this embodiment further optimizes the circuit's protection function by introducing a first resistor R1 and a second resistor R2 into the automatic power-on circuit. These two resistors, through voltage division, effectively prevent damage to the first transistor Q1 caused by excessively high input voltage, ensuring stable operation of the circuit under different input voltage conditions and further improving the circuit's reliability and adaptability.
[0072] Please refer to this again. Figure 2 In one embodiment of this invention, the automatic power-on circuit further incorporates a first capacitor C1 to optimize the power-on timing characteristics of the circuit. This improvement aims to address the potential power-on timing disorder issue that may occur in multi-power-input scenarios, thereby ensuring that the circuit can start up stably and reliably.
[0073] In terms of circuit connection, the first capacitor C1 is connected in parallel across the second resistor R2. This connection method makes the first capacitor C1 and the second resistor R2 together form a simple RC (resistor-capacitor) circuit. Specifically, the positive terminal of the first capacitor C1 is connected to the base of the first transistor Q1, while its negative terminal is grounded and connected to the ground terminal of the second resistor R2.
[0074] The primary function of the first capacitor, C1, is to provide a timing delay for the circuit. During power-on, the rate of rise of the power supply voltage may vary depending on the power supply characteristics or the input interface. If the power-on sequence of each power input interface is inconsistent, some parts of the circuit may start prematurely while others are not yet ready, leading to timing chaos and even causing the circuit to malfunction.
[0075] By introducing the first capacitor C1, the circuit achieves a smooth voltage transition upon power-on. As the power supply voltage begins to rise, the first capacitor C1 gradually charges. The voltage across C1 does not instantly reach the power supply voltage level, but rather rises gradually according to a certain charging time constant (determined by the capacitance of the first capacitor C1 and the resistance of the second resistor R2). This delay prevents the base voltage of the first transistor Q1 from immediately reaching the conduction threshold upon power-on, thus avoiding false triggering or unstable startup caused by timing discrepancies.
[0076] Furthermore, the capacitance value of the first capacitor C1 can be adapted and adjusted according to the actual usage scenario. Different application scenarios may have different requirements for the power-on sequence. For example, some devices may require a longer delay time to ensure that the voltage of all power input interfaces stabilizes before starting, while other devices may require a shorter delay time to achieve fast startup. By adjusting the capacitance value of the first capacitor C1, the degree of delay in the power-on sequence can be precisely controlled, thereby meeting the specific needs of different devices.
[0077] In summary, this embodiment achieves effective control of the power-on timing by introducing a first capacitor C1 into the automatic power-on circuit and connecting it in parallel across the second resistor R2. This improvement not only solves the timing disorder problem that may occur in multi-power-input scenarios, but also enhances the versatility and adaptability of the circuit through flexible adaptation and debugging functions, enabling it to better meet the needs of different application scenarios.
[0078] Please refer to this again. Figure 2 In one embodiment of this invention, the automatic power-on circuit has been further optimized in its circuit structure to enhance its stability and reliability. To this end, a third resistor R3 is introduced into the original design to control the voltage and limit the current at key nodes in the circuit.
[0079] In terms of circuit connection, the third resistor R3 is connected in series between the first internal power supply V1 and the base of the fourth transistor Q4. This connection method ensures that after the current output from the first internal power supply V1, it first passes through the current-limiting effect of the third resistor R3 before flowing into the base of the fourth transistor Q4. By setting a resistor between the power supply and the base, the magnitude of the current flowing into the base of the fourth transistor Q4 can be effectively controlled, thereby avoiding potential damage to the base of the transistor due to excessive current.
[0080] Furthermore, the introduction of the third resistor R3 also serves as a voltage divider. During actual circuit operation, the output voltage of the first internal power supply V1 may fluctuate due to load changes or other factors. Through the voltage divider effect between the third resistor R3 and the base input impedance of the fourth transistor Q4, it can be ensured that the base voltage of the fourth transistor Q4 remains within a relatively stable range. This stable base voltage is crucial for the normal operation of the transistor, as it directly relates to the transistor's conduction and cutoff states, thus affecting the overall circuit functionality.
[0081] The value of the third resistor R3 can be selected according to the specific requirements of the circuit. During the design process, factors such as the output voltage of the first internal power supply V1, the base voltage requirement of the fourth transistor Q4, and the power consumption of the circuit need to be comprehensively considered. By reasonably selecting the value of the third resistor R3, the power consumption of the circuit can be minimized and the energy efficiency of the circuit can be improved while ensuring stable operation.
[0082] In summary, this embodiment further optimizes circuit performance by introducing a third resistor R3 into the automatic power-on circuit and connecting it in series between the first internal power supply V1 and the base of the fourth transistor Q4. This improvement not only effectively protects the base of the fourth transistor Q4 from damage due to overcurrent or overvoltage, but also ensures the stability of the base voltage through voltage division, thereby enhancing the reliability and stability of the entire circuit.
[0083] Please refer to this again. Figure 2 In one embodiment of this invention, the power-on automatic start-up circuit has been further optimized to enhance its stability and reliability, and to ensure that the voltage and current of each critical node are within safe operating ranges. To this end, a fourth resistor R4 is introduced into the original design to achieve precise control of the base voltage and current limitation of the second transistor Q2.
[0084] In terms of circuit connection, the fourth resistor R4 is connected in series between the second internal power supply V2 and the base of the second transistor Q2. This connection method ensures that after the current output from the second internal power supply V2, it first passes through the current-limiting effect of the fourth resistor R4 before flowing into the base of the second transistor Q2. By setting a resistor between the power supply and the base, the magnitude of the current flowing into the base of the second transistor Q2 can be effectively controlled, thereby avoiding potential damage to the base of the transistor due to excessive current.
[0085] Furthermore, the introduction of the fourth resistor R4 also serves as a voltage divider. During actual circuit operation, the output voltage of the second internal power supply V2 may fluctuate due to load changes or other factors. Through the voltage divider effect between the fourth resistor R4 and the base input impedance of the second transistor Q2, it can be ensured that the base voltage of the second transistor Q2 remains within a relatively stable range. This stable base voltage is crucial for the normal operation of the transistor, as it directly relates to the transistor's conduction and cutoff states, thus affecting the overall circuit functionality.
[0086] The value of the fourth resistor R4 can be selected according to the specific requirements of the circuit. During the design process, factors such as the output voltage of the second internal power supply V2, the base voltage requirement of the second transistor Q2, and the power consumption of the circuit need to be comprehensively considered. By appropriately selecting the value of the fourth resistor R4, the power consumption of the circuit can be minimized and the energy efficiency improved while ensuring stable circuit operation.
[0087] Furthermore, the addition of the fourth resistor R4 provides the circuit with a degree of flexibility. In different application scenarios, the output voltage of the second internal power supply V2 may vary, and the base voltage requirement of the second transistor Q2 may also differ depending on the specific model. By adjusting the value of the fourth resistor R4, the circuit can be optimized to better adapt to different power supply conditions and transistor characteristics, thereby improving the circuit's versatility and adaptability.
[0088] In summary, this embodiment further optimizes circuit performance by introducing a fourth resistor R4 into the automatic power-on circuit and connecting it in series between the second internal power supply V2 and the base of the second transistor Q2. This improvement not only effectively protects the base of the second transistor Q2 from damage due to overcurrent or overvoltage, but also ensures the stability of the base voltage through voltage division, thereby enhancing the reliability and stability of the entire circuit.
[0089] Please refer to this again. Figure 2In one embodiment of this invention, the automatic power-on circuit has been further optimized in its circuit design to enhance circuit stability and reliability, and to ensure that the voltage and current of each critical node are within safe operating ranges. To this end, a fifth resistor R5 is introduced into the original design to achieve precise control of the base voltage and current limitation of the third transistor Q3.
[0090] In terms of circuit connection, the fifth resistor R5 is connected in series between the second internal power supply V2 and the base of the third transistor Q3. This connection method ensures that after the current output from the second internal power supply V2, it first passes through the current-limiting effect of the fifth resistor R5 before flowing into the base of the third transistor Q3. By setting a resistor between the power supply and the base, the magnitude of the current flowing into the base of the third transistor Q3 can be effectively controlled, thereby avoiding potential damage to the base of the transistor due to excessive current.
[0091] Furthermore, the introduction of the fifth resistor R5 also serves as a voltage divider. During actual circuit operation, the output voltage of the second internal power supply V2 may fluctuate due to load changes or other factors. Through the voltage divider effect between the fifth resistor R5 and the base input impedance of the third transistor Q3, it can be ensured that the base voltage of the third transistor Q3 remains within a relatively stable range. This stable base voltage is crucial for the normal operation of the transistor, as it directly relates to the transistor's conduction and cutoff states, thus affecting the overall circuit functionality.
[0092] The value of the fifth resistor R5 can be selected according to the specific requirements of the circuit. During the design process, factors such as the output voltage of the second internal power supply V2, the base voltage requirement of the third transistor Q3, and the power consumption of the circuit need to be comprehensively considered. By appropriately selecting the value of the fifth resistor R5, the power consumption of the circuit can be minimized and the energy efficiency of the circuit can be improved while ensuring stable operation.
[0093] Furthermore, the addition of the fifth resistor R5 provides the circuit with a degree of flexibility. In different application scenarios, the output voltage of the second internal power supply V2 may vary, and the base voltage requirement of the third transistor Q3 may also differ depending on the specific model. By adjusting the value of the fifth resistor R5, the circuit can be optimized to better adapt to different power supply conditions and transistor characteristics, thereby improving the circuit's versatility and adaptability.
[0094] In summary, this embodiment further optimizes circuit performance by introducing a fifth resistor R5 into the automatic power-on circuit and connecting it in series between the second internal power supply V2 and the base of the third transistor Q3. This improvement not only effectively protects the base of the third transistor Q3 from damage due to overcurrent or overvoltage, but also ensures the stability of the base voltage through voltage division, thereby enhancing the reliability and stability of the entire circuit.
[0095] Although this application frequently uses terms such as power input terminal and output terminal, the possibility of using other terms is not excluded. These terms are used merely for the convenience of describing and explaining the essence of this utility model; interpreting them as any additional limitation would contradict the spirit of this utility model.
[0096] Example 2
[0097] This utility model provides an electronic device, including the power-on automatic power-on circuit as provided in Embodiment 1 above.
[0098] By adopting this circuit, electronic devices can automatically start after being connected to a power source, without the need for manual operation, thus significantly improving the ease of use and user experience.
[0099] The design of this electronic device fully considers the diverse needs of modern electronic products, especially in application scenarios such as conference systems, audio equipment, and smart terminals, where the automatic power-on function is particularly important. For example, in a conference system, the device can respond and start up quickly to ensure the smooth running of the meeting; in audio equipment, the automatic power-on function can enable instant playback, improving user efficiency.
[0100] In summary, the electronic device provided in this embodiment, through the integration and optimization of the automatic power-on circuit, not only achieves the automatic power-on function, but also possesses the characteristics of high cost-effectiveness, high compatibility, and high stability. It can be widely used in various electronic devices that require automatic power-on functions, providing users with a more convenient and efficient user experience.
[0101] Finally, it should be noted that although the above embodiments have been described in the text and drawings of this application, this should not limit the scope of patent protection of this application. Any technical solutions that are based on the essential concept of this application and utilize the content described in the text and drawings of this application, resulting in equivalent structural or procedural substitutions or modifications, as well as the direct or indirect application of the technical solutions of the above embodiments to other related technical fields, are all included within the scope of patent protection of this application.
Claims
1. An automatic power-on circuit, characterized in that, It includes at least two power input interfaces U, a first transistor Q1, a second transistor Q2, a third transistor Q3, a fourth transistor Q4, a first internal power supply V1, and a second internal power supply V2; The output terminal of each of the power input interfaces U is connected to the base of the first transistor Q1; The collector of the first transistor Q1 is grounded, and the emitter of the first transistor Q1 is connected to the base of the second transistor Q2. The collector of the second transistor Q2 is grounded, and the emitter of the second transistor Q2 is connected to the base of the third transistor Q3. The collector of the third transistor Q3 is grounded, and the emitter of the third transistor Q3 serves as the output terminal of the power-on automatic start-up circuit. The base of the fourth transistor Q4 is connected to the first internal power supply V1, the collector of the fourth transistor Q4 is grounded, and the emitter of the fourth transistor Q4 is connected to the base of the first transistor Q1. The second internal power supply V2 is connected to the base of the second transistor Q2 and the base of the third transistor Q3, respectively.
2. The automatic power-on circuit according to claim 1, characterized in that, It also includes at least two diodes D; The output terminal of each power input interface U is connected to the positive terminal of a corresponding diode D, and the negative terminal of the diode D is connected to the base of the first transistor Q1.
3. The automatic power-on circuit according to claim 2, characterized in that, It also includes a first resistor R1 and a second resistor R2; The first resistor R1 is connected in series between the negative terminal of each diode D and the base of the first transistor Q1; One end of the second resistor R2 is connected to the base of the first transistor Q1, and the other end of the second resistor R2 is grounded.
4. The automatic power-on circuit according to claim 3, characterized in that, It also includes the first capacitor C1; The first capacitor C1 is connected in parallel across the second resistor R2.
5. The automatic power-on circuit according to claim 4, characterized in that, It also includes the third resistor R3; The third resistor R3 is connected in series between the first internal power supply V1 and the base of the fourth transistor Q4.
6. The automatic power-on circuit according to claim 5, characterized in that, It also includes the fourth resistor R4; The fourth resistor R4 is connected in series between the second internal power supply V2 and the base of the second transistor Q2.
7. The automatic power-on circuit according to claim 6, characterized in that, It also includes the fifth resistor R5; The fifth resistor R5 is connected in series between the second internal power supply V2 and the base of the third transistor Q3.
8. The automatic power-on circuit according to claim 1, characterized in that, The second internal power supply V2 is a continuous power supply.
9. The automatic power-on circuit according to claim 8, characterized in that, The first internal power supply V1 powers on after outputting a power-on signal at the output terminal of the power-on automatic power-on circuit.
10. An electronic device, characterized in that, Includes the power-on automatic start-up circuit as described in any one of claims 1-9.