A voice intercom transfer host board circuit

Abstract

The utility model discloses a voice intercom switching host mainboard circuit, include: main control and communication chip U4, adopt ML160T chip, be used for realizing the control and communication function of equipment, voltage stabilizing power supply circuit is linked with main control and communication chip U4, this voice intercom switching host mainboard circuit can be connected with mobile phone switching mainboard through integrated mobile phone card circuit, realizes when the duty room is unmanned and calls automatic switching to the preset mobile phone number, solves the emergency response delay problem, configuration signal switching and level conversion circuit, reduce external wiring, avoid the signal distortion and module false triggering caused by the non -uniform level, improve integrated compatibility, adopt ethernet and USIM / eSIM double communication backup, match network interface transformer isolation protection and radio frequency circuit impedance matching, guarantee the communication stability under complex environment, professional audio processing module optimizes tone quality, whole link TVS pipe realizes electrostatic and surge protection, prolongs the life of peripheral.

Description

Technical Field

[0001] This utility model relates to the field of voice intercom adapter technology, specifically a voice intercom adapter motherboard circuit. Background Technology

[0002] Voice intercom switchboards, as core devices for real-time communication and emergency response, are widely used in scenarios with extremely high requirements for communication reliability and response timeliness, such as elevator rescue, security monitoring, industrial dispatching, and building management. However, the mainboard circuitry of current voice intercom switchboards still has many technical shortcomings in practical applications.

[0003] 1. Lack of emergency transfer capability, relying on manual duty, when no one is on duty, the call signal cannot be automatically transferred to the backup terminal (such as the rescue mobile phone number), resulting in delayed response in emergency scenarios.

[0004] 2. The circuit integration is low, the modules are scattered, there are many external connections, and the level standards of different modules are not uniform. There is a lack of reliable level conversion mechanism, which easily leads to signal transmission distortion and module false triggering.

[0005] 3. Poor communication and audio processing, limited communication methods with no USIM / eSIM wireless backup, insufficient power amplifier, weak audio filtering and noise reduction, lack of electrostatic protection, and easily damaged peripherals.

[0006] To address this, a voice intercom adapter circuit for the host motherboard is proposed. Summary of the Invention

[0007] The purpose of this invention is to provide a voice intercom adapter motherboard circuit to solve the problems mentioned in the background art.

[0008] To achieve the above objectives, this utility model provides the following technical solution: a voice intercom adapter main board circuit, including: a main control and communication chip U4, which adopts the ML160T chip, used to realize the control and communication functions of the device; The voltage regulator circuit, connected to the main control and communication chip U4, is used to process the input DC voltage and output a stable voltage to the downstream load. The voltage regulator circuit is connected to the main control and communication chip U4 and is used to provide a stable low-voltage power supply to the system. The keypad interface circuit is connected to the main control and communication chip U4 to realize the power and signal transmission of the keypad. The SIM card circuit is connected to the main control and communication chip U4 and is used to read and interact with data from the SIM card or USIM card. The software programming circuit is connected to the main control and communication chip U4 to realize the connection and data transmission between the device and the external USB device, and to program the relevant software program into the main control and communication chip U4. The adapter board connects to the interface circuit and is connected to the main control and communication chip U4 for interfacing with the adapter board; The I2C communication signal circuit is connected to the main control and communication chip U4 and is used to realize the signal conversion and level conversion of I2C signals. The network port circuit, connected to the main control and communication chip U4, is used to realize the Ethernet communication function of the device, ensuring that data can be transmitted stably and reliably between the device and the network. The Flash memory circuit is connected to the main control and communication chip U4 and is used to store programs and configuration data to ensure that data is not lost when power is off. The signal conversion and level conversion circuit is connected to the main control and communication chip U4 to realize bidirectional transmission of signals in different voltage domains and adapt to the level requirements of the front and rear stage circuits. The power amplifier circuit, connected to the main control and communication chip U4, is used to amplify weak audio signals to a sufficient power to drive the speaker. The audio auxiliary processing circuit is connected to the power amplifier circuit and is used in the power amplifier stage to filter and reduce noise in the audio signal, and provide electrostatic and surge protection. The microphone input circuit is connected to the main control and communication chip U4 and is used in telephone handsets and hands-free scenarios to realize the acquisition, filtering and bias power supply of microphone signals. The audio signal switching circuit, connected to the main control and communication chip U4, is used to realize the preprocessing of the microphone signal of the handle, electrostatic protection, and relay switching control of multiple audio inputs.

[0009] Preferably, the 46th pin of the main control and communication chip U4 is connected to a capacitor C8 and a resistor R3, and a capacitor C10, a bidirectional diode D1 and an antenna ANT are connected to the resistor R3; The voltage regulator circuit includes a chip U13. A capacitor C64 is connected between pins 2 and 6 of the chip U13. One end of an inductor L1 is also connected to pin 2 of the chip U13. The other end of the inductor L1 is connected to capacitors C67, C66, C65, resistors R54 and R56. A capacitor C69, C68, and C70 are connected to pin 3 of the chip U13. A resistor R53 and a resistor R55 are connected to pin 5 of the chip U13. The voltage regulator circuit includes chip U6 and chip U7. Capacitors C74 and C73 are connected between pins 1 and 2 of chip U6. Pin 5 of chip U6 is connected to pin 1 of chip U7. Capacitors C77, C76 and C75 are connected between pins 1 and 2 of chip U7. Capacitors C71 and C72 are connected to pin 5 of chip U7.

[0010] Preferably, the keypad interface circuit includes a connector P3, wherein diodes D10, D11, D14 and D17 are connected to pins 5, 4 and 3 of the connector P3, and the collector of a transistor Q4 is connected to pin 2 of the connector P3. The base of the transistor Q4 is connected to a resistor R50 and is connected to pin 12 of the main control and communication chip U4. The SIM card circuit includes an eSIM chip U10. Pins 2, 8, 7, and 6 of the eSIM chip U10 are connected to pins 6, 8, 7, and 5 of the main control and communication chip U4. A capacitor C11 is connected to pin 3 of the eSIM chip U10. Capacitors C12 and C13 are connected to pins 6 and 7 of the eSIM chip U10. The software programming circuit includes connector P1 and Type-C interface J2. Pin 2 of connector P1 is connected to resistor R6 and then to pin 32 of the main control and communication chip U4. Pin 1 of connector P1 is connected to resistor R8 and then to pin 31 of the main control and communication chip U4. Pins A4 and A9 of the Type-C interface J2 are connected together. Pin A9 of the Type-C interface J2 is connected to diode D22 and capacitor C55 and then to pin 28 of the main control and communication chip U4. Pin A5 of the Type-C interface J2 is connected to resistor R43. The A6 pin of the Type-C interface J2 is connected to diode D20 and is connected to pin 26 of the main control and communication chip U4. The A7 pin of the Type-C interface J2 is connected to diode D21 and is connected to pin 27 of the main control and communication chip U4. The B4 and B9 pins of the Type-C interface J2 are connected to pin 28 of the main control and communication chip U4. The B5 pin of the Type-C interface J2 is connected to resistor R48. The B6 and B7 pins of the Type-C interface J2 are connected to pins 26 and 27 of the main control and communication chip U4, respectively.

[0011] Preferably, the adapter board connection interface circuit includes a docking interface J4, wherein capacitors C112 and C111 are connected to pins 4 and 5 of the docking interface J4 respectively, and are respectively connected to pins 21 and 22 of the main control and communication chip U4; The I2C communication signal circuit includes a chip U1. Pin 1 of the chip U1 is connected to resistors R57, R45, and R44. Pins 3, 4, and 5 of the chip U1 are connected to pins 57, 56, and 55 of the main control and communication chip U4, respectively. Resistor R57 is connected to pin 3 of the chip U1, resistor R45 is connected to pin 4 of the chip U1, resistor R44 is connected to pin 5 of the chip U1, and capacitors C3 and C4 are connected to pin 14 of the chip U1. The network port circuit includes a main control chip U5. A resistor R35 and a crystal oscillator Y1 are connected between pins 10 and 11 of the main control chip U5. Pins 4, 5, 7, and 8 of the main control chip U5 are connected to pins 3, 6, 1, and 2 of the network port transformer HR911105A, respectively. One end of resistor R36, one end of resistor R37, one end of resistor R38, and one end of resistor R39 are connected between pins 4 and 5 of the network port transformer HR911105A. The other end of resistor R36 is connected to pin 1 of the HR911105A network transformer. The other end of resistor R37 is connected to pin 2 of the HR911105A network transformer. The other end of resistor R38 is connected to pin 6 of the HR911105A network transformer. The other end of resistor R39 is connected to pin 3 of the HR911105A network transformer. Resistors R40 and R41 are connected to pins 9 and 12 of the HR911105A network transformer, respectively.

[0012] Preferably, the Flash memory circuit includes a chip U8, pin 2 of the chip U8 is connected to a resistor R60 and is connected to pin 2 of the main control and communication chip U4, a resistor R59 is connected between pins 3 and 4 of the chip U8, a resistor R61 is connected to pin 5 of the chip U8 and is connected to pin 3 of the main control and communication chip U4, pin 6 of the chip U8 is connected to pin 1 of the main control and communication chip U4, and a resistor R58, a capacitor C5, and a resistor R8 are connected to pins 7 and 8 of the chip U8. The signal conversion and level shifting circuit includes chip U2. Pin 2 of chip U2 is connected to capacitors C15 and C16. Pins 3, 4, 5, 6, 7, 8, and 9 of chip U2 are connected to pins 70, 71, 72, 4, 1, 3, and 2 of the main control and communication chip U4, respectively. Pins 12, 13, 14, 15, 16, 17, and 18 of chip U2 are connected to pins 62, 61, 60, 59, 49, 26, and 36 of the main control chip U5.

[0013] Preferably, the power amplifier circuit includes chip U11 and chip U3. Pin 1 of chip U11 is connected to resistor R19 and capacitor C35 and is connected to pin 14 of main control and communication chip U4. Pin 2 of chip U11 is connected to capacitor C36. Pin 3 of chip U11 is connected to resistor R20 and capacitor C37 and is connected to pin 21 of main control and communication chip U4. Pin 4 of chip U11 is connected to resistor R21 and capacitor C41 and is connected to pin 22 of main control and communication chip U4. Pin 6 of chip U11 is connected to capacitor C39 and capacitor C40. Pin 1 of chip U3 is connected to resistor R9 and capacitor C42 and is connected to pin 15 of main control and communication chip U4. Pin 2 of chip U3 is connected to capacitor C19. Pin 3 of chip U3 is connected to resistor R11 and capacitor C20 and is connected to pin 21 of main control and communication chip U4. Pin 4 of chip U3 is connected to resistor R12 and capacitor C23 and is connected to pin 22 of main control and communication chip U4. Pin 6 of chip U3 is connected to capacitors C21 and C22. The audio auxiliary processing circuit includes resistors R16 and R17. One end of resistors R16 and R17 is connected to pins 5 and 8 of chip U11, respectively. The other end of resistors R16 and R17 is connected to capacitors C28, C30, C32, C27, C29, and C31, respectively, and is connected to pins 2 and 1 of speaker LS1. Diodes D5 and D6 are connected to pins 2 and 1 of speaker LS1. The audio auxiliary processing circuit also includes resistors R14 and R15. One end of resistors R14 and R15 is connected to pins 8 and 5 of chip U3, respectively. The other end of resistors R14 and R15 is connected to capacitors C48, C26, C43, C6, C60, and C61, respectively.

[0014] Preferably, the microphone input circuit includes resistors R26 and R27. One end of resistors R26 and R27 is connected to pins 24 and 23 of the main control and communication chip U4. The other end of resistor R26 is connected to capacitor C44, resistor R30, and resistor R28. The other end of resistor R27 is connected to capacitor C47, resistor R31, and resistor R32. A capacitor C46 is connected between resistors R28 and R30 and between resistors R31 and R32. The microphone input circuit also includes a microphone MK1, and capacitors C38, C49, C51, C45, C50, C53, diode D12, and diode D13 are connected between pins 1 and 2 of the microphone MK1. The microphone input circuit also includes an interface P2, with pins 2 and 1 of the interface P2 connected to the other ends of resistors R14 and R15, respectively.

[0015] Preferably, the audio signal switching circuit includes capacitors C52, C54, C56, C57, C58, and C59, diode D23, and diode D16, wherein capacitors C52, C54, C56, C57, C58, C59, diode D23, and diode D16 are connected to pins 3 and 4 of interface P2; The audio signal switching circuit also includes relays JK1C, JK1B, and JK1A. Pins 7 and 8 of relay JK1C are connected to pin 1 of microphone MK1 and pin 3 of interface P2, respectively. Pins 4 and 5 of relay JK1B are connected to pin 2 of microphone MK1 and pin 4 of interface P2, respectively. A diode D19 and the collector of transistor Q3 are connected between pins 1 and 2 of relay JK1A. A resistor R46 is connected to the base of transistor Q3 and is connected to pin 16 of the main control and communication chip U4. A resistor R47 is connected between the base and emitter of transistor Q3. The audio signal switching circuit also includes relays JK2C, JK2B, and JK2A. Pin 7 of relay JK2C is connected to pin 6 of relay JK1C. Pin 8 of relay JK2C is connected to capacitor C113. Pin 4 of relay JK2B is connected to pin 3 of relay JK1B. Pin 5 of relay JK2B is connected to capacitor C114. Pins 1 and 2 of relay JK2A are connected to the collector of diode D18 and transistor Q5. The base of transistor Q5 is connected to resistor R63 and to pin 40 of the main control and communication chip U4. Resistor R64 is connected between the base and emitter of transistor Q5.

[0016] Compared with existing technologies, the beneficial effects of this utility model are as follows: the mainboard circuit of the voice intercom transfer host can be connected to the mobile phone transfer motherboard in parallel through the integrated mobile phone card circuit, so that calls can be automatically transferred to the preset mobile phone number when the duty room is unattended, thus solving the problem of emergency response delay; the configuration of signal transfer and level conversion circuit reduces external wiring, avoids signal distortion and module mis-triggering caused by inconsistent levels, and improves integration compatibility; the use of Ethernet and USIM / eSIM dual communication backup, coupled with network port transformer isolation protection and RF circuit impedance matching, ensures stable communication in complex environments; the professional audio processing module optimizes sound quality, and the full-link TVS tube realizes electrostatic discharge and surge protection, extending the life of peripherals. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the main control and communication chip of this utility model; Figure 2 This is a schematic diagram of the voltage regulator circuit of this utility model; Figure 3 This is a schematic diagram of the voltage regulator circuit of this utility model; Figure 4 This is a schematic diagram of the keypad interface circuit of this utility model; Figure 5 This is a schematic diagram of the mobile phone card circuit of this utility model; Figure 6 This is a schematic diagram of the software programming circuit of this utility model; Figure 7 This is a schematic diagram of the interface circuit for the adapter board of this utility model; Figure 8 This is a schematic diagram of the I2C communication signal circuit of this utility model; Figure 9 This is a schematic diagram of the network port circuit of this utility model; Figure 10 This is a schematic diagram of the Flash memory circuit of this utility model; Figure 11 This is a schematic diagram of the signal conversion and level shifting circuit of this utility model; Figure 12 This is a schematic diagram of the power amplifier circuit of this utility model; Figure 13 This is a schematic diagram of the audio auxiliary processing circuit of this utility model; Figure 14 This is a schematic diagram of the microphone input circuit of this utility model; Figure 15 This is a schematic diagram of the audio signal switching circuit of this utility model. Detailed Implementation

[0018] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention.

[0019] Please see Figure 1-15 This utility model provides a technical solution: The main control and communication chip U4, such as Figure 1 As shown, this component, acting as the brain of the entire circuit, integrates functions such as communication baseband, radio frequency processing, and computational control. It processes wireless communication protocols, enables data transmission and reception, and establishes network connections; controls peripheral hardware, coordinates the operation of various modules, and runs system programs to handle business logic.

[0020] The VBAT power input supplies power to the entire circuit. After filtering and voltage regulation, it powers the main chip, RF, and peripherals, ensuring stable operation. The UART serial port is the asynchronous communication interface between the main chip and external devices, used for transparent data transmission and sending AT commands to configure module parameters. The I2C interface connects to I2C slave devices for low-speed data interaction, such as reading sensor data. The SPI interface is a high-speed synchronous serial interface that can connect to SPI slave devices for large data transmission. The ANT is the main antenna, used to transmit and receive cellular network or WiFi RF signals; NCGPS_ANT is the GPS / BeiDou positioning antenna interface, used to receive satellite signals for positioning. The RF circuit adjusts the RF signal impedance to ensure efficient matching between the antenna and the main chip's RF terminal, reducing signal reflection and improving transmission and reception sensitivity and communication quality. The LED circuit uses transistors Q1 and Q2 or is directly driven by GPIO to provide status indication. Users can control the LEDs to turn on / off and flash via the main chip, intuitively understanding the device's operating status. Button input control can be used for resetting the module and triggering functions; the main chip detects changes in button levels and executes corresponding operations. The reset circuit enables module reset, which can be triggered manually or automatically (such as undervoltage detection) to restart the main chip, restore the initial state, or resolve the abnormality.

[0021] Regulated power supply circuit, such as Figure 2As shown, this is a DC power input, filtering, voltage regulation, and indicator circuit. Its main function is to process the input DC voltage and output a stable voltage to the subsequent load, while also providing power indication and overvoltage / reverse connection protection. DC1 (DC-005-0-5 socket) connects to an external +12V DC power supply to power the entire circuit. Inserting a compatible DC power adapter / UPS power supply introduces external power. D24 provides reverse protection to prevent damage to the circuit from reverse connection. When the positive and negative terminals of the power supply are reversed, the diode is reverse-biased and cuts off the circuit, preventing subsequent components from burning out due to reverse voltage. D26 and R49, along with the LED (light-emitting diode), require a current-limiting resistor in series. R49 limits the current flowing through D26. When the circuit is powered on and VBAT has voltage, current flows through R49, D26, and GND, illuminating the LED and providing a visual indication of power connection. R54 and R56 are voltage divider resistors that divide the VBAT voltage to output VFB voltage. C65, C66, and C67: Large-value electrolytic capacitor C65 filters low-frequency ripple; small-value ceramic capacitors C66 and C67 filter high-frequency noise, ensuring stable operation of subsequent circuits. U13 (H9118 linear regulator) regulates the input voltage to a fixed value of 3.8V, providing a stable low voltage for subsequent loads. The linear regulator stabilizes the input voltage +12V to the set output voltage by adjusting the voltage drop of the internal power transistor, making it suitable for noise-sensitive, low-current loads (such as chip cores and low-speed peripherals). Inductor L1, in conjunction with the voltage regulator circuit for filtering, may participate in simple EMI suppression, or serve as a safety feature during wiring. The inductor impedes AC signals, further filtering high-frequency interference on the power line, resulting in a smoother voltage input to the regulator. C70, C68, and C69 filter the ripple of the regulator's output voltage, making VCC121V cleaner. Similar to the previous stage filter, the large capacitance C70 filters low frequencies, while the small capacitance C68 and C69 filter high frequencies, ensuring stable operation of the subsequent load.

[0022] Voltage regulator circuit, such as Figure 3 As shown, this is a multi-stage linear regulated power supply circuit based on two linear regulators, 33M5G (U6) and 18M5G (U7), to provide a step-down power supply from VBAT (input voltage) to 3.3V (VCC_33) and then to 1.8V (VCC_1V8), providing a stable low-voltage power supply for the system. Utilizing the linear voltage regulation characteristics of the linear regulators, the voltage is stepped down in two steps. The first stage takes VBAT as input, which is regulated by U6 to output 3.3V (VCC_33), powering subsequent circuits or loads. The second stage takes VCC_33 as input, which is further regulated by U7 to output 1.8V (VCC_1V8), suitable for voltage-sensitive loads (such as chip cores).

[0023] Linear regulator chips U6 and U7 internally adjust the voltage drop across the power transistor to linearly step down the input voltage to a fixed output. U6 outputs 3.3V, and U7 outputs 1.8V. They feature voltage regulation and noise suppression, filtering input voltage ripple to provide a clean and stable low-voltage output, meeting the needs of circuits requiring high voltage accuracy. The EN pin is the enable pin, allowing external control signals to be connected to control whether the chip outputs voltage. C73 and C74 are connected in parallel on the VBAT input side; the electrolytic capacitor filters low-frequency ripple, and the ceramic capacitor filters high-frequency noise, purifying the input voltage and preventing interference with the regulator's operation. C75, C76, and C77 are connected in parallel on the VCC_33 output side for further filtering, stabilizing the 3.3V voltage and providing a clean input for the subsequent U7 stage. C71 and C7 are connected in parallel on the VCC_1V8 output side to filter ripple from the 1.8V output, ensuring power quality for the final load. By using two-stage linear regulators to step down the voltage, along with input / output filter capacitors, VBAT is gradually converted to a stable low voltage of 3.3V and 1.8V, providing adaptive power for different modules of the system (such as chip peripherals and the core), while also being compatible with Power over Ethernet scenarios to ensure stable power supply for the devices.

[0024] Keypad interface circuit, such as Figure 4As shown, the interface section (P3-XH-6A connector) serves as the physical connection interface between the button board (or touch module) and the motherboard, enabling signal and power transmission. VDD provides operating power to the button board / touch module. TouchSDA / TouchSCL are the data and clock lines of the I2C communication bus. If the button board integrates touch functionality, it interacts with the motherboard's main control chip through these two lines, transmitting information such as button touch status and coordinates. TouchINT is the interrupt signal pin. When the button board detects a touch event, it sends an interrupt request to the motherboard through this pin, notifying the main control chip to process the touch button operation promptly. Transistor Q4 acts as an electronic switch, controlling the on / off state of the button board's backlight. When the BLCtrl signal is high, the base of transistor Q4 is energized, the transistor conducts, the backlight circuit is connected, and the backlight illuminates; when BLCtrl is low, the transistor is cut off, the backlight circuit is disconnected, and the backlight is off. By controlling the BLCtrl signal, the button board's backlight can be switched on and off. R50 is a current-limiting resistor, connected in series in the BLCtrl signal line. The current flowing into the base of transistor Q4 is limited to prevent excessive current from damaging the transistor and ensure that it operates in a safe and stable state. R62 is a pull-down resistor, with one end connected to the base of transistor Q4 and the other end grounded. When there is no BLCtrl signal input, it pulls the potential of the base of transistor Q4 low to ground, ensuring reliable cutoff of the transistor and preventing false triggering due to a floating base, thus making the backlight control more stable. R10 can be used as a power supply wire or for debugging and adaptation. The 0Ω resistor often acts as a dummy load jumper in the circuit. It is connected here to VDD, VBAT, etc., and its retention can be selected according to actual hardware requirements, facilitating flexible switching of power supply paths during production and debugging. R1 is a reserved resistor for circuit expansion and debugging. This resistor's position is reserved during the design; if additional functions are needed later, a suitable resistor value can be soldered to achieve the desired functionality without affecting the current circuit. D10, D11, D14, and D17 are 32C03 bidirectional TVS diodes. When the TouchSCL / TouchSDA / TouchINT signal lines encounter electrostatic discharge or surge voltage, the TVS diodes will quickly conduct, clamping the excessive voltage within a safe range. This prevents high voltage from damaging the touch chip, communication interface, and other components inside the keypad, improving the reliability and anti-interference capability of the keypad circuit. This circuit focuses on the connection between the keypad and the motherboard, transmitting key touch data via the I2C bus (TouchSDA / TouchSCL). TouchINT quickly triggers the main controller to respond to key operations. A transistor switching circuit is used to flexibly control the keypad backlight switch via the BLCtrl signal. A 0Ω resistor adapts the power supply path, and TVS diodes protect the signal lines, ensuring stable and reliable operation of the keypad, allowing for accurate key operation and anti-interference.

[0025] Software programming circuits, such as Figure 5As shown, P1 serves as the serial communication interface between the main control module and external programming devices (such as computers or programmers), used to transmit program programming data and debugging instructions. R6 and R8 limit the current of the serial port TX and RX signals to prevent excessive current from damaging the serial transceiver circuit of the main control module. They also suppress signal interference to a certain extent, ensuring the reliability of serial communication (e.g., preventing static electricity and surges from damaging the main control module through the serial cable). The USB Type-C interface J2 serves as the connection interface between external devices (such as computers) and the target device, supporting data transmission and power supply. It has reversible insertion capability, is easy to use, and supports higher power transmission and data transmission rates compared to traditional USB interfaces. Pins A4, A9, B4, and B9 are used for power transmission, typically providing 5V or higher voltage to power connected devices. Pins A5 and B5 are configuration channel pins used to detect device connection, negotiate power supply capability and role, and can also be used to identify cable direction. Pins A6, A7, B6, and B7 are used for high-speed data transmission, conforming to the USB data transmission protocol, and can transmit the data required by the programming software. Pins A8 and B8 are used in specific modes and generally do not participate in main operations during normal data transmission and power supply scenarios. Pins A1, A12, and B1 are ground pins, providing a reference potential for the circuit. R43 and R48 are connected between the USB data signal lines (USBDP, USBDM) and ground, respectively. When the USB device is not connected, these resistors pull the data signal lines low, stabilizing the signal level and preventing interference caused by floating states. They also aid in signal detection and initialization when the device is connected. C55 is connected in parallel on the VBUS power line. It filters out high-frequency noise and ripple on the power line, making the power supplied by VBUS cleaner and more stable, providing reliable power to connected devices, and ensuring that devices do not malfunction due to power fluctuations during data transmission (such as software burning). Transient voltage suppression diodes D20, D21, and D22 are used for electrostatic discharge (ESD) protection and overvoltage protection. When electrostatic discharge or transient overvoltage occurs in the circuit, these TVS diodes will quickly conduct, clamping the excessive voltage to a safe level, preventing voltage surges from damaging the interface circuit and the internal circuitry of connected devices, and protecting the USB interface and connected chips and other components.

[0026] The USB data signal lines (USBDP, USBDM) establish a connection for transmitting data for the burning software. Resistors R43 and R48 ensure the data signal lines are stable when not connected, capacitor C55 ensures power supply stability, and TVS diodes D20, D21, and D22 protect the circuit from electrostatic discharge and overvoltage damage, thus ensuring a stable and reliable software burning process.

[0027] SIM card circuit, such as Figure 6As shown, the U10 integrates eSIM functionality, enabling communication with carrier networks (such as data, SMS, and voice), replacing traditional physical SIM cards. It also provides USIM signals (USIMVDD, USIMRST, USIMCLK) for interaction with the main control module. VSS and GND are grounded to ensure stable module operation. IO data input / output pins transmit data signals from the eSIM / USIM card. The RST reset pin resets the eSIM module, bringing it to its initial operating state. The CLK clock pin provides a clock reference for communication between the main control module and the eSIM module, ensuring data transmission and reception synchronization. VDD and USIMVDD power pins provide operating voltage for the eSIM module and USIM card. USIMRST and USIMCLK are the reset and clock signal outputs for the USIM card, respectively, working with the main control module to operate the USIM card. C11, C12, and C13 filter out ripple and noise on the power lines, providing a clean and stable operating voltage for the eSIM module and preventing power fluctuations from affecting communication functionality.

[0028] Adapter board connects to interface circuits, such as Figure 7 As shown, this circuit is designed to interface with an adapter board. If the device has an adapter function, this interface can communicate with the adapter board for data and audio signals, and also provide the adapter board with the corresponding power.

[0029] I2C communication signal circuit, such as Figure 8As shown, VDD18_EXT represents an externally supplied 1.8V power supply used to power the relevant components in the circuit. Capacitors C1 and C2 are filter capacitors, connected in parallel between the power supply VDD18_EXT and ground. Their function is to filter out high-frequency noise and ripple on the power lines, making the power supply more stable. At the moment of power-on, the capacitors can absorb surge current, preventing damage to the circuit; during circuit operation, they can continuously stabilize the voltage, preventing voltage fluctuations from affecting the normal operation of other components. Resistors R44, R45, and R57 are pull-up resistors, connected between I2C_SCL (clock line), I2C_SDA (data line), and I2C_INT (interrupt line) and the power supply VDD18_EXT, respectively. Pull-up resistors play a crucial role in the I2C bus. The I2C bus is an open-drain output structure, requiring pull-up resistors to pull the signal lines high. When no device is driving the signal line, the pull-up resistor keeps the signal line high; when a device needs to send a low level, it is achieved by grounding the signal line. This increases signal driving capability, reduces signal attenuation and interference during transmission, and ensures the reliability of I2C communication. The I2C_SCL, I2C_SDA, and I2C_INT signals on the left side of U1 (RS0104YQ) are respectively transferred to the Touch_SCL, Touch_SDA, and Touch_INT signals on the right side. This prevents electrical interference between upstream and downstream circuits, acts as a signal buffer, and avoids the signals from the upstream circuit directly affecting the downstream circuit, enhancing signal stability and anti-interference capability. If the operating levels of the upstream and downstream circuits are inconsistent, this chip can perform level conversion, enabling circuits with different levels to communicate normally. Capacitors C3 and C4 are connected in parallel between the power supply VCC_33 and ground, also serving a filtering function. They can filter out high-frequency noise and ripple on the VCC_33 power line, stabilize the power supply of the downstream circuit (the circuit connecting the Touch_SCL, Touch_SDA, and Touch_INT signals), and ensure the stability and reliability of signal transmission.

[0030] Network port circuit, such as Figure 9As shown, this is an Ethernet interface circuit based on the CH595Q main control chip U5 and the HR911105A network port transformer, which is the core of realizing the network connection of the device. The Ethernet isolation transformer and indicator light driver realize signal coupling, electrical isolation, and surge protection, and drive the network port status lights. The RX+, RX-, TX+, and TX- differential data transceiver pins are connected to the network PHY interface of the CH595Q to transmit Ethernet differential data. The CH595Q's internal MAC / PHY generates Ethernet data, which is output as a TX0_P / TX0_N differential signal and enters the HR911105A transformer to realize signal coupling and electrical isolation, and is sent to the external network via the network port RJ45. The external network data enters the HR911105A via RJ45. After surge isolation and filtering by the transformer, it is transmitted to the CH595Q's MAC / PHY module via the RX0_P / RX0_N differential signal, where the main control chip parses and processes the network data. The HR911105A Ethernet transformer matches the impedance of the Ethernet port (100Ω differential impedance) to the main control PHY chip, ensuring signal transmission without reflection. It blocks high voltage and surges from the external network from entering the motherboard, protecting the main control chip; it also isolates ground loop interference, improving network communication stability. It drives the Ethernet port status LEDs, using resistor current limiting to visually display network connection / data transmission / reception status. The RJ45 Ethernet port physical interface connects to an external Ethernet cable, enabling physical layer connection between the device and the network for differential data transmission and power supply. R35-R39 are matching resistors on the primary and secondary sides of the Ethernet transformer, fine-tuning the differential signal impedance to ensure signal integrity. R40 and R41 are LED current-limiting resistors, limiting the current to the Ethernet port status LEDs to prevent overcurrent damage and control brightness. The CH595Q integrates an Ethernet MAC / PHY controller, which interfaces with the external network via the Ethernet transformer.

[0031] New types of Flash memory circuits, such as Figure 10As shown, the core chip is W25Q256JWEIQ (U8), a NorFlash memory with an SPI interface, used to store programs and configuration data. Data is retained even when power is off. SPI bus communication is achieved through W25QCS, W25QCLK, W25QDI, and W25QDO. The main controller or subsequent circuits access the Flash memory via SPI commands to perform data storage / retrieval. Resistor R59 is a reserved resistor for hardware encryption and write protection (WP pin) expansion; it is currently not enabled. R60 and R61 serve as wires and for debugging, ensuring attenuated transmission of the W25QDO / DI and subsequent SPISDO / SDI signals. C5 filters out high-frequency ripple from the VCC_1V8 power supply, providing stable power to the Flash. R8 can be used for HOLDER / RESET pin configuration; in this circuit, it is directly connected to VCC_1V8, enabling Flash operation by default. The main controller (or subsequent circuits) selects the Flash chip by pulling W25QCS low. W25QCLK provides the SPI clock, W25QDI sends commands / data, W25QDO returns the data stored in Flash. After completing the data read / write, W25QCS is pulled high to release the Flash chip.

[0032] Signal switching and level conversion circuits, such as Figure 11 As shown, the core chip is RS0208YTSS20 (U2), an 8-channel signal converter and level converter chip that enables bidirectional transmission of signals in different voltage domains (such as 1.8V / 3.3V) to adapt to the level requirements of the front and rear stage circuits. VCCA and VCCB provide different power levels for the channels on both sides of the chip, realizing level conversion. SPICS, SPICLK, SPISDI, and SPISDO connect to the front-end SPI signals; CH395CS#, CH395SCK, CH395SDI, and CH395SDO connect to the rear-end CH395 chip to complete signal conversion. C15 and C16 filter out low-frequency / high-frequency ripple of the 1.8V power supply to ensure stable operation of U2. C17 and C18 provide stable power supply for the 3.3V side channel of U2. The front-end SPI signal enters the SPICS / CLK / SDI / SDO channel of U2, and the level conversion is completed internally by U2; the converted signal is output to the subsequent circuit through CH395CS# / SCK / SDI / SDO; the reverse is also the same, the subsequent signal is converted to the front-end level (1.8V) by U2, realizing bidirectional compatible communication.

[0033] Power amplifier circuit, such as Figure 12As shown, this is a dual-channel audio amplifier circuit based on the HT6872M audio power amplifier chip, used to drive speakers (SPK, HandleSPK). Chips U11 and U3 are both HT6872M audio power amplifiers with built-in Class AB power amplifier circuits, supporting mono audio amplification and output to drive speakers. Two independent audio amplification channels (SPK main channel, HandleSPK handle / sub-channel) adapt to the audio output requirements of the device's speakers and handles. Taking the U11 main channel as an example, SPKN / SPKP are differential audio input signals, filtered by C37, C41, C20, and C23, and then voltage-divided and matched by R20, R21, R11, and R12 before being sent to the IN- / IN+ pins of the HT6872M. SPKCTRL is the enable / volume control signal, filtered by R19 and C35 before being input to the CTRL pin to control the operating state or gain of the power amplifier chip. The HT6872M internally amplifies the input audio signal and outputs drive signals through OUT- / OUT+ to power the speakers (SPK-, SPK+). VBAT is the power input; capacitors C39, C40, C21, and C22 filter the signal to power the chip. External capacitors C36 and C19 connected to the BYPASS pin stabilize the internal power supply and improve sound quality. The HT6872M's audio power amplifier amplifies the weak audio signal to sufficient power to drive the speaker. Capacitors C35, C36, C19, and C22 filter and couple the signal, removing power supply noise and signal interference to ensure pure audio. Resistors R19, R20, R9, and R11 divide the voltage to match the input signal, limit current to protect the chip, and control gain / enable. Speaker interfaces (SPK- / +, HandleSPK- / +): connect to the speaker and output the amplified audio. Storage and Control: U8 stores program data and connects to U2 via the SPI bus; U2 resolves the level difference between the front and rear circuits, ensuring reliable signal transmission; ultimately, it realizes a complete data storage link between the main controller, U2, and U8, or reads Flash data back to the main controller.

[0034] Audio auxiliary processing circuitry, such as Figure 13As shown, this is an audio output filtering and protection circuit used in the power amplifier (HT6872M) stage. It filters and reduces noise in the audio signal and provides electrostatic discharge (ESD) / surge protection. The circuit is divided into two paths: the main speaker SPK and the handheld speaker HandleSPK, each with the same function. A capacitor network filters out high-frequency noise in the audio signal, ensuring pure sound quality. TVS diodes suppress ESD and surges, protecting the speaker and power amplifier circuit. Taking the main speaker SPK circuit as an example, resistors R16 and R17 act as wires / adjustments, ensuring attenuated audio signal transmission and also allowing for flexible jumper connections during production. C27, C29, C31, C28, C30, and C32 form a π-type filter network, filtering out high-frequency noise in the audio signal for a purer output audio. Small-capacity capacitors have low impedance to high-frequency signals, short-circuiting high-frequency noise to ground and preserving low-frequency audio signals. TVS diodes D5 and D6 quickly conduct when the circuit encounters ESD or surge voltage, clamping excessive voltage within a safe range to prevent damage to the speaker or power amplifier. The LS1 speaker audio output terminal converts electrical signals into sound, enabling hands-free speaker functionality. The handle speaker circuit is completely symmetrical to the main speaker circuit, and components R14, R15, C43, C48, etc., have the same function.

[0035] Microphone input circuit, such as Figure 14 As shown, the microphone audio input circuit is used in telephone handset / hands-free scenarios to achieve microphone signal acquisition, filtering, and bias power supply. The following disassembly explains the principle and function of the components. The circuit is divided into two paths: the handset microphone (P2 interface) and the hands-free microphone (MK1). Taking the handset microphone P2 as an example, the interface P2 is the physical interface of the telephone handset, connecting the handset's speaker (SP+ / -) and microphone (HandleMIC+ / -). The microphone MK1 is an electret microphone that converts sound into electrical signals (MK+ / MK- differential output). Capacitors C45, C50, C53, C38, C49, and C52 form a π-type network to filter out environmental noise and retain the voice signal. TVS diodes D12 and D13 clamp the microphone when it encounters static electricity, protecting the microphone and subsequent circuits. R26 and R27 ensure attenuated audio signal transmission and can also be used as jumpers for production debugging. C44 and C47 block DC signals, allowing only AC audio signals to pass through, avoiding power supply interference with voice acquisition. R28, R30, R31, and R32 provide the operating voltage (MICBIAS) for the electret microphone. Through voltage division, they ensure the internal MOSFETs operate at a suitable quiescent point, guaranteeing normal signal output. MIC+ / MIC- uses differential input, and the symmetrical resistor design ensures signal balance and improves interference immunity (suppressing common-mode noise). C46 further stabilizes the microphone bias voltage or filters out low-frequency noise.

[0036] Audio signal switching circuit, such as Figure 15As shown, this is an audio signal switching and protection circuit, divided into two parts: basic microphone filtering and protection, and relay audio switching. It performs preprocessing of the handset microphone signal, electrostatic discharge (ESD) protection, and relay switching control for multiple audio inputs. It performs high-frequency filtering and ESD protection on the telephone handset microphone signal (HandleMIC+ / -), outputting a clean audio signal to the subsequent circuitry. Capacitors C52, C54, C56, C57, C58, and C59 form a multi-stage π-type filter network to filter out high-frequency noise in the audio signal, ensuring pure voice. TVS diodes D23 and D16 quickly conduct when the microphone encounters ESD, clamping overvoltage and protecting the subsequent circuitry. R29 and C9 provide pull-up / filtering for the handset buttons (HandleKey). When a button is pressed, a level change is triggered, which can be used for functions such as handset off-hook and hang-up.

[0037] The relay audio switching circuit uses relays (HRS2H-S-DCSV-N) to switch between multiple audio inputs, selecting the audio signal path as needed. SWJK is the control signal, driving relays JK2C / JK2B via Q5: when SWJK is high, Q5 conducts, energizing the relay coil and switching the contacts. After contact switching, different audio paths are selected: contacts 6-7 and 3-4 connect the MIC+ / - path; contacts 6-8 and 3-5 connect the SWMIC+ / - path. Relays JK1C / JK1B switch between the MK+ / - and HandleMIC+ / - paths, and the RELAYCTRL signal controls transistor Q3 to drive the relay. The relays (HRS2H-S-DCSV-N) control contact switching through coil current, achieving hardware-level switching of audio paths. Transistors Q5 and Q3 drive the relays, with a small signal controlling a large current, achieving low-voltage control of high-voltage. Diodes D18 and D19 absorb reverse electromotive force when the relay coil is de-energized, protecting the transistor and control circuit. Capacitors C113 and C114 block DC signals, allowing only audio AC signals to pass through, thus preventing DC interference from different paths.

[0038] The handset microphone signal (HandleMIC+ / -) is filtered and protected against electrostatic discharge before entering the switching circuit. The main control module outputs the SWJK / RELAYCTRL signal, which drives a relay via a transistor, switching the contacts to select the target audio path. The switched audio signal (such as MIC+ / -, SWMIC+ / -) is then sent to the power amplifier and encoding circuit to enable functions such as call and recording.

[0039] Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the present invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A voice intercom adapter mainboard circuit, characterized in that, include: The main control and communication chip U4 uses the ML160T chip to realize the control and communication functions of the device; The voltage regulator circuit, connected to the main control and communication chip U4, is used to process the input DC voltage and output a stable voltage to the downstream load. The voltage regulator circuit is connected to the main control and communication chip U4 and is used to provide a stable low-voltage power supply to the system. The keypad interface circuit is connected to the main control and communication chip U4 to realize the power and signal transmission of the keypad. The SIM card circuit is connected to the main control and communication chip U4 and is used to read and interact with data from the SIM card or USIM card. The software programming circuit is connected to the main control and communication chip U4 to realize the connection and data transmission between the device and the external USB device, and to program the relevant software program into the main control and communication chip U4. The adapter board connects to the interface circuit and is connected to the main control and communication chip U4 for interfacing with the adapter board; The I2C communication signal circuit is connected to the main control and communication chip U4 and is used to realize the signal conversion and level conversion of I2C signals. The network port circuit, connected to the main control and communication chip U4, is used to realize the Ethernet communication function of the device, ensuring that data can be transmitted stably and reliably between the device and the network. The Flash memory circuit is connected to the main control and communication chip U4 and is used to store programs and configuration data to ensure that data is not lost when power is off. The signal conversion and level conversion circuit is connected to the main control and communication chip U4 to realize bidirectional transmission of signals in different voltage domains and adapt to the level requirements of the front and rear stage circuits. The power amplifier circuit, connected to the main control and communication chip U4, is used to amplify weak audio signals to a sufficient power to drive the speaker. The audio auxiliary processing circuit is connected to the power amplifier circuit and is used in the power amplifier stage to filter and reduce noise in the audio signal, and provide electrostatic and surge protection. The microphone input circuit is connected to the main control and communication chip U4 and is used in telephone handsets and hands-free scenarios to realize the acquisition, filtering and bias power supply of microphone signals. The audio signal switching circuit, connected to the main control and communication chip U4, is used to realize the preprocessing of the microphone signal of the handle, electrostatic protection, and relay switching control of multiple audio inputs.

2. The voice intercom adapter motherboard circuit according to claim 1, characterized in that: The main control and communication chip U4 has a capacitor C8 and a resistor R3 connected to pin 46. A capacitor C10, a bidirectional diode D1, and an antenna ANT are connected to the resistor R3. The voltage regulator circuit includes a chip U13. A capacitor C64 is connected between pins 2 and 6 of the chip U13. One end of an inductor L1 is also connected to pin 2 of the chip U13. The other end of the inductor L1 is connected to capacitors C67, C66, C65, resistors R54 and R56. A capacitor C69, C68, and C70 are connected to pin 3 of the chip U13. A resistor R53 and a resistor R55 are connected to pin 5 of the chip U13. The voltage regulator circuit includes chip U6 and chip U7. Capacitors C74 and C73 are connected between pins 1 and 2 of chip U6. Pin 5 of chip U6 is connected to pin 1 of chip U7. Capacitors C77, C76 and C75 are connected between pins 1 and 2 of chip U7. Capacitors C71 and C72 are connected to pin 5 of chip U7.

3. The voice intercom adapter motherboard circuit according to claim 1, characterized in that: The keypad interface circuit includes connector P3. Diodes D10, D11, D14 and D17 are connected to pins 5, 4 and 3 of connector P3. The collector of transistor Q4 is connected to pin 2 of connector P3. The base of transistor Q4 is connected to resistor R50 and is connected to pin 12 of the main control and communication chip U4. The SIM card circuit includes an eSIM chip U10. Pins 2, 8, 7, and 6 of the eSIM chip U10 are connected to pins 6, 8, 7, and 5 of the main control and communication chip U4. A capacitor C11 is connected to pin 3 of the eSIM chip U10. Capacitors C12 and C13 are connected to pins 6 and 7 of the eSIM chip U10. The software programming circuit includes connector P1 and Type-C interface J2. Pin 2 of connector P1 is connected to resistor R6 and then to pin 32 of the main control and communication chip U4. Pin 1 of connector P1 is connected to resistor R8 and then to pin 31 of the main control and communication chip U4. Pins A4 and A9 of the Type-C interface J2 are connected together. Pin A9 of the Type-C interface J2 is connected to diode D22 and capacitor C55 and then to pin 28 of the main control and communication chip U4. Pin A5 of the Type-C interface J2 is connected to resistor R43. The A6 pin of the Type-C interface J2 is connected to diode D20 and is connected to pin 26 of the main control and communication chip U4. The A7 pin of the Type-C interface J2 is connected to diode D21 and is connected to pin 27 of the main control and communication chip U4. The B4 and B9 pins of the Type-C interface J2 are connected to pin 28 of the main control and communication chip U4. The B5 pin of the Type-C interface J2 is connected to resistor R48. The B6 and B7 pins of the Type-C interface J2 are connected to pins 26 and 27 of the main control and communication chip U4, respectively.

4. The voice intercom adapter motherboard circuit according to claim 1, characterized in that: The adapter board connection interface circuit includes a docking interface J4. Pins 4 and 5 of the docking interface J4 are respectively connected to capacitors C112 and C111, which are respectively connected to pins 21 and 22 of the main control and communication chip U4. The I2C communication signal circuit includes a chip U1. Pin 1 of the chip U1 is connected to resistors R57, R45, and R44. Pins 3, 4, and 5 of the chip U1 are connected to pins 57, 56, and 55 of the main control and communication chip U4, respectively. Resistor R57 is connected to pin 3 of the chip U1, resistor R45 is connected to pin 4 of the chip U1, resistor R44 is connected to pin 5 of the chip U1, and capacitors C3 and C4 are connected to pin 14 of the chip U1. The network port circuit includes a main control chip U5. A resistor R35 and a crystal oscillator Y1 are connected between pins 10 and 11 of the main control chip U5. Pins 4, 5, 7, and 8 of the main control chip U5 are connected to pins 3, 6, 1, and 2 of the network port transformer HR911105A, respectively. One end of resistor R36, one end of resistor R37, one end of resistor R38, and one end of resistor R39 are connected between pins 4 and 5 of the network port transformer HR911105A. The other end of resistor R36 is connected to pin 1 of the HR911105A network transformer. The other end of resistor R37 is connected to pin 2 of the HR911105A network transformer. The other end of resistor R38 is connected to pin 6 of the HR911105A network transformer. The other end of resistor R39 is connected to pin 3 of the HR911105A network transformer. Resistors R40 and R41 are connected to pins 9 and 12 of the HR911105A network transformer, respectively.

5. The voice intercom adapter motherboard circuit according to claim 1, characterized in that: The Flash memory circuit includes a chip U8. Pin 2 of chip U8 is connected to a resistor R60 and is connected to pin 2 of the main control and communication chip U4. Pins 3 and 4 of chip U8 are connected to a resistor R59. Pin 5 of chip U8 is connected to a resistor R61 and is connected to pin 3 of the main control and communication chip U4. Pin 6 of chip U8 is connected to pin 1 of the main control and communication chip U4. Pins 7 and 8 of chip U8 are connected to a resistor R58, a capacitor C5, and a resistor R8. The signal conversion and level shifting circuit includes chip U2. Pin 2 of chip U2 is connected to capacitors C15 and C16. Pins 3, 4, 5, 6, 7, 8, and 9 of chip U2 are connected to pins 70, 71, 72, 4, 1, 3, and 2 of the main control and communication chip U4, respectively. Pins 12, 13, 14, 15, 16, 17, and 18 of chip U2 are connected to pins 62, 61, 60, 59, 49, 26, and 36 of the main control chip U5.

6. The voice intercom adapter motherboard circuit according to claim 1, characterized in that: The power amplifier circuit includes chip U11 and chip U3. Pin 1 of chip U11 is connected to resistor R19 and capacitor C35 and is connected to pin 14 of main control and communication chip U4. Pin 2 of chip U11 is connected to capacitor C36. Pin 3 of chip U11 is connected to resistor R20 and capacitor C37 and is connected to pin 21 of main control and communication chip U4. Pin 4 of chip U11 is connected to resistor R21 and capacitor C41 and is connected to pin 22 of main control and communication chip U4. Pin 6 of chip U11 is connected to capacitor C39 and capacitor C40. Pin 1 of chip U3 is connected to resistor R9 and capacitor C42 and is connected to pin 15 of main control and communication chip U4. Pin 2 of chip U3 is connected to capacitor C19. Pin 3 of chip U3 is connected to resistor R11 and capacitor C20 and is connected to pin 21 of main control and communication chip U4. Pin 4 of chip U3 is connected to resistor R12 and capacitor C23 and is connected to pin 22 of main control and communication chip U4. Pin 6 of chip U3 is connected to capacitors C21 and C22. The audio auxiliary processing circuit includes resistors R16 and R17. One end of resistors R16 and R17 is connected to pins 5 and 8 of chip U11, respectively. The other end of resistors R16 and R17 is connected to capacitors C28, C30, C32, C27, C29, and C31, respectively, and is connected to pins 2 and 1 of speaker LS1. Diodes D5 and D6 are connected to pins 2 and 1 of speaker LS1. The audio auxiliary processing circuit also includes resistors R14 and R15. One end of resistors R14 and R15 is connected to pins 8 and 5 of chip U3, respectively. The other end of resistors R14 and R15 is connected to capacitors C48, C26, C43, C6, C60, and C61, respectively.

7. The voice intercom adapter motherboard circuit according to claim 6, characterized in that: The microphone input circuit includes resistors R26 and R27. One end of resistors R26 and R27 is connected to pins 24 and 23 of the main control and communication chip U4. The other end of resistor R26 is connected to capacitor C44, resistor R30, and resistor R28. The other end of resistor R27 is connected to capacitor C47, resistor R31, and resistor R32. Capacitor C46 is connected between resistors R28 and R30 and between resistors R31 and R32. The microphone input circuit also includes a microphone MK1, and capacitors C38, C49, C51, C45, C50, C53, diode D12, and diode D13 are connected between pins 1 and 2 of the microphone MK1. The microphone input circuit also includes an interface P2, with pins 2 and 1 of the interface P2 connected to the other ends of resistors R14 and R15, respectively.

8. The voice intercom adapter motherboard circuit according to claim 7, characterized in that: The audio signal switching circuit includes capacitors C52, C54, C56, C57, C58, and C59, diode D23, and diode D16. These capacitors are connected to pins 3 and 4 of interface P2. The audio signal switching circuit also includes relays JK1C, JK1B, and JK1A. Pins 7 and 8 of relay JK1C are connected to pin 1 of microphone MK1 and pin 3 of interface P2, respectively. Pins 4 and 5 of relay JK1B are connected to pin 2 of microphone MK1 and pin 4 of interface P2, respectively. A diode D19 and the collector of transistor Q3 are connected between pins 1 and 2 of relay JK1A. A resistor R46 is connected to the base of transistor Q3 and is connected to pin 16 of the main control and communication chip U4. A resistor R47 is connected between the base and emitter of transistor Q3. The audio signal switching circuit also includes relays JK2C, JK2B, and JK2A. Pin 7 of relay JK2C is connected to pin 6 of relay JK1C. Pin 8 of relay JK2C is connected to capacitor C113. Pin 4 of relay JK2B is connected to pin 3 of relay JK1B. Pin 5 of relay JK2B is connected to capacitor C114. Pins 1 and 2 of relay JK2A are connected to the collector of diode D18 and transistor Q5. The base of transistor Q5 is connected to resistor R63 and to pin 40 of the main control and communication chip U4. Resistor R64 is connected between the base and emitter of transistor Q5.

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