Optical modulator

Abstract

This invention provides an optical modulator and its fabrication and usage method. The optical modulator includes a set of at least four vertically alternating negatively doped and positively doped interdigitated structures to form a P-N junction diode. The junction has a serpentine or sinusoidal shape, which increases the junction surface area within a given volume. The resulting modulation efficiency is significantly improved. The method of fabricating the P-N junction includes the self-alignment of various components.

Description

Technical Field

[0001] An embodiment of this utility model relates to an optical modulator. Background Technology

[0002] Silicon photonics has rapidly become a mainstream technology, especially in photonic integrated circuits (PICs). These circuits may be based on a silicon-on-insulator (SOI) platform to enable high-speed optical communication between integrated circuits and / or semiconductor dies. Utility Model Content

[0003] According to some embodiments of this disclosure, an optical modulator is provided. The optical modulator includes a waveguide region comprising a PN junction diode having a plurality of interdigitated finger structures with vertically alternating negative and positive doping. A negatively doped pickup channel is electrically connected to a first ohmic contact to a negatively doped finger structure. A positively doped pickup channel is electrically connected to a second ohmic contact to a positively doped finger structure. Attached Figure Description

[0004] The aspects of this disclosure will be best understood by reading the following detailed description in conjunction with the accompanying drawings. It should be noted that, in accordance with industry standard practice, the components are not drawn to scale. In fact, for clarity of explanation, the dimensions of the various components may be arbitrarily increased or decreased.

[0005] Figure 1A This is a cross-sectional view of a first embodiment of an optical modulator according to some embodiments of this disclosure.

[0006] Figure 1B yes Figure 1A Enlarged cross-sectional view of a PN junction diode.

[0007] Figure 2 This is a cross-sectional view of a second embodiment of an optical modulator according to some embodiments of this disclosure. In this embodiment, a silicon-on-insulator (SOI) structure is used.

[0008] Figure 3A and Figure 3B Together they form a flowchart illustrating the fabrication method of the optical modulator in some embodiments.

[0009] Figure 4 This is a side cross-sectional view, showing the substrate after the etched trenches and the application of a hard mask layer.

[0010] Figure 5 The image is a side cross-sectional view showing the substrate after the first doped morphology is implanted into the first trench and the first side of the waveguide region.

[0011] Figure 6 The image is a side cross-sectional view showing the substrate after the second doped morphology is implanted into the second trench and the second side of the waveguide region.

[0012] Figure 7 The image is a side cross-sectional view showing the substrate after the second doping concentration is increased in the second trench to form the second pickup channel.

[0013] Figure 8 The image is a side cross-sectional view showing the substrate after the first doping concentration is increased in the first trench to form the first pickup channel.

[0014] Figure 9 This is a side cross-sectional view showing the base layer after the two trenches have been filled with dielectric material.

[0015] Figure 10 This is a side cross-sectional view showing the substrate after the first doped region is implanted into the waveguide region.

[0016] Figure 11 This is a side cross-sectional view, showing the substrate after the second doped region is implanted into the waveguide region.

[0017] Figure 12 This is a side cross-sectional view, showing the substrate after the waveguide region is implanted in the third doped region.

[0018] Figure 13 This is a side cross-sectional view, showing the substrate after the waveguide region is implanted in the fourth doped region.

[0019] Figure 14 The image is a side cross-sectional view showing the substrate after thermal annealing was performed to form negatively-doped and positively-doped interlocking fingers in the waveguide region.

[0020] Figure 15 This is a side cross-sectional view showing the substrate after the first ohmic contact, which connects to the first pickup channel, is formed on the upper surface of the substrate.

[0021] Figure 16 This is a side cross-sectional view showing the base layer after the second ohmic contact, which connects to the second pickup channel, is formed on the upper surface of the base layer.

[0022] Figure 17 This is a plan view of a first embodiment of an optical modulator. Here, the optical modulator is a micro-ring modulator (MRM) with a circular or annular shape.

[0023] Figure 18 This is a plan view of a second embodiment of the optical modulator. Here, the optical modulator is a microring modulator (MRM) with a racetrack shape.

[0024] Figure 19 This is a plan view of a third embodiment of the optical modulator. Here, the optical modulator is a Mach-Zehnder modulator (MZM).

[0025] Figure 20 This is a plan view of a system with three optical modulators. The input optical signal to this system contains three different wavelengths. Each optical modulator selectively modulates the amplitude of one wavelength.

[0026] Figure 21 This is a flowchart illustrating how to use an optical modulator according to some embodiments. Detailed Implementation

[0027] The following disclosure provides numerous different embodiments or examples for implementing various features of the provided subject matter. Specific examples of components and arrangements described below are provided to simplify this disclosure. Of course, these are merely examples and are not intended to limit this disclosure. For example, in the following description, forming a first feature on or over a second feature can include embodiments where the first and second features are formed in direct contact, or embodiments where other features are formed between the first and second features such that the first and second features may not be in direct contact. Additionally, reference numerals and / or letters are repeated in various examples. This repetition is for the purpose of simplicity and clarity and does not in itself define the relationship between the various embodiments and / or architectures discussed.

[0028] Furthermore, for ease of explanation, spatially relative terms such as “benefit,” “below,” “lower,” “above,” and “upper” are used throughout this document to indicate the relationship between one component or feature and another. These spatially relative terms are intended to cover different orientations of components in use, or operations other than those depicted in the figures. The apparatus may be oriented in other ways (rotated 90 degrees or in other directions), and the spatially relative terms used herein will be interpreted accordingly.

[0029] Numerical values ​​in this disclosure and the claims should be understood to include values ​​that remain the same when reduced to the same number of significant figures, as well as values ​​that differ from those determined by experimental errors less than those determined by conventional measurement techniques of the type described in this disclosure. All scopes of this disclosure include the endpoints of the numerical values.

[0030] The term "approximately" can be used to include any numerical value that can vary without altering its underlying functionality. When used with a range, "approximately" also reveals a range defined by the absolute values ​​of its two endpoints; for example, "approximately 2 to approximately 4" also reveals a range "from 2 to 4". The term "approximately" can refer to a numerical value ±10%.

[0031] This disclosure mentions temperatures for certain process steps. It is important to note that these temperatures typically refer to the set temperature of the heat source (such as a furnace), and not necessarily the temperature that the material exposed to the heat source must reach.

[0032] In this article, the term "parallel" is generally used to describe two structures facing the same direction. This term should not be interpreted in a strictly mathematical way as requiring that the two structures never intersect.

[0033] This disclosure relates to structures composed of different layers. When the terms "on" or "on" are used to refer to two different layers (including the substrate), they simply mean that one layer is on or on top of the other. These terms do not require that the two layers be in direct contact and allow other layers to be located between them. For example, all layers of a structure can be considered "on" the substrate, even if they are not all in direct contact with the substrate. The word "direct" can be used to indicate that two layers are in direct contact and there are no other layers between them. Furthermore, when referring to performing process steps on the substrate or performing process steps on the substrate, this should be interpreted as meaning that, depending on the context, such steps are also performed on any layers that may be present on the substrate.

[0034] This disclosure relates to optical modulators useful in photonic integrated circuits. In this regard, a waveguide typically consists of a core and a cladding layer surrounding the core, wherein the refractive index of the core is greater than that of the cladding layer. Data in the form of one or more optical signals (i.e., light having one or more wavelengths) can propagate within the core. The amplitude of the optical signals can be modulated by optical modulators, which are formed as PN junctions within the waveguide. Applying a bias voltage to the PN junction alters the charge carrier density of the PN junction (also known as the plasma dispersion effect), thereby changing the refractive index and phase shift. The application of the bias voltage changes the resonant wavelength of the optical signal, thus causing a change in the signal amplitude.

[0035] The optical modulation amplitude (OMA) depends on the shape and doping profile of the PN junction. Higher doping concentrations provide a sharper PN junction and higher carrier concentration, but may also lead to increased optical losses and a lower Q-factor. Increased parasitic capacitance may also occur, which reduces the electrical bandwidth of high-speed modulation. In this disclosure, fork-type or finger-type PN junctions are formed using a self-aligning process. This provides a higher junction surface area within the same volume. Compared to a typical planar PN junction, the modulation efficiency is also significantly improved at comparable optical losses.

[0036] This is a cross-sectional view of a first embodiment of the optical modulator 100 according to some embodiments of the present disclosure. Figure 1B This is an enlarged cross-sectional view of a PN junction diode 180.

[0037] First refer to Figure 1AThe optical modulator 100 is fabricated in a substrate 110. A first trench 120 and a second trench 130 are etched into the substrate 110, and these trenches 120, 130 are currently filled with a dielectric material 140. A waveguide region 150 exists between the two trenches 120, 130. Each trench 120, 130 has a first sidewall 122, 132 not present in the waveguide region 150 and a second sidewall 124, 134 present in the waveguide region 150. Multiple vertically alternating negatively and positively doped interdigitated structures are present in the waveguide region 150. The term "multiple" as used herein refers to multiple negatively doped and positively doped interdigitated structures; in other words, at least four interdigitated structures are present in total. Two negatively doped interdigitated structures 160 and two positively doped interdigitated structures 170 are illustrated here, forming a PN junction diode 180.

[0038] Next, a first pickup channel 190 exists in the first trench 120 and is electrically connected to a first ohmic contact 210 on the upper surface 112 of the base layer 110. The first pickup channel 190 is located on / inside the first sidewall 122 and the bottom of the first trench 120. The first pickup channel 190 is formed by implanting a first dopant. A second pickup channel 200 exists in the second trench 130 and is electrically connected to a second ohmic contact 212 on the upper surface 112 of the base layer. The second pickup channel 200 is located on / inside the first sidewall 132 and the bottom of the second trench 130. The second pickup channel 200 is formed by implanting a second dopant. The first dopant and the second dopant are different from each other in charge. In other words, one pickup channel (190 or 200) is negatively doped and forms an electrical connection between an ohmic contact (210 or 212) and a negatively doped finger structure 160 in waveguide region 150. The other pickup channel (200 or 190) is positively doped and forms an electrical connection between another ohmic contact (212 or 210) and a positively doped finger structure 170 in waveguide region 150.

[0039] A first link region 220 exists on the second sidewall 124 of the first trench 120. As illustrated herein, this first link region 220 electrically connects the negatively doped finger structure 160 to the first pickup channel 190. Similarly, a second link region 230 exists on the second sidewall 134 of the second trench 130, and the second link region 230 electrically connects the positively doped finger structure 170 to the second pickup channel 200.

[0040] Now refer to Figure 1BIn a particular embodiment, the waveguide region 150 may have a thickness of about 160 nanometers or a height of about 300 nanometers. In a particular embodiment, the width 157 of the waveguide region 150, measured at the upper surface 112, is about 200 nanometers to about 500 nanometers.

[0041] In some embodiments, the thicknesses 225 and 235 of each link region on the side of waveguide region 150 range from about 50 nanometers to about 100 nanometers, respectively. The thicknesses 195 and 205 of each pickup channel in the trench range from about 30 nanometers to about 200 nanometers, respectively. In various embodiments, the width 167 of each finger structure ranges from about 150 nanometers to about 450 nanometers, respectively. Similarly, the height 165 of each finger structure ranges from about 30 nanometers to about 100 nanometers, respectively. Other ranges and values ​​of these heights, widths, and thicknesses are also considered within the scope of this disclosure.

[0042] like Figure 1B As shown, the interface 182 between the negatively doped finger structure and the positively doped finger structure exhibits a serpentine or sinusoidal shape in cross-sectional view. The aforementioned interface consists of a series of horizontal segments connected by vertical segments (shown here as semicircles). The interface has a surface area, and having more horizontal and vertical segments within the same thickness or height 155 indicates a higher surface area.

[0043] Figure 2 This is a cross-sectional view of a second embodiment of an optical modulator 100 according to some embodiments of the present disclosure. In this embodiment, a silicon-on-insulator (SOI) structure is used. In this embodiment, a dielectric layer 240 is present below a base layer 110. A substrate 245 is present below the dielectric layer 240.

[0044] Figure 3A and Figure 3B Together, they form a flowchart illustrating a method 300 for manufacturing an optical modulator according to some embodiments. Some steps of the method are also illustrated in… Figures 4 to 16 The following discussion outlines the method steps for forming a single optical modulator, but should also be broadly understood to apply to the simultaneous formation of multiple optical modulators. Additional steps may be performed between the steps described herein, while some steps are omitted solely for clarity. Not all method steps are necessary to obtain the structure disclosed herein. Furthermore, some method steps may be performed simultaneously or in a different order than those shown or described herein.

[0045] First, refer to Figure 4The image shows a substrate 110 made of a semiconductor material. This semiconductor material may include silicon, for example, in the form of crystalline silicon. In alternative embodiments, the substrate 110 may be made of other elemental semiconductors, such as germanium, or may include compound semiconductors such as silicon carbide (SiC), gallium arsenide (GaAs), gallium carbide, gallium phosphide, indium arsenide (InAs), indium phosphide (InP), silicon germanium, silicon germanium carbide, gallium arsenide phosphide, or indium gallium phosphide. In a particular embodiment, the substrate 110 is made of silicon.

[0046] If you wish to create something like Figure 1A The optical modulator 100 illustrated typically has its base layer 110 provided in the form of a chip. However, if it is desired to use a... Figure 2 The illustrated silicon-on-insulator (SOI) structure can provide or construct a structure corresponding to... Figure 2 The substrate 245, dielectric layer 240 and base layer 110 are three-layer structures.

[0047] A three-layer structure can be fabricated using two layers of deposition. Figure 3A In step 302, a dielectric layer 240 is formed on the substrate 245. This can be accomplished by thermal oxidation, chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), or other suitable methods. Then, in Figure 3A In step 304, a base layer 110 is formed on the dielectric layer 240. This can be performed by CVD, PVD or other suitable methods.

[0048] Or, in Figure 3A In step 306, ion implantation is performed to deposit oxygen ions within a relatively thick wafer. Then, in Figure 3A In step 308, annealing is performed to obtain dielectric layer 240, which separates the wafer into Figure 2 The substrate 245 and the base layer 110 are shown.

[0049] Next, in Figure 3A In step 310, such as Figure 4 As illustrated, a hard mask layer 248 is formed and patterned on the upper surface 112 of the substrate 110. The hard mask layer is typically a dielectric material. Then, in Figure 3AIn step 312, a first trench 120 and a second trench 130 are formed in the base layer 110. This is typically accomplished by etching.

[0050] Reference Figure 4 A waveguide region 150 exists between a first trench 120 and a second trench 130. The first trench 120 has a bottom 126, a first sidewall 122, and a second sidewall 124. The second trench 130 also has a bottom 136, a first sidewall 132, and a second sidewall 134. The first sidewalls 122 and 132 of the two trenches 120 and 130 are opposite to the waveguide region 150. The second sidewalls 124 and 134 of the two trenches 120 and 130 are located on each side of the waveguide region 150. An inclination angle A of the trench sidewalls relative to the bottom, measured within the waveguide region 150, is shown here. In some specific embodiments, the inclination angle A may range from about 70° to about 120°, although other ranges are also within the scope of this disclosure.

[0051] Continue, in Figure 3A In step 314, such as Figure 5 As illustrated, a first canopy 252 is provided above the second groove 130. The two sidewalls 122, 124 and the bottom of the first groove 120 are exposed. Then, in Figure 3A In step 316, a first dopant morphology 192 is implanted in the first trench 120 and the first side 152 of the waveguide region. This can be performed by ion implantation. Therefore, a first linking region 220 is formed on the first side of the waveguide region 150.

[0052] Implanting various ions into a silicon lattice alters the lattice conductivity at the implantation site, allowing the fabrication of different parts of an optical modulator. An ion implantation machine typically includes an ion source, a beam line, and a process chamber. The ion source generates the desired ions, which act as dopants to modify various properties of the substrate at the desired location. For example, dopants with a polarity different from the substrate are used to form positive and negative contacts. Common p-type dopants include boron, gallium, or indium. Common n-type dopants include phosphorus or arsenic. The generated ion beam enters the beam line, which organizes the ions into a bundle with high purity in terms of ion mass, energy, and species. This ion beam is then used to irradiate the substrate in the process chamber.

[0053] In some embodiments, the implantation dose of the first dopant type is from about 1 x 10⁻⁶. 13 Up to approximately 3x10 15 cm -2 Furthermore, the first dopant type may be implanted with an energy of about 20 keV to about 80 keV. The first dopant type may be implanted at an implantation angle θ1 of 0° to about 45° relative to the vertical direction. Other ranges of each of these settings are within the scope of this disclosure.

[0054] In some specific embodiments, the first dopant morphology is implanted through two separate implantation steps. In the first implantation step, the dopant morphology is implanted at approximately 1 x 102 14 Up to approximately 6x10 14 cm -2 Implantation is performed at a dose of approximately 40 keV to approximately 80 keV. In the second implantation step, the dopant morphology is implanted at approximately 5 x 10⁻⁶ kilometres per cubic centimeter. 13 Up to approximately 5x10 14 cm -2 The dosage and energy of approximately 20 keV to approximately 60 keV are used for implantation.

[0055] Then, remove the first veil 252. Continue, in Figure 3A In step 318, such as Figure 6 As illustrated, a second canopy 254 is provided above the first trench 120. The two sidewalls 132, 134 and the bottom of the second trench are exposed. Then, in Figure 3A In step 320, a second doped state 202 is implanted between the second trench 130 and the second side 154 of the waveguide region. This can also be performed by ion implantation. Therefore, a second linking region 230 is formed on the second side of the waveguide region 150.

[0056] In some embodiments, the implantation dose of the second dopant type is from about 1 x 10⁻⁶. 14 Up to approximately 3x10 15 cm -2 Furthermore, the second dopant morphology may be implanted with an energy of approximately 10 keV to approximately 30 keV. The second dopant morphology may be implanted at an implantation angle θ2 of 0° to approximately 45° relative to the vertical direction. Other ranges for each of these settings are within the scope of this disclosure.

[0057] The first and second dopant types are distinct. If the first dopant type is n-type, then the second dopant type is p-type, and vice versa. As illustrated here, the first dopant type is n-type, and the second dopant type is p-type. In this respect, the implantation depths of both dopant types are designed to be the same. However, their energy levels will depend on their size and atomic weight, and therefore may differ.

[0058] Then, remove the second veil 254. Continue, in Figure 3A In step 322, such as Figure 7 As illustrated, a third veil 256 is provided above the first trench 120. The second sidewall of the second trench (also referred to as the second linking area 230) is also covered by the veil. The bottom 136 of the second trench and the first sidewall 132 remain exposed. Then, in Figure 3AIn step 324, the concentration of the second dopant morphology in the second trench is increased to form the second pickup channel 200. This can also be performed via ion implantation. In some specific embodiments, the dopant concentration in the second pickup channel may be approximately 2 to 10 times higher than the dopant concentration in the second link region 230.

[0059] In some embodiments, the implantation dose of the second dopant type is from about 1 x 10⁻⁶. 14 Up to approximately 3x10 15 cm -2 Furthermore, the second dopant morphology may be implanted with an energy of approximately 10 keV to approximately 30 keV. The second dopant morphology may be implanted at an implantation angle θ3 of 0° to approximately 30° relative to the vertical direction. Other ranges for each of these settings are within the scope of this disclosure.

[0060] Then remove the third veil, 256. Continue... Figure 3A In step 326, such as Figure 8 As illustrated, a fourth veil 258 is provided above the second trench 130. The second sidewall of the first trench 120 (also referred to as the first linking area 220) is also covered by the veil. The bottom 126 of the first trench 120 and the first sidewall 122 remain exposed. Then, in Figure 3A In step 328, the concentration of the first dopant morphology in the first trench 120 is increased to form the first pickup channel 190. This can also be performed via ion implantation. In some specific embodiments, the dopant concentration in the first pickup channel may be approximately 2 to 10 times higher than the dopant concentration in the first link region 220.

[0061] In some embodiments, the implantation dose of the first dopant type is from about 1 x 10⁻⁶. 14 Up to approximately 3x10 15 cm -2 Furthermore, the first dopant type may be implanted with an energy of about 10 keV to about 30 keV. The first dopant type may be implanted at an implantation angle θ4 of 0° to about 30° relative to the vertical direction. Other ranges of each of these settings are within the scope of this disclosure.

[0062] It is worth noting that steps 314-328, which form the first pickup channel 190 and the second pickup channel 200, can be executed in any order. This is in Figure 3A The steps of forming a veil around each pair and performing ion implantation are represented by using boxes.

[0063] Next, in Figure 3A In step 330, such as Figure 9As illustrated, the first trench 120 and the second trench 130 are filled with a dielectric material. These trenches 120, 130 can be filled by deposition, such as chemical vapor deposition (CVD), physical vapor deposition (PVD), or other suitable materials. Then, in Figure 3B In step 332, the hard mask layer 248 is removed. This can be accomplished using a chemical mechanical polishing (CMP) process. It is worth noting that these two steps can be performed in any order. However, it may be more preferable to fill the trenches 120, 130 first, and then perform the CMP step, as this ensures planar surfaces in the trenches 120, 130 without requiring a second CMP step in the event of excessive dielectric material deposition.

[0064] Next, in Figure 3B In step 334, such as Figure 10 As illustrated, a fifth mask 260 is provided to cover the first trench 120 and the second trench 130, exposing the waveguide region 150. An opening above the waveguide region 150 has a width 261, which is greater than the width 157 of the waveguide region 150. The width 261 provides a margin of 0 nanometers to approximately 2000 nanometers relative to the waveguide region, allowing subsequent ion implantation steps to be performed so that the resulting deposit is aligned within the waveguide region 150. The first trench 120 has a width 125, and the margins on both sides between the width 261 of the opening and the width 157 of the waveguide region are indicated by reference numeral 127. Typically, the width 125 is greater than the margin 127.

[0065] Continue, in Figure 3B In step 336, such as Figure 10 As illustrated, a first dopant type is applied to a first region 271 within waveguide region 150. This can be performed using ion implantation through an opening in the fifth mask 260. In a particular embodiment, the implantation dose of the first dopant type ranges from approximately 5 x 10⁻⁶. 13 Up to approximately 5x10 14 cm -2 Furthermore, the first dopant form may be implanted with an energy of approximately 100 keV to approximately 200 keV. The implantation angle θ5 of this implantation step is typically 0° relative to the vertical direction. Other ranges for each of these settings are within the scope of this disclosure.

[0066] Then, in Figure 3B In step 338, such as Figure 11 The illustration shows that a second doping mode is applied to a second region 272 within waveguide region 150. This can be performed using ion implantation through an opening in the fifth mask 260. In a particular embodiment, the implantation dose of the second doping mode ranges from approximately 5 x 10⁻⁶. 13 Up to approximately 5x1014 cm -2 Furthermore, the second dopant form may be implanted with an energy of approximately 20 keV to approximately 60 keV. The implantation angle θ5 of this implantation step is typically 0° relative to the vertical direction. Other ranges for each of these settings are within the scope of this disclosure. The second region 272 is located above the first region 271.

[0067] Next, in Figure 3B In step 340, such as Figure 12 As illustrated, a third region 273 in the waveguide region is doped with a first dopant type. This can be performed using ion implantation through an opening in the fifth mask 260. In a particular embodiment, the implantation dose of the first dopant type is from approximately 5 x 10⁻⁶. 13 Up to approximately 5x10 14 cm -2 Furthermore, the first dopant form may be implanted with an energy of approximately 20 keV to approximately 50 keV. The implantation angle θ5 of this implantation step is typically 0° relative to the vertical direction. Other ranges for each of these settings are within the scope of this disclosure. The third region 273 is located above the second region 272.

[0068] Finally, Figure 3B In step 342, such as Figure 13 As illustrated, a second doping mode is applied to a fourth region 274 within the waveguide region. This can be performed using ion implantation through an opening in the fifth mask 260. In a particular embodiment, the implantation dose of the second doping mode ranges from approximately 5 x 10⁻⁶. 13 Up to approximately 5x10 14 cm -2 Furthermore, the second dopant morphology may be implanted with an energy greater than 0 keV to about 30 keV. The implantation angle θ5 of this implantation step is typically 0° relative to the vertical direction. Other ranges for each of these settings are within the scope of this disclosure. The fourth region 274 is located above the third region 273. Typically, the implantation energy gradually decreases from the first region 271 to the fourth region 274.

[0069] Typically, multiple first-doped regions and multiple second-doped regions are formed in waveguide region 150. These regions are arranged alternately in the vertical direction. These doped regions will become... Figure 1BThe waveguide region 150 contains interdigitated finger structures 160 and 170. In other words, the first region 271 and the third region 273 are doped with one type of dopant (p-type or n-type), while the second region 272 and the fourth region 274 are doped with another type of dopant (n-type or p-type, respectively). The number of interdigitated finger structures is not limited to four and may vary depending on the thickness or height 155 of the waveguide region 150. In some specific embodiments, the number of first doped regions and the number of second doped regions can each range from two to five. It should be noted that typically the number of first doped regions differs from the number of second doped regions by at most one.

[0070] To further explain, the dopant concentration in the first linking region 220 and the second linking region 230 is higher than the dopant concentration in the four regions 271, 272, 273, and 274. For example, the portion of the second region (containing the second dopant type) that overlaps with the first linking region (containing the first dopant type) is reverse-doped, while the first linking region retains its first dopant type. Similarly, the dopant concentration in the first pickup channel 190 and the second pickup channel 200 is higher than the dopant concentration in the four regions 271, 272, 273, and 274.

[0071] After removing the fifth veil 260, as Figure 3B As shown in step 344, and as Figure 14 The diagram illustrates thermal annealing of waveguide region 150. In some embodiments, thermal annealing is performed at a temperature of approximately 900°C to approximately 1100°C. Thermal annealing can last from approximately 10 seconds to approximately 100 minutes. Other temperature and time ranges are also within the scope of this disclosure. As a result, a PN junction diode 180 is formed by interleaved negatively doped finger structures 160 and positively doped finger structures 170.

[0072] Continue, as Figure 3B As shown in step 346, and as Figure 15 As illustrated, a sixth mask 262 is provided to cover the second pickup channel 200 and the waveguide region 150, and to expose the first sidewall 122 of the first trench 120. Then, in Figure 3B In step 348, ion implantation of a first doped type is performed on the upper surface 112 of the substrate to form a first ohmic contact 210 to a first pickup channel 190.

[0073] In some embodiments, the implantation dose of the first dopant type is approximately 1 x 10⁻⁶. 14 Up to approximately 3x10 15 cm -2Furthermore, the first dopant morphology may be implanted at an energy of approximately 5 keV to approximately 30 keV. The first dopant morphology may be implanted at an implantation angle θ6 of 0° to approximately 30° relative to the vertical direction. Other ranges for each of these settings are within the scope of this disclosure.

[0074] After removing the sixth veil 262, as Figure 3B As shown in step 350, and as Figure 16 As illustrated, a seventh mask 264 is provided to cover the first pickup channel 190 and the waveguide region 150, and to expose the first sidewall 132 of the second trench 130. Then, in Figure 3B In step 352, ion implantation of a second dopant type is performed on the upper surface of the substrate to form a second ohmic contact 212 to a second pickup channel 200.

[0075] In some embodiments, the implantation dose of the second dopant type is approximately 1 x 10⁻⁶. 14 Up to approximately 3x10 15 cm -2 Furthermore, the second dopant morphology may be implanted at an energy of approximately 5 keV to approximately 30 keV. The second dopant morphology may be implanted at an implantation angle θ7 of 0° to approximately 30° relative to the vertical direction. Other ranges for each of these settings are within the scope of this disclosure.

[0076] It is worth noting that the formation of the first ohmic contact 210 and the second ohmic contact 212 can occur in any order. This is in Figure 3B The steps of forming the mask and performing ion implantation are represented by boxes around each pair. Furthermore, it is also considered that the two ohmic contacts 210, 212 can be formed after the removal of the third mask layer and before doping the waveguide region 150. This is represented by arrows from step 332 to steps 346-352, and then back to step 334. The thermal annealing step 344 is the final step in forming the optical modulator.

[0077] Therefore, there exists a conductive path from the first ohmic contact 210 through the first pickup channel 190 to the first link region 220 and the finger structure 160 electrically connected to the first link region 220. Simultaneously, there also exists a second conductive path from the second ohmic contact 212 through the second pickup channel 200 to the second link region 230 and the finger structure 170 electrically connected to the second link region 230. The resulting optical modulator 100 is as follows: Figure 1A As shown. Further processing steps or operations may be performed to construct the final semiconductor device.

[0078] For clarity, it should be noted that the first ohmic contact and the first pickup channel can be negatively doped and connected to a negatively doped finger structure, while the second ohmic contact and the second pickup channel can be positively doped and connected to a positively doped finger structure. Alternatively, the first ohmic contact and the first pickup channel can be positively doped and connected to a positively doped finger structure, while the second ohmic contact and the second pickup channel can be negatively doped and connected to a negatively doped finger structure.

[0079] The structures and methods discussed above in this disclosure relate to multilayer dielectric layers. These dielectric layers can typically be made of any suitable dielectric material or combination thereof, although the properties of any particular layer may be further defined. Examples of dielectric materials may include silicon dioxide (SiO2), silicon nitride (Si3N4), silicon carbide (SiC), hafnium dioxide (HfO2), zirconium dioxide (ZrO2), aluminum oxide (Al2O3), and silicon oxynitride (SiO2). x N y ), hafnium oxynitride (HfO) x N y ) or zirconium oxynitride (ZrO) x N y ), or hafnium silicate (HfSi) x O y or zirconium silicate (ZrSi) x O y ) or silicon dioxide (SiC) x O y N z Alternatively, it could be hexagonal boron nitride (hBN). Other dielectric materials may include tantalum oxide (Ta2O5), nitrides such as silicon nitride, polycrystalline silicon, phosphosilicate glass (PSG), fluorosilicate glass (FSG), undoped silicate glass (USG), high-stress undoped silicate glass (HSUSG), and borosilicate glass (BSG). The dielectric layer can be formed by any suitable method, including chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), thermal oxidation, or other suitable methods.

[0080] It should also be noted that some routine steps were not explicitly described in the above discussion. For example, forming a pattern / structure in a given layer may include the following steps: coating a photomask layer, patterning the photomask layer, developing the photomask layer to form a mask, and then etching through the mask to transfer the pattern onto the given layer.

[0081] Typically, photomask layers can be coated using methods such as spin coating, spray coating, roller coating, dip coating, or extrusion coating. In spin coating, the substrate is typically placed on a rotating platform, which may include a vacuum holder for holding the substrate in place. The photomask composition is then coated onto the center of the substrate. Next, the speed of the rotating platform is increased to allow the photomask to spread uniformly from the center of the substrate to its periphery. The rotational speed of the platform is then fixed, which controls the final thickness of the photomask layer.

[0082] Next, the photomask composition is baked or cured to remove the solvent and harden the photomask layer. In some specific embodiments, baking is performed at a temperature of about 90°C to about 110°C. Baking can be performed using a hot plate or oven, or similar equipment. Thus, the photomask layer is formed on the substrate.

[0083] The photomask layer is then patterned by exposure to radiation. The radiation can be any wavelength of light carrying the desired mask pattern. In a particular embodiment, extreme ultraviolet (EUV) light with a wavelength of approximately 13.5 nanometers is used for patterning because this allows for smaller feature sizes. This results in some portions of the photomask layer being exposed to radiation, while other portions remain unexposed. This exposure causes some portions of the photomask to become soluble in the developer, while other portions remain insoluble.

[0084] After exposure to radiation, an additional photomask baking step (post-exposure bake, or PEB) can be performed. For example, this can help release acid leaving groups (ALGs) or other molecules that play an important role in chemically amplified photomasks.

[0085] The photomask layer is then developed using a developer. The developer can be an aqueous solution or an organic solvent. During the development step, the soluble portions of the photomask layer are dissolved and washed away, leaving the photomask pattern (i.e., the mask). A common example of a developer is tetramethylammonium hydroxide (TMAH). Generally, any suitable developer can be used. Sometimes, post-development baking or "hard baking" is performed after development to stabilize the photomask pattern for optimal performance in subsequent steps.

[0086] Next, a portion of the given layer beneath the photomask pattern is exposed. Etching transfers the photomask pattern to the given layer beneath it. Afterward, the mask can be removed, for example, at elevated temperatures using various solvents such as N-methyl-pyrrolidone (NMP) or alkaline media or other stripping agents, or by dry etching using oxygen plasma.

[0087] Generally, any etching step described herein can be performed using wet etching, dry etching, or plasma etching processes, such as reactive ion etching (RIE) or inductively coupled plasma (ICP), or a combination thereof, as appropriate. Etching can be anisotropic. Depending on the material, etching agents may include carbon tetrafluoride (CF4), hexafluoroethane (C2F6), octafluoropropane (C3F8), fluoroform (CHF3), difluoromethane (CH2F2), fluoromethane (CH3F), fluorides, nitrogen (N2), hydrogen (H2), oxygen (O2), argon (Ar), xenon (Xe), xenon difluoride (XeF2), helium (He), carbon monoxide (CO), carbon dioxide (CO2), fluorine (F2), chlorine (Cl2), hydrogen bromide (HBr), hydrofluoric acid (HF), nitrogen trifluoride (NF3), and sulfur hexafluoride. Silicon dioxide can be etched using hydrofluoric acid and ammonium fluoride, or in various proportions, such as hexafluoride (SF6), boron trichloride (BCl3), ammonia (NH3), and bromine (Br2). For example, silicon dioxide can be wet-etched using hydrofluoric acid and ammonium fluoride. Alternatively, silicon dioxide can be dry-etched using various mixtures of CHF3, O2, CF4, and / or H2.

[0088] In some embodiments, the optical modulator 100 is a microring modulator (MRM). Figure 17 This is a plan view of one embodiment of a micro-ring modulator, in which the optical modulator 100 appears circular when viewed from above. Section AA indicates the area corresponding to... Figure 1A or Figure 2 A cross-sectional view. Here, the first ohmic contact 210, the first trench 120 filled with dielectric material 140, the waveguide region 150, the second trench 130 filled with dielectric material 140, and the second ohmic contact 212, which have concentric ring or circular shapes, can be seen.

[0089] An optical signal can be modulated by applying a bias voltage 370 between the two ohmic contacts 210 and 212. A linear waveguide 380 is optically coupled to the optical modulator 100 but physically separated from it by a dielectric layer. The linear waveguide 380 serves as an input 382, ​​allowing the optical signal to enter the waveguide region 150 of the optical modulator; it also serves as an output 384, receiving the modulated optical signal from the waveguide region of the optical modulator and transmitting the modulated optical signal downstream for further processing. The linear waveguide 380 is surrounded by two dielectric regions 381 and 398.

[0090] Figure 18 This is a plan view of another embodiment of a microring modulator (MRM), in which the optical modulator 100 is shaped like a racetrack when viewed from above. The racetrack shape includes two parallel segments that are joined together at their ends by semicircular segments. Section BB indicates the section corresponding to... Figure 1A or Figure 2 A cross-sectional view. The first ohmic contact 210, the first trench 120 filled with dielectric material 140, the waveguide region 150, the second trench 130 filled with dielectric material 140, and the second ohmic contact 212 are all racetrack-shaped. The dielectric region 386 is surrounded by the second ohmic contact 212. The input 382 and the output 384 are also coupled to the waveguide region 150. Alternatively, the dielectric region 386 is not present, and the second ohmic contact 212 fills the space shown in this figure.

[0091] In some embodiments, the optical modulator 100 is a Mach-Zehnder interferometer modulator (MZM). Figure 19 This is a plan view of one embodiment of a Mach-Zehnder interferometer modulator. In the Mach-Zehnder interferometer modulator, the incident optical signal from input 382 is split into two paths 390 and 392. Each path includes a first ohmic contact 210, a first trench 120 filled with dielectric material 140, a waveguide region 150, a second trench 130 filled with dielectric material 140, and a second ohmic contact 212. Sections CC and DD each represent the corresponding... Figure 1A or Figure 2 A cross-sectional view. Each path can be phase-shifted, and then these paths are recombined. Constructive or destructive interference between the two paths 390 and 392 allows the modulated optical signal to be transmitted through output 384.

[0092] Wavelength division multiplexing (WDM) can be used to transmit multiple optical signals (each with a different wavelength) through a single waveguide to increase signal density. These optical signals can be generated by lasers of different wavelengths. Each optical signal can be amplitude modulated using its own optical modulator. Figure 20 This is a planar diagram of an example of this system 396. In this example, the system input 382 carries three different optical signals (i.e., three different wavelengths). Therefore, a linear waveguide 380 is coupled to three optical modulators 100. Each optical modulator selectively modulates the amplitude of one wavelength.

[0093] Figure 21 This is a flowchart illustrating a method 400 using an optical modulator according to some embodiments. The method steps will be discussed below with respect to a single optical modulator, and should be broadly understood to also apply to multiple optical modulators.

[0094] exist Figure 21 In step 402, and referring to Figure 17 The input optical signal 382 is transmitted through the waveguide region 150 of the optical modulator 100. For example... Figure 1B As shown, waveguide region 150 includes a PN junction diode 180 with multiple vertically alternating negatively and positively doped interdigitated structures 160, 170. The input optical signal can be, for example, a laser beam or other light source. The optical signal is coupled to waveguide region 150 through its wavelength. If the wavelength of the optical signal is at the resonant wavelength, the signal will be strongly coupled to the optical modulator. Otherwise, the input optical signal will continue to propagate along the linear waveguide 380. Figure 21 In step 404, a bias voltage is applied to the PN junction diode to change the amplitude of the output optical signal 384. The applied bias voltage will depend on the desired amplitude change. For example, the amplitude can be changed to create an output signal carrying information, maintain a constant output (e.g., if the input signal fluctuates), or generate a pulse signal.

[0095] The structure disclosed herein offers several advantages. The PN diode junction formed by the interdigitated structure provides a large surface area within a limited space, resulting in very high modulation efficiency. The fabrication process is self-aligned, and the implantation boundary is designed to be larger than the waveguide region, avoiding variations due to mask alignment or critical dimensions. The junction profile is also established through thermal diffusion and implantation energy / dose, rather than using a mask. This improves consistency and component yield.

[0096] Therefore, some embodiments disclosed herein relate to a method for fabricating an optical modulator. A hard mask layer is formed on the upper surface of a substrate. A first trench and a second trench are formed in the substrate to define a waveguide region between the first trench and the second trench. A first dopant type is implanted on a first side of the first trench and the waveguide region. A second dopant type is implanted on a second side of the second trench and the waveguide region. The concentration of the first dopant type in the first trench is increased to form a first pickup channel. The concentration of the second dopant type in the second trench is increased to form a second pickup channel. The first trench and the second trench are filled with a dielectric material, and the hard mask layer is removed. A plurality of vertically alternating negatively doped and positively doped regions are formed in the waveguide region. The waveguide region is annealed to form a PN junction diode with a plurality of interdigitated structures of negative and positive doping. A first ohmic contact is formed on the upper surface of the substrate to the first pickup channel. A second ohmic contact is formed on the upper surface of the substrate to the second pickup channel to obtain an optical modulator. In some embodiments, the first trench and the second trench have sidewalls with an inclination angle of about 70° to about 120°. In some embodiments, the implantation of the first dopant and the second dopant is performed at an angle of about 0° to about 45°. In some embodiments, the concentration of the first dopant in the first pickup channel and the concentration of the second dopant in the second pickup channel are higher than the doping concentration of the plurality of interdigitated structures. In some embodiments, the first doping concentration in the first side of the waveguide region and the second doping concentration in the second side of the waveguide region are higher than the doping concentration of the plurality of interdigitated structures. In some embodiments, the waveguide region has a height of about 160 nm to about 300 nm. In some embodiments, the waveguide region has a width of about 200 nm to about 500 nm. In some embodiments, the annealing is performed at a temperature of about 900°C to about 1100°C, and the annealing time is about 10 seconds to about 100 minutes. In some embodiments, the plurality of vertically alternating negative and positive doped regions in the waveguide region include: a first region having the first dopant type, a second region having the second dopant type, a third region having the first dopant type, and a fourth region having the second dopant type, wherein the second region is located above the first region, the third region is located above the second region, and the fourth region is located above the third region. In some embodiments, the optical modulator is a microring modulator or a Mach-Zehnder modulator. In some embodiments, the first dopant type is n-type doping, and the second dopant type is p-type doping. In some embodiments, the optical modulator further includes a dielectric layer located beneath the substrate and a substrate located beneath the dielectric layer.

[0097] Other embodiments of this disclosure relate to an optical modulator. The optical modulator includes a waveguide region comprising a PN junction diode having a plurality of interdigitated fingers with vertically alternating negative and positive doping. A negatively doped pickup channel is electrically connected to a first ohmic contact to a negatively doped finger. A positively doped pickup channel is electrically connected to a second ohmic contact to a positively doped finger. In some embodiments, the optical modulator has a circular or racetrack shape when viewed from above. In some embodiments, the doping concentration of the negatively doped pickup channel is about 2 to about 10 times higher than the doping concentration of the negatively doped finger, or the doping concentration of the positively doped pickup channel is about 2 to about 10 times higher than the doping concentration of the positively doped finger. In some embodiments, the optical modulator further includes a first dielectric trench located between the waveguide region and the first ohmic contact, and a second dielectric trench located between the waveguide region and the second ohmic contact. In some embodiments, the optical modulator further includes an input and an output coupled to the waveguide region. In some embodiments, the waveguide region is formed in a substrate, and the optical modulator further includes a dielectric layer located beneath the substrate and a substrate located beneath the dielectric layer.

[0098] Various embodiments disclosed herein also describe methods of using the optical modulator. An input optical signal is transmitted through a waveguide region of the optical modulator. The waveguide region includes a plurality of PN junction diodes with vertically alternating negative and positive doping structures. A bias voltage is applied to the PN junction diodes to change the amplitude of the output optical signal. In some embodiments, the input optical signal includes multiple wavelengths, and only the amplitude of a single wavelength is altered by the optical modulator.

[0099] This disclosure also relates to a system in various embodiments that includes an input, an output, and at least one optical modulator connected to the input and the output.

[0100] The foregoing summary of the features of several embodiments enables those skilled in the art to better understand various aspects of this disclosure. Those skilled in the art will understand that this disclosure can be readily used as a basis for designing or modifying other processes and structures for achieving the same purposes and / or obtaining the same advantages as the embodiments described herein. Those skilled in the art will also recognize that such equivalent constructions do not depart from the spirit and scope of this disclosure, and that various changes, substitutions, and modifications can be made herein without departing from the spirit and scope of this disclosure.

Claims

1. An optical modulator, comprising: The waveguide region contains a PN junction diode with multiple interdigitated structures of vertically alternating negative and positive doping; A negatively doped pickup channel is electrically connected to the first ohmic contact and the negatively doped finger structure. as well as A positively doped pickup channel is electrically connected to a second ohmic contact to the positively doped finger structure.

2. The optical modulator of claim 1, wherein The optical modulator has a circular or racetrack shape when viewed from above.

3. The optical modulator of claim 1, wherein The doping concentration of the negative doped pickup channel is 2 to 10 times higher than that of the negative doped finger structure, or the doping concentration of the positive doped pickup channel is 2 to 10 times higher than that of the positive doped finger structure.

4. The optical modulator of claim 1, wherein It further includes a first dielectric trench located between the waveguide region and the first ohmic contact, and a second dielectric trench located between the waveguide region and the second ohmic contact.

5. The optical modulator of claim 1, wherein It also includes the inputs and outputs coupled to the waveguide region.

6. The optical modulator of claim 1, wherein The waveguide region is formed in the substrate, and the optical modulator further includes a dielectric layer located below the substrate and a substrate located below the dielectric layer.

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