Low dropout linear regulator with overcurrent protection function and electronic device

Abstract

This application discloses a low-dropout linear regulator and electronic device with overcurrent protection. The low-dropout linear regulator includes: an output power transistor, a load, a load capacitor, a current sampling circuit, a voltage divider feedback circuit, a current foldback protection circuit, and a control circuit. The first input terminal of the control circuit is connected to the current sampling circuit, the second input terminal of the control circuit is connected to the voltage divider feedback circuit, and the output terminal of the control circuit is connected to the third terminal of the output power transistor. The control circuit receives a reference voltage, a first voltage, and a second voltage. When the first voltage is greater than or equal to the second voltage, it limits the output current of the output power transistor based on the first voltage. This method allows the low-dropout linear regulator to use a single control loop, simplifying the control and compensation of the entire loop and reducing the difficulty of design and debugging.

Description

Technical Field

[0001] This application relates to the field of low-dropout linear regulator technology, and in particular to a low-dropout linear regulator and electronic device with overcurrent protection function. Background Technology

[0002] Overcurrent protection is crucial in the use of low dropout regulators (LDOs). Overcurrent protection effectively prevents damage to the device from excessive load current and also better limits the LDO's output current, thereby protecting the entire circuit system and ensuring stable operation.

[0003] Currently, common LDO structures with overcurrent protection primarily acquire the output current of the power transistor through a current sampling circuit. This output current is then fed into a current comparator circuit to generate an overcurrent signal, which is subsequently sent to a current limiting circuit to restrict the output current of the power transistor, thus achieving overcurrent protection. Furthermore, LDO structures with overcurrent protection also monitor the output voltage of the power transistor through a voltage comparator circuit. When the output voltage drops to a preset threshold, the voltage comparator circuit outputs a valid signal, and the current comparator circuit modifies the current comparison threshold to further control the current limiting circuit, achieving overcurrent protection functions such as current foldback protection and stepped foldback protection. However, LDO structures with overcurrent protection involve multiple control loops, making circuit implementation and loop control complex, increasing the difficulty of design and debugging. Utility Model Content

[0004] This application mainly provides a low-dropout linear regulator and electronic device with overcurrent protection function, which solves the problem that the LDO structure with overcurrent protection function has multiple control loops, and the loop control and compensation are relatively complex, which increases the difficulty of design and debugging.

[0005] This application provides a low-dropout linear regulator with overcurrent protection, comprising:

[0006] An output power transistor, the first terminal of which receives the input voltage;

[0007] The load has one end connected to the second end of the output power transistor, and the other end grounded.

[0008] A load capacitor, one end of which is connected to the second terminal of the output power transistor, and the other end of which is grounded;

[0009] A current sampling circuit is connected to the output power transistor and is used to sample the output current of the output power transistor and convert the output current to output a first voltage.

[0010] A voltage divider feedback circuit is connected to the second terminal of the output power transistor. It is used to receive the output voltage of the output power transistor, divide the output voltage, and output a second voltage.

[0011] A current foldback protection circuit is connected to the voltage divider feedback circuit and the current sampling circuit, respectively.

[0012] The control circuit has a first input terminal connected to the current sampling circuit, a second input terminal connected to the voltage divider feedback circuit, and an output terminal connected to the third terminal of the output power transistor. The control circuit is used to receive a reference voltage, a first voltage, and a second voltage. When the first voltage is greater than or equal to the second voltage, the control circuit limits the output current of the output power transistor based on the first voltage.

[0013] When the low-dropout linear regulator is in normal operating condition, the second voltage is equal to the reference voltage, and the first voltage is less than the second voltage. The reference voltage is divided by the voltage division ratio of the voltage divider feedback circuit to obtain the set output voltage of the output power transistor. The control circuit controls the output voltage of the low-dropout linear regulator to be the set output voltage based on the second voltage.

[0014] Wherein, when the output current is equal to the first overcurrent protection threshold, the first voltage is equal to the reference voltage, the first voltage is equal to the second voltage, and the control circuit controls the output current of the output power transistor to the first overcurrent protection threshold based on the first voltage.

[0015] Wherein, as the load demand current increases, the output voltage of the output power transistor decreases. When the second voltage is less than the reference voltage, the first voltage is greater than the second voltage. When the first voltage is equal to the reference voltage, the control circuit controls the output current of the output power transistor to the first overcurrent protection threshold based on the first voltage.

[0016] Specifically, when the output voltage is equal to the current foldback protection threshold, the current foldback protection circuit outputs the current foldback protection valid signal to the current sampling circuit. The current sampling circuit outputs the first voltage based on the current foldback protection valid signal and the output current of the output power transistor. The control circuit controls the output current of the output power transistor to be the second overcurrent protection threshold based on the first voltage. The second overcurrent protection threshold is less than the first overcurrent protection threshold.

[0017] The control circuit includes an operational amplifier and a voltage buffer circuit. The first input terminal of the operational amplifier is connected to the current sampling circuit, the second input terminal of the operational amplifier is connected to the voltage divider feedback circuit, the third input terminal of the operational amplifier receives the reference voltage, and the voltage buffer circuit is connected to the output terminal of the operational amplifier and the third terminal of the output power transistor, respectively.

[0018] The control circuit includes a selection control circuit, an operational amplifier, and a voltage buffer circuit. The selection control circuit is connected to the first input terminal of the operational amplifier, the current sampling circuit, and the voltage divider feedback circuit, respectively. The second input terminal of the operational amplifier receives the reference voltage. The voltage buffer circuit is connected to the output terminal of the operational amplifier and the third terminal of the output power transistor, respectively.

[0019] The current sampling circuit includes a first switching transistor, a second switching transistor, a third switching transistor, a fourth switching transistor, a fifth switching transistor, a first resistor, a second resistor, a third resistor, and a fourth resistor. The first terminal of the first switching transistor is connected to the first terminal of the output power transistor, the second terminal of the first switching transistor is connected to the first terminal of the third switching transistor, the third terminal of the first switching transistor is connected to the voltage buffer circuit, and the second terminal of the third switching transistor is connected to one end of the second resistor, with the other end of the second resistor grounded. The first terminal of the second switching transistor is connected to the second terminal of the output power transistor, and the second terminal of the second switching transistor is connected to one end of the first resistor. The other end of the first resistor is grounded; the third end of the second switch is connected to the third end of the third switch; the second end of the second switch is connected to the third end; the first end of the fifth switch is connected to the other end of the first resistor; the second end of the fifth switch is connected between one end of the first resistor and the second end of the second switch through the third resistor; the first end of the fourth switch is connected to the other end of the second resistor; the second end of the fourth switch is connected between one end of the second resistor and the second end of the third switch through the fourth resistor; the third end of the fourth switch is connected to the third end of the fifth switch.

[0020] The current foldback protection circuit includes a sixth switch, a first inverter, a second inverter, and a constant current source. The voltage divider feedback circuit includes a fifth resistor, a sixth resistor, and a seventh resistor. One end of the fifth resistor is connected between one end of the load capacitor and the second end of the output power transistor. The other end of the fifth resistor is connected to one end of the sixth resistor. The other end of the sixth resistor is connected to one end of the seventh resistor and the second input terminal of the control circuit. The other end of the seventh resistor is grounded. The first end of the sixth switch is connected between one end of the fifth resistor and the second end of the output power transistor. The second end of the sixth switch is grounded through the constant current source. The second end of the sixth switch is connected to the input terminal of the first inverter. The output terminal of the first inverter is connected to the input terminal of the second inverter. The output terminal of the second inverter is connected between the third end of the fifth switch and the third end of the fourth switch.

[0021] This application also provides an electronic device, including the low dropout linear regulator described above.

[0022] The beneficial effects of this application are as follows: This application connects the first input terminal of the control circuit to the current sampling circuit, the second input terminal of the control circuit to the voltage divider feedback circuit, and the output terminal of the control circuit to the third terminal of the output power transistor. The control circuit is used to receive the reference voltage, the first voltage, and the second voltage. When the first voltage is greater than or equal to the second voltage, the output current of the output power transistor is limited based on the first voltage. Overcurrent protection is achieved by directly connecting the current sampling circuit and the voltage divider feedback circuit to the control circuit. At this time, the overcurrent protection of the low dropout linear regulator and the overall loop control share a single loop, eliminating the need for an additional independent overcurrent protection loop and simplifying the control and implementation of the entire loop. Furthermore, by connecting the current foldback protection circuit to the voltage divider feedback circuit and the current sampling circuit respectively, the overcurrent protection of the low dropout linear regulator adds a current foldback protection function, thereby simplifying the circuit implementation and loop control and reducing the difficulty of design and debugging. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. Wherein:

[0024] Figure 1 This is a circuit diagram of an embodiment of the LDO structure with overcurrent protection provided in this application;

[0025] Figure 2This is a circuit diagram of an embodiment of the low-dropout linear regulator with overcurrent protection provided in this application;

[0026] Figure 3 This is an example diagram illustrating the operation of the low differential pressure linear voltage regulator overcurrent protection provided in this application;

[0027] Figure 4 This is a circuit diagram of another embodiment of the low-dropout linear regulator with overcurrent protection provided in this application;

[0028] Figure 5 yes Figure 2 and Figure 4 A circuit diagram of one embodiment of the medium current sampling circuit, current foldback protection circuit, voltage divider feedback circuit, output power transistor, load and load capacitor. Detailed Implementation

[0029] The embodiments of the technical solution of this application will now be described in detail with reference to the accompanying drawings. These embodiments are only used to more clearly illustrate the technical solution of this application and are therefore merely examples, and should not be used to limit the scope of protection of this application.

[0030] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the application; the terms “comprising” and “having”, and any variations thereof, in the specification, claims, and foregoing description of the drawings are intended to cover non-exclusive inclusion.

[0031] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly indicating the number, specific order, or primary and secondary relationship of the indicated technical features.

[0032] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0033] In the description of the embodiments in this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship.

[0034] In the description of the embodiments of this application, the term "multiple" refers to two or more (including two), similarly, "multiple sets" refers to two or more (including two sets), and "multiple pieces" refers to two or more (including two pieces).

[0035] In the description of the embodiments of this application, unless otherwise expressly specified and limited, the technical terms such as "installation," "connection," "joining," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a connection between two components or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. For those skilled in the art, the specific meaning of the above terms in the embodiments of this application can be understood according to the specific circumstances.

[0036] See Figure 1 As shown, Figure 1 This is a circuit diagram of an embodiment of the LDO structure with overcurrent protection provided in this application. The LDO structure 100 with overcurrent protection in this embodiment includes an output power transistor M0, a load RL, a load capacitor CL, a voltage divider feedback circuit 110, a current sampling circuit 120, a voltage comparison circuit 130, a current comparison circuit 140, a current limiting circuit 150, a voltage buffer circuit 160, and an operational amplifier 170.

[0037] like Figure 1 As shown, the LDO structure 100 with overcurrent protection mainly obtains the output current of the output power transistor M0 through the current sampling circuit 120, and then sends the output current to the current comparison circuit 140 to obtain an overcurrent signal. This overcurrent signal is further sent to the current limiting circuit 150 to limit the output current of the output power transistor M0, thus achieving overcurrent protection. In addition, the LDO structure 100 with overcurrent protection also monitors the output voltage of the output power transistor M0 through the voltage comparison circuit 130. When the output voltage drops to a preset threshold, the voltage comparison circuit 130 outputs a valid signal, the current comparison circuit 140 modifies the current comparison threshold, and further controls the current limiting circuit 150 to achieve overcurrent protection functions such as current foldback protection and step foldback protection.

[0038] The LDO structure 100 with overcurrent protection in this embodiment has multiple control loops, making the circuit implementation and loop control more complex and increasing the difficulty of design and debugging.

[0039] Please see Figure 2 As shown, Figure 2This is a circuit diagram of an embodiment of the low-dropout linear regulator with overcurrent protection provided in this application. The low-dropout linear regulator 1 with overcurrent protection in this embodiment includes an output power transistor M0, a load RL, a load capacitor CL, a current sampling circuit 10, a voltage divider feedback circuit 20, a current foldback protection circuit 30, and a control circuit 40.

[0040] In this circuit, the first terminal of the output power transistor M0 receives the input voltage Vin. The output power transistor M0 is typically used as a regulating element in the low dropout linear regulator 1, and the magnitude of the output voltage Vout or the output current Iout is adjusted by controlling the conduction level of the output power transistor M0.

[0041] Optionally, the first terminal of the output power transistor M0 is connected to a battery to receive the input voltage Vin. In other embodiments, the first terminal of the output power transistor M0 is connected to another power module to receive the input voltage Vin.

[0042] One end of the load RL is connected to the second terminal of the output power transistor M0, and the other end of the load RL is grounded. One end of the load capacitor CL is connected to the second terminal of the output power transistor M0, and the other end of the load capacitor CL is grounded.

[0043] In some embodiments, the second terminal of the output power transistor M0 is connected to one end of the load RL and one end of the load capacitor CL, respectively, to provide a stable output voltage Vout. The load capacitor CL is also called the output capacitor, and the load RL can be considered equivalent to a resistor, such as... Figure 2 As shown.

[0044] In some embodiments, in the low-dropout linear regulator 1, the output current Iout of the output power transistor M0 is equal to the output current Iout of the low-dropout linear regulator 1; the output current Iout of the low-dropout linear regulator 1 is equal to the output current Iout of the load RL plus the current flowing through the voltage divider feedback circuit 20. Since the current flowing through the voltage divider feedback circuit 20 is relatively small, the output current Iout of the low-dropout linear regulator 1 is generally approximately equal to the output current Iout of the load RL, that is, the output current Iout of the output power transistor M0 is approximately equal to the output current Iout of the load RL; the output voltage Vout of the output power transistor M0 is equal to the output voltage Vout of the low-dropout linear regulator 1.

[0045] The current sampling circuit 10 is connected to the output power transistor M0 to sample the output current Iout of the output power transistor M0, and converts the output current Iout to output the first voltage V. OCP_FB .

[0046] The current sampling circuit 10 includes, but is not limited to, current mirror sampling, resistor sampling, or operational amplifier sampling.

[0047] In some embodiments, when the current sampling circuit 10 samples through a current mirror, it obtains an equivalent current using the current mirror and converts the equivalent current into a corresponding voltage signal, namely a first voltage V. OCP_FB At this point, the conversion formula is: V OCP_FB =Iout*m*R OCP Where m is the sampling ratio for obtaining the output current Iout, and R OCP The sampled output current Iout is converted into a first voltage V. OCP_FB The equivalent resistance.

[0048] For example, the input terminal of the current sampling circuit 10 is connected to the third terminal of the output power transistor M0, such as... Figure 2 As shown. In other embodiments, the input terminal of the current sampling circuit 10 is connected to the first and / or second terminal of the output power transistor M0.

[0049] The voltage divider feedback circuit 20 is connected to the second terminal of the output power transistor M0. It receives the output voltage Vout of the output power transistor M0, divides the output voltage Vout, and outputs the second voltage V. FB .

[0050] In some embodiments, the voltage divider feedback circuit 20 includes at least one resistor, which uses the voltage dividing characteristics of the resistor to proportionally divide the output voltage Vout; at this time, the output second voltage V FB =Vout*n, where n is the voltage distribution ratio.

[0051] The current foldback protection circuit 30 is connected to both the voltage divider feedback circuit 20 and the current sampling circuit 10. The current foldback protection circuit 30 is used to acquire the output voltage Vout, and after detecting the output voltage Vout, it outputs a valid current foldback protection signal to the current sampling circuit 10 to realize the current foldback protection function.

[0052] The first input terminal of the control circuit 40 is connected to the current sampling circuit 10, the second input terminal of the control circuit 40 is connected to the voltage divider feedback circuit 20, and the output terminal of the control circuit 40 is connected to the third terminal of the output power transistor M0. The control circuit 40 is used to receive the reference voltage Vref and the first voltage V. OCP_FB Second voltage V FB At the first voltage V OCP_FB Greater than or equal to the second voltage V FB At that time, based on the first voltage V OCP_FB Limit the output current Iout of the output power transistor M0.

[0053] In some embodiments, the control circuit 40 receives a reference voltage Vref and a first voltage V OCP_FB Second voltage V FBThe control circuit 40 is controlled by the first voltage V. OCP_FB Second voltage V FB The higher voltage controls the output current Iout of the low-dropout linear regulator 1; due to the first voltage V OCP_FB It is obtained by converting the output current Iout. When the load increases, i.e., the output current Iout increases, the first voltage V... OCP_FB Increase, at the first voltage V OCP_FB Greater than or equal to the second voltage V FB At that time, the control circuit 40 is based on the first voltage V OCP_FB The output current Iout of the output power transistor M0 is limited to achieve overcurrent protection.

[0054] In this embodiment, the first input terminal of the control circuit 40 is connected to the current sampling circuit 10, the second input terminal of the control circuit 40 is connected to the voltage divider feedback circuit 20, and the output terminal of the control circuit 40 is connected to the third terminal of the output power transistor M0. The control circuit 40 is used to receive the reference voltage Vref and the first voltage V. OCP_FB Second voltage V FB At the first voltage V OCP_FB Greater than or equal to the second voltage V FB At that time, based on the first voltage V OCP_FB The output current Iout of the output power transistor M0 is limited; overcurrent protection is achieved by directly connecting the current sampling circuit 10 and the voltage divider feedback circuit 20 to the control circuit 40; at this time, the overcurrent protection of the low dropout linear regulator 1 and the overall loop control share a single loop, eliminating the need for an additional independent overcurrent protection loop, thus simplifying the control and implementation of the entire loop; and by connecting the current foldback protection circuit 30 to the voltage divider feedback circuit 20 and the current sampling circuit 10 respectively, the overcurrent protection of the low dropout linear regulator 1 adds a current foldback protection function, thereby simplifying the circuit implementation and loop control, and reducing the difficulty of design and debugging.

[0055] According to some embodiments of this application, when the low-dropout linear regulator 1 is in normal operating condition, the second voltage V FB Equal to the reference voltage Vref, the first voltage V OCP_FB Less than the second voltage V FB The set output voltage Vo of the output power transistor M0 is obtained by dividing the reference voltage Vref by the voltage division ratio n of the voltage divider feedback circuit 20. set The control circuit 40 is based on the second voltage V FB The output voltage Vout of the low dropout linear regulator 1 is controlled to be the set output voltage Vo. set .

[0056] In some embodiments, when the low-dropout linear regulator 1 is in normal operating condition, the second voltage VFB Equal to the reference voltage Vref, i.e., V FB =Vout*n=Vref, first voltage V OCP_FB Less than the second voltage V FB V OCP_FB <V FB At this time, the control circuit 40 uses the second voltage V FB The output voltage Vout of the low dropout linear regulator 1 is controlled to be the set output voltage Vo. set =Vref / n.

[0057] This embodiment achieves precise voltage divider feedback and control through the voltage divider feedback circuit 20 and the control circuit 40, ensuring that the output voltage Vout can be stably maintained at the set value, i.e., the set output voltage Vo. set This ensures that the load RL receives a stable power supply.

[0058] According to some embodiments of this application, see Figure 3 As shown, Figure 3 This is an example diagram illustrating the operation of the low-dropout linear voltage regulator overcurrent protection provided in this application. In this embodiment, the output current Iout equals the first overcurrent protection threshold I. OCP1 At that time, the first voltage V OCP_FB Equal to the reference voltage Vref, the first voltage V OCP_FB Equal to the second voltage V FB The control circuit 40 is based on the first voltage V OCP_FB The output current Iout of the control output power transistor M0 is set to the first overcurrent protection threshold I. OCP1 .

[0059] Among them, the first overcurrent protection threshold I OCP1 The first overcurrent protection threshold I is preset and stored in the current sampling circuit 10. OCP1 The reference voltage Vref is divided by the sampled output current Iout to convert it into the first voltage V. OCP_FB The equivalent resistance R OCP The product of the sampling ratio m for obtaining the output current Iout, i.e., I OCP1 =Vref / (R OCP *m)=V OCP_FB / (R OCP *m).

[0060] Due to the first voltage V OCP_FB It is obtained by converting the output current Iout, according to the above conversion formula V. OCP_FB =Iout*m*R OCP It can be seen that when the load RL demands an increase in current, that is, when the output current Iout increases, the first voltage V... OCP_FBRise; when the output current Iout reaches the preset first overcurrent protection threshold I OCP1 When the output current Iout equals the first overcurrent protection threshold I... OCP1 First voltage V OCP_FB Equal to the reference voltage Vref, the first voltage V OCP_FB Equal to the second voltage V FB First voltage V OCP_FB The control circuit 40 controls the output current Iout of the low-dropout linear regulator 1 via the first voltage V. OCP_FB The output current Iout of the control output power transistor M0 is set to the first overcurrent protection threshold I. OCP1 To prevent the output current Iout of the low-dropout linear regulator 1 from increasing further, such as... Figure 3 As shown.

[0061] In this embodiment, the control circuit 40 can reach the first overcurrent protection threshold I when the output current Iout reaches the first overcurrent protection threshold I. OCP1 When the output current Iout is stabilized at this threshold, the low dropout linear regulator 1 can still operate stably under overcurrent conditions, avoiding excessive current from damaging the output power transistor M0 and subsequent equipment.

[0062] According to some embodiments of this application, after the overcurrent protection is triggered, the load RL's current demand increases, and the output voltage Vout of the output power transistor M0 decreases, resulting in a second voltage V FB When the voltage is less than the reference voltage Vref, the first voltage V OCP_FB Greater than the second voltage V FB The control circuit 40 is based on the first voltage V OCP_FB The output current Iout of the control output power transistor M0 is set to the first overcurrent protection threshold I. OCP1 .

[0063] like Figure 3 As shown, when the load RL's current demand continues to increase, the output voltage Vout will continue to decrease, and the second voltage V FB Less than the reference voltage Vref, the first voltage V OCP_FB Greater than the second voltage V FB At this time, the first voltage V OCP_FB The output current Iout of the low-dropout linear regulator 1 is fully controlled by the control circuit 40 through the first voltage V. OCP_FB The output current Iout of the control output power transistor M0 is set to the first overcurrent protection threshold I. OCP1 .

[0064] According to some embodiments of this application, see Figure 2 and Figure 3 As shown, when the output voltage Vout equals the current foldback protection threshold V... foldbackAt this time, the current foldback protection circuit 30 outputs a valid current foldback protection signal to the current sampling circuit 10. Based on the valid current foldback protection signal and the output current Iout of the output power transistor M0, the current sampling circuit 10 outputs a first voltage V. OCP_FB The control circuit 40 is based on the first voltage V OCP_FB The output current Iout of the control output power transistor M0 is set to the second overcurrent protection threshold I. OCP2 Second overcurrent protection threshold I OCP2 Less than the first overcurrent protection threshold I OCP1 .

[0065] like Figure 3 As shown, if the load RL's current demand continues to increase, the output voltage Vout will continue to decrease. When the output voltage Vout drops to the current foldback protection threshold V... foldback When the current foldback protection is triggered, the current foldback protection circuit 30 generates a valid current foldback protection signal and sends it to the current sampling circuit 10. The current sampling circuit 10 then sets the first overcurrent protection threshold I based on the valid current foldback protection signal. OCP1 Lowered to a lower second overcurrent protection threshold I OCP2 Simultaneously, the current sampling circuit 10 outputs the first voltage V based on the output current Iout of the output power transistor M0. OCP_FB The control circuit 40 is controlled by the first voltage V. OCP_FB The output current Iout of the control output power transistor M0 is set to the second overcurrent protection threshold I. OCP2 .

[0066] This embodiment addresses the protection threshold V by ensuring the output voltage Vout drops to the current foldback protection threshold V. foldback At that time, the current foldback protection circuit 30 outputs a current foldback protection valid signal to the current sampling circuit 10, so that the control circuit 40 can use the first voltage V as a basis. OCP_FB The output current Iout of the control output power transistor M0 is set to a lower second overcurrent protection threshold I. OCP2 This reduces the output current Iout of the output power transistor M0, thus preventing thermal damage to the output power transistor M0.

[0067] According to some embodiments of this application, see Figure 2 As shown, the control circuit 40 in this embodiment includes an operational amplifier 41 and a voltage buffer circuit 42. The first input terminal of the operational amplifier 41 is connected to the current sampling circuit 10, the second input terminal of the operational amplifier 41 is connected to the voltage divider feedback circuit 20, the third input terminal of the operational amplifier 41 receives the reference voltage Vref, and the voltage buffer circuit 42 is connected to the output terminal of the operational amplifier 41 and the third terminal of the output power transistor M0, respectively.

[0068] In this operational amplifier 41, the first and second input terminals are positive inverting input terminals, and the third input terminal is negative inverting input terminal. The higher voltage signal at the positive inverting input terminal of the operational amplifier 41 is the second voltage V. FB At that time, the second voltage V FB The output voltage Vout of the low-dropout linear regulator 1 is controlled; the higher voltage signal at the non-inverting input of operational amplifier 41 is the first voltage V. OCP_FB At that time, the first voltage V OCP_FB Control the maximum output current (output current Iout) of the low dropout linear regulator 1.

[0069] This embodiment can accurately compare the input signal (first voltage V) using operational amplifier 41. OCP_FB Second voltage V FB The output is adjusted to ensure the stability of the output voltage Vout and the output current Iout. The high gain characteristic of the operational amplifier 41 can quickly respond to changes in the input signal, thereby improving the accuracy of the low dropout linear regulator 1. Furthermore, through the voltage buffer circuit 42, it is ensured that the output signal of the operational amplifier 41 can quickly drive the output power transistor M0, while isolating the parasitic capacitance of the output power transistor M0 from the output impedance of the operational amplifier 41, simplifying loop compensation and improving system stability.

[0070] According to some embodiments of this application, see Figure 4 As shown, Figure 4 This is a circuit diagram of another embodiment of the low-dropout linear regulator with overcurrent protection provided in this application. The control circuit 40 of this embodiment includes a selection control circuit 43, an operational amplifier 41, and a voltage buffer circuit 42. The selection control circuit 43 is connected to the first input terminal of the operational amplifier 41, the current sampling circuit 10, and the voltage divider feedback circuit 20, respectively. The second input terminal of the operational amplifier 41 receives the reference voltage Vref. The voltage buffer circuit 42 is connected to the output terminal of the operational amplifier 41 and the third terminal of the output power transistor M0, respectively.

[0071] Among them, the selection control circuit 43 is used to receive the first voltage V OCP_FB Second voltage V FB and the first voltage V OCP_FB Second voltage V FB After comparison, the higher voltage is selected as the effective voltage V. FBSEL The output will be fed to the non-inverting input of operational amplifier 41, and operational amplifier 41 will output through the effective voltage V. FBSEL Control the output current Iout or output voltage Vout of the output power transistor M0.

[0072] The control circuit 43 can be selected from, but is not limited to, comparators, AND gates, and switching circuits.

[0073] In this embodiment, by selecting the control circuit 43, a suitable input signal (first voltage V) can be selected according to different operating modes (such as normal operating mode, overcurrent protection mode, current foldback protection mode, etc.). OCP_FB Second voltage V FB This enhances the system's adaptability.

[0074] According to some embodiments of this application, see Figure 5 As shown, Figure 5 yes Figure 2 and Figure 4 A circuit diagram of one embodiment of the current sampling circuit, current foldback protection circuit, voltage divider feedback circuit, output power transistor, load, and load capacitor. The current sampling circuit 10 includes a first switch M1, a second switch M2, a third switch M3, a fourth switch M4, a fifth switch M5, a first resistor R1, a second resistor R2, a third resistor R3, and a fourth resistor R4.

[0075] The first switching transistor M0 is a power transistor of the same type as the output power transistor M0, including but not limited to PLDMOS transistors.

[0076] In this circuit, the first terminal of the first switching transistor M1 is connected to the first terminal of the output power transistor M0, the second terminal of the first switching transistor M1 is connected to the first terminal of the third switching transistor M3, the third terminal of the first switching transistor M1 is connected to the voltage buffer circuit 42, and the second terminal of the third switching transistor M3 is connected to one end of the second resistor R2, with the other end of the second resistor R2 grounded. Similarly, the first terminal of the second switching transistor M2 is connected to the second terminal of the output power transistor M0, the second terminal of the second switching transistor M2 is connected to one end of the first resistor R1, with the other end of the first resistor R1 grounded, and the third terminal of the second switching transistor M2 is connected to the first terminal of the third switching transistor M0. The third terminal of M3 is connected, and the second terminal of the second switch M2 is connected to the third terminal; the first terminal of the fifth switch M5 is connected to the other end of the first resistor R1, and the second terminal of the fifth switch M5 is connected between one end of the first resistor R1 and the second terminal of the second switch M2 through the third resistor R3; the first terminal of the fourth switch M4 is connected to the other end of the second resistor R2, and the second terminal of the fourth switch M4 is connected between one end of the second resistor R2 and the second terminal of the third switch M3 through the fourth resistor R4, and the third terminal of the fourth switch M4 is connected to the third terminal of the fifth switch M5.

[0077] In this circuit, both the first switching transistor M1 and the output power transistor M0 receive the output of the voltage buffer circuit 42; the current sampling circuit 10 outputs the first voltage V through one end of the second resistor R2 and the fourth resistor R4. OCP_FB .

[0078] In this embodiment, the current sampling circuit 10 is only one type of current mirror structure. In other embodiments, other current mirror structures can be used.

[0079] According to some embodiments of this application, see Figure 5 As shown, the current foldback protection circuit 30 includes a sixth switch M6, a first inverter I0, a second inverter I1, and a constant current source I2, and the voltage divider feedback circuit 20 includes a fifth resistor R5, a sixth resistor R6, and a seventh resistor R7.

[0080] One end of the fifth resistor R5 is connected between one end of the load capacitor CL and the second end of the output power transistor M0. The other end of the fifth resistor R5 is connected to one end of the sixth resistor R6. The other end of the sixth resistor R6 is connected to one end of the seventh resistor R7 and the second input terminal of the control circuit 40. The other end of the seventh resistor R7 is grounded. The first end of the sixth switch transistor M6 is connected between one end of the fifth resistor R5 and the second end of the output power transistor M0. The second end of the sixth switch transistor M6 is grounded through the constant current source I2. The second end of the sixth switch transistor M6 is connected to the input terminal of the first inverter I0. The output terminal of the first inverter I0 is connected to the input terminal of the second inverter I1. The output terminal of the second inverter I1 is connected between the third end of the fifth switch transistor M5 and the third end of the fourth switch transistor M4.

[0081] Optionally, the first switching transistor M1 and the output power transistor M0 are PLDMOS transistors. The first switching transistor M1 is a current mirror. The output power transistor M0 is used to provide the output current Iout of the LDO, and the first switching transistor M1 is used to detect the output current Iout of the LDO. The first terminal of the output power transistor M0 and the first terminal of the first switching transistor M1 are the source, the second terminal of the output power transistor M0 and the second terminal of the first switching transistor M1 are the drain, and the third terminal of the output power transistor M0 and the third terminal of the first switching transistor M1 are the gate.

[0082] Optionally, the second switch M2, the third switch M3, and the sixth switch M6 are PMOS transistors. The first terminal of the second switch M2, the first terminal of the third switch M3, and the first terminal of the sixth switch M6 are the sources; the second terminal of the second switch M2, the second terminal of the third switch M3, and the second terminal of the sixth switch M6 are the drains; and the third terminal of the second switch M2, the third terminal of the third switch M3, and the third terminal of the sixth switch M6 are the gates. The second switch M2 and the third switch M3 are mainly used to utilize the current mirror function of the current mirror to control the source and drain voltage difference of the output power transistor M0 and the first switch M1 (current mirror) to be the same, ensuring the mirror accuracy of the current mirror. The sixth switch M6 is mainly used to form a current source load unipolar common-source amplifier structure with the constant current source I2. The sixth switch M6 is the signal input transistor of the common-source amplifier. The voltage divider feedback circuit 20 is used to detect the decrease in the output voltage Vout.

[0083] Optionally, the fourth switch M4 and the fifth switch M5 are NMOS transistors, with the first terminal of the fourth switch M4 and the first terminal of the fifth switch M5 serving as the source, the second terminal of the fourth switch M4 and the second terminal of the fifth switch M5 serving as the drain, and the third terminal of the fourth switch M4 and the third terminal of the fifth switch M5 serving as the gate.

[0084] Another embodiment of this application provides an electronic device, including the low-dropout linear regulator 1 described in the above embodiment. The electronic device includes, but is not limited to, a mobile phone, tablet, computer, or blood glucose meter.

[0085] In summary, this application achieves overcurrent protection by directly connecting the current sampling circuit 10 and the voltage divider feedback circuit 20 to the control circuit 40. In this case, the overcurrent protection of the low-dropout linear regulator 1 and the overall loop control share a single loop, eliminating the need for an additional independent overcurrent protection loop and simplifying the control and implementation of the entire loop. Furthermore, by connecting the current foldback protection circuit 30 to both the voltage divider feedback circuit 20 and the current sampling circuit 10, the overcurrent protection of the low-dropout linear regulator 1 gains a current foldback protection function, thereby simplifying the circuit implementation and loop control and reducing the difficulty of design and debugging.

[0086] The above are merely embodiments of this application and do not limit the scope of this patent application. Any equivalent structural or procedural changes made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of this application.

Claims

1. A low dropout linear regulator with overcurrent protection function, characterized in that, include: An output power transistor, the first terminal of which receives the input voltage; The load has one end connected to the second end of the output power transistor, and the other end grounded. A load capacitor, one end of which is connected to the second terminal of the output power transistor, and the other end of which is grounded; A current sampling circuit is connected to the output power transistor and is used to sample the output current of the output power transistor and convert the output current to output a first voltage. A voltage divider feedback circuit is connected to the second terminal of the output power transistor. It is used to receive the output voltage of the output power transistor, divide the output voltage, and output a second voltage. A current foldback protection circuit is connected to the voltage divider feedback circuit and the current sampling circuit, respectively. The control circuit has a first input terminal connected to the current sampling circuit, a second input terminal connected to the voltage divider feedback circuit, and an output terminal connected to the third terminal of the output power transistor. The control circuit is used to receive a reference voltage, a first voltage, and a second voltage. When the first voltage is greater than or equal to the second voltage, the control circuit limits the output current of the output power transistor based on the first voltage.

2. The low dropout linear regulator of claim 1, wherein, When the low-dropout linear regulator is in normal operating condition, the second voltage is equal to the reference voltage, and the first voltage is less than the second voltage. The reference voltage is divided by the voltage division ratio of the voltage divider feedback circuit to obtain the set output voltage of the output power transistor. The control circuit controls the output voltage of the low-dropout linear regulator to be the set output voltage based on the second voltage.

3. The low dropout linear regulator of claim 2, wherein, When the output current is equal to the first overcurrent protection threshold, the first voltage is equal to the reference voltage, the first voltage is equal to the second voltage, and the control circuit controls the output current of the output power transistor to the first overcurrent protection threshold based on the first voltage.

4. The low dropout linear regulator of claim 3, wherein, As the load demand current increases, the output voltage of the output power transistor decreases. When the second voltage is less than the reference voltage, the first voltage is greater than the second voltage. When the first voltage is equal to the reference voltage, the control circuit controls the output current of the output power transistor to the first overcurrent protection threshold based on the first voltage.

5. The low dropout linear regulator of claim 4, wherein, When the output voltage is equal to the current foldback protection threshold, the current foldback protection circuit outputs a valid current foldback protection signal to the current sampling circuit. The current sampling circuit outputs the first voltage based on the valid current foldback protection signal and the output current of the output power transistor. The control circuit controls the output current of the output power transistor to a second overcurrent protection threshold based on the first voltage. The second overcurrent protection threshold is less than the first overcurrent protection threshold.

6. The low dropout linear regulator of claim 1, wherein, The control circuit includes an operational amplifier and a voltage buffer circuit. The first input terminal of the operational amplifier is connected to the current sampling circuit, the second input terminal of the operational amplifier is connected to the voltage divider feedback circuit, the third input terminal of the operational amplifier receives the reference voltage, and the voltage buffer circuit is connected to the output terminal of the operational amplifier and the third terminal of the output power transistor, respectively.

7. The low dropout linear regulator of claim 1, wherein, The control circuit includes a selection control circuit, an operational amplifier, and a voltage buffer circuit. The selection control circuit is connected to the first input terminal of the operational amplifier, the current sampling circuit, and the voltage divider feedback circuit, respectively. The second input terminal of the operational amplifier receives the reference voltage. The voltage buffer circuit is connected to the output terminal of the operational amplifier and the third terminal of the output power transistor, respectively.

8. The low dropout linear regulator of claim 6 or 7, wherein, The current sampling circuit includes a first switch, a second switch, a third switch, a fourth switch, a fifth switch, a first resistor, a second resistor, a third resistor, and a fourth resistor. The first terminal of the first switch is connected to the first terminal of the output power transistor. The second terminal of the first switch is connected to the first terminal of the third switch. The third terminal of the first switch is connected to the voltage buffer circuit. The second terminal of the third switch is connected to one end of the second resistor, and the other end of the second resistor is grounded. The first terminal of the second switch is connected to the second terminal of the output power transistor. The second terminal of the second switch is connected to one end of the first resistor, and the other end of the first resistor is grounded. The third terminal of the second switch is connected to the third terminal of the third switch. The first terminal of the fifth switch is connected to the other end of the first resistor. The second terminal of the fifth switch is connected between one end of the first resistor and the second terminal of the second switch through the third resistor. The first terminal of the fourth switch is connected to the other end of the second resistor. The second terminal of the fourth switch is connected between one end of the second resistor and the second terminal of the third switch through the fourth resistor. The third terminal of the fourth switch is connected to the third terminal of the fifth switch.

9. The low dropout linear regulator of claim 8, wherein, The current foldback protection circuit includes a sixth switch, a first inverter, a second inverter, and a constant current source. The voltage divider feedback circuit includes a fifth resistor, a sixth resistor, and a seventh resistor. One end of the fifth resistor is connected between one end of the load capacitor and the second end of the output power transistor. The other end of the fifth resistor is connected to one end of the sixth resistor. The other end of the sixth resistor is connected to one end of the seventh resistor and the second input terminal of the control circuit. The other end of the seventh resistor is grounded. The first end of the sixth switch is connected between one end of the fifth resistor and the second end of the output power transistor. The second end of the sixth switch is grounded through the constant current source. The second end of the sixth switch is connected to the input terminal of the first inverter. The output terminal of the first inverter is connected to the input terminal of the second inverter. The output terminal of the second inverter is connected between the third end of the fifth switch and the third end of the fourth switch.

10. An electronic device, comprising: Including the low dropout linear regulator as described in any one of claims 1-9.

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