Power quality acquisition terminal and power quality acquisition system

Abstract

This utility model discloses a power quality acquisition terminal and a power quality acquisition system, relating to the power grid field, and solves the problem of continuous power grid data acquisition and reliance on manual data collection. Through the collaborative design of a signal conditioning module, a remote communication module, and a terminal control module, it achieves a fully automated process with minimal or no human intervention. The signal conditioning module directly interfaces with the power grid signal acquisition equipment, eliminating the need for temporary on-site wiring. The terminal control module transmits the encapsulated data to external devices in real time via the remote communication module, eliminating the need for manual data export from memory cards. Simultaneously, external devices can send control commands to the terminal control module via the remote communication module, eliminating the need for on-site operation. The GPS timing module provides a reference timestamp for the terminal control module, which then encapsulates the data stream after associating and matching it with the reference timestamp, ensuring that each acquired data stream carries a standard time identifier. This solves the problem of difficult data coordination across multiple locations in traditional terminals.

Description

Technical Field

[0001] This utility model relates to the field of power grids, and in particular to a power quality acquisition terminal and a power quality acquisition system. Background Technology

[0002] As the installed capacity of intermittent energy sources such as wind and solar power increases, the operation of the power grid fluctuates dramatically on a minute or even second-by-second basis, and power quality problems such as harmonics and flicker have become commonplace. At the same time, new energy power plants are spreading to high-altitude and unattended areas, requiring long-term continuous high-bandwidth data collection of the power grid to support distributed power generation grid connection assessment, regional harmonic source location, and other tasks. It is also necessary to achieve anomaly alarms on a second-by-second basis and remote operation and maintenance to meet the needs of digital power grids with minimal or no human intervention.

[0003] Traditional terminals typically take the form of handheld or portable chassis, with data export interfaces mostly consisting of Universal Serial Bus (USB) or offline copying via memory cards. A typical inspection process involves a technician taking the instrument to the site for wiring, sampling data on-site for several hours, and then returning the entire unit or memory card to the office for analysis. If the results are insufficient to pinpoint the problem, the technician must retest at the site. Therefore, manual on-site wiring, sampling, and data copying are required, lacking remote high-speed communication capabilities, and involving repeated trips to the site for retesting, resulting in low efficiency and high labor costs. Storage capacity is low, relying heavily on exceeding limits to trigger high-sampling-rate waveform recording, making it difficult to fully retain details such as continuous oscillations and gradual instability. High-bandwidth raw waveforms can only be retained for a few minutes, failing to cover the daily load cycle of the power grid.

[0004] Therefore, providing a technical solution that can continuously collect large amounts of power grid data without requiring manual back-and-forth travel is a technical problem that urgently needs to be solved by those in the field. Utility Model Content

[0005] The purpose of this invention is to provide a power quality acquisition terminal and a power quality acquisition system to solve the problem of being unable to continuously acquire power grid data and relying on manual acquisition.

[0006] To solve the above-mentioned technical problems, this utility model provides a power quality acquisition terminal, comprising:

[0007] A signal conditioning module for receiving and conditioning multiple power grid signals transmitted by a power grid signal acquisition device, wherein the input end of the signal conditioning module is connected to the power grid signal acquisition device;

[0008] A GPS timing module for providing a reference timestamp, the output of which is connected to a multi-channel synchronous acquisition module;

[0009] A multi-channel synchronous acquisition module for analog-to-digital conversion is provided, wherein multiple input terminals of the multi-channel synchronous acquisition module are respectively connected to multiple output terminals of the signal conditioning module, and the output terminal of the multi-channel synchronous acquisition module is connected to the terminal control module.

[0010] A terminal control module for receiving the reference timestamp and the data stream after analog-to-digital conversion. The terminal control module is connected to the multi-channel synchronous acquisition module, the local storage module, and the remote communication module. The terminal control module receives the data stream and the reference timestamp, and transmits them to an external device or stores them in the local storage module through the remote communication module.

[0011] As an optional solution, the signal conditioning module in the above-mentioned power quality acquisition terminal includes: four voltage conditioning circuits and four current conditioning circuits;

[0012] The input terminals of the four voltage conditioning circuits are respectively connected to the secondary side of the voltage transformer in the power grid signal acquisition equipment; the voltage conditioning circuits are used to perform voltage division, isolation and filtering on the received power grid voltage signal;

[0013] The input terminals of the four current conditioning circuits are respectively connected to the secondary side of the current transformer in the power grid signal acquisition equipment; the current conditioning circuits are used to perform current conversion, voltage limiting and filtering processing on the received power grid current signal.

[0014] As an optional solution, in the above-mentioned power quality acquisition terminal, the current conditioning circuit includes: a first resistor, a second resistor, a third resistor, a first capacitor, and a first amplifier;

[0015] The first end of the current transformer is connected to the first end of the first resistor, the second end of the first resistor is connected to the inverting input of the first amplifier, the second end of the current transformer is connected to the non-inverting input of the first amplifier, the inverting input of the first amplifier is connected to the first end of the second resistor and the first end of the third resistor, the second end of the second resistor is connected to the first end of the first capacitor, and the second end of the first capacitor and the second end of the third resistor are connected to the output of the first amplifier.

[0016] As an optional solution, in the above-mentioned power quality acquisition terminal, the voltage conditioning circuit includes: a fourth resistor, a fifth resistor, a second capacitor, a first diode, a second diode, and a second amplifier;

[0017] The first terminal of the voltage transformer is connected to the negative terminal of the first diode, the positive terminal of the second diode, and the inverting input terminal of the second amplifier. The second terminal of the voltage transformer is connected to the positive terminal of the first diode, the negative terminal of the second diode, and the non-inverting input terminal of the second amplifier. The inverting input terminal of the second amplifier is connected to the first terminal of the fourth resistor and the first terminal of the fifth resistor. The second terminal of the fourth resistor is connected to the first terminal of the second capacitor. The second terminal of the second capacitor and the second terminal of the fifth resistor are connected to the output terminal of the second amplifier.

[0018] As an optional solution, the multi-channel synchronous acquisition module in the above-mentioned power quality acquisition terminal includes: a multi-channel analog-to-digital converter module, a field-programmable gate array, and a high-speed serial computer expansion bus port;

[0019] The input terminal of the multi-channel analog-to-digital converter module is connected to the output terminal of the signal conditioning module, and is used to receive the conditioned analog power grid signal and synchronously convert it into a digital signal.

[0020] The field-programmable gate array is connected to the output of the multi-channel analog-to-digital converter module and is used to perform convolutional interleaving processing on the digital signal output by the multi-channel analog-to-digital converter module and encapsulate the processed digital signal into an internal standard data frame.

[0021] The high-speed serial computer expansion bus port is connected to the field-programmable gate array (FPGA) and the terminal control module, respectively, and is used to transmit the internal standard data frames encapsulated by the FPGA to the terminal control module in real time.

[0022] As an optional solution, in the above-mentioned power quality acquisition terminal, the multi-channel analog-to-digital conversion module includes: a multi-channel acquisition circuit and a multi-channel analog-to-digital converter;

[0023] The input terminals of the multiple acquisition circuits are connected to the output terminals of the signal conditioning module, the output terminals of the acquisition circuits are respectively connected to the input terminals of the multi-channel analog-to-digital converter, and the output terminals of the multi-channel analog-to-digital converter are respectively connected to the field-programmable gate array.

[0024] As an optional solution, in the above-mentioned power quality acquisition terminal, the multi-channel analog-to-digital conversion module includes: the acquisition circuit includes: a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, and a third amplifier;

[0025] The first output terminal of the signal conditioning module is connected to the inverting input terminal of the first channel of the third amplifier through the sixth resistor. The second output terminal of the signal conditioning module is connected to the non-inverting input terminal of the first channel of the third amplifier through the seventh resistor. The inverting input terminal of the first channel of the third amplifier is connected to the output terminal of the first channel of the third amplifier through the eighth resistor. The output terminal of the first channel of the third amplifier is connected to the inverting input terminal of the second channel of the third amplifier through the ninth resistor. The non-inverting input terminal of the second channel of the third amplifier is grounded. The inverting input terminal of the second channel of the third amplifier is connected to the output terminal of the second channel of the third amplifier through the tenth resistor. The output terminal of the second channel of the third amplifier is connected to the analog-to-digital converter through the eleventh resistor.

[0026] As an optional solution, the GPS timing module in the above-mentioned power quality acquisition terminal includes: a GPS chip, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a third capacitor, a fourth capacitor, a first transistor, a second transistor, and an inductor;

[0027] The reset port of the GPS chip is connected to the power supply through the twelfth resistor and grounded through the thirteenth resistor. The antenna power supply pin of the GPS chip is connected to the first end of the inductor and the first end of the third capacitor. The second end of the third capacitor is grounded. The second end of the inductor is connected to the first end of the fourteenth resistor, the first end of the fourth capacitor, and the first end of the second transistor. The second end of the fourteenth resistor and the second end of the fourth capacitor are connected to the first end of the fifteenth resistor and the power supply terminal. The second end of the fifteenth resistor is connected to the first end of the first transistor. The antenna detection port of the GPS chip is connected to the first end of the sixteenth resistor. The second end of the sixteenth resistor is connected to the second end of the second transistor and the first end of the seventeenth resistor. The second end of the seventeenth resistor is grounded. The control terminal of the second transistor is connected to the control terminal of the first transistor, the second end of the first transistor, and the first end of the eighteenth resistor. The second end of the eighteenth resistor is grounded.

[0028] As an optional solution, in the above-mentioned power quality acquisition terminal, the second pulse signal terminal and TXD terminal of the GPS chip are connected to the field programmable gate array (FPGA) to send the reference timestamp to the FPGA.

[0029] To solve the above-mentioned technical problems, this utility model also provides a power quality acquisition system, including multiple power quality acquisition terminals as described above, and further including: a communication transmission unit, an external server, and a control and analysis unit;

[0030] The communication transmission unit is connected to the power quality acquisition terminal and the external server, respectively, and the external server is connected to the control and analysis unit.

[0031] The power quality acquisition terminal provided by this utility model achieves fully automated or unmanned operation through the collaborative design of a signal conditioning module, a remote communication module, and a terminal control module. The signal conditioning module directly interfaces with the power grid signal acquisition equipment, eliminating the need for temporary on-site wiring. The terminal control module, through the remote communication module, can transmit the encapsulated data to external devices in real time, eliminating the need for manual data export from memory cards. Simultaneously, external devices can send control commands to the terminal control module via the remote communication module, eliminating the need for on-site operation. The GPS timing module provides a reference timestamp for the terminal control module, which then encapsulates the data stream by associating and matching the reference timestamp, ensuring that each acquired data stream carries a standard time identifier. Combined with the synchronous sampling capability of the multi-channel synchronous acquisition module, time base alignment of data from different acquisition points (such as different distribution cabinets or different lines) at the same test station can be achieved, solving the problem of difficult data coordination among multiple points in traditional terminals. There is no need to repeatedly move instruments; the built-in GPS supports selecting multiple test points at one station for simultaneous detection, facilitating comprehensive analysis.

[0032] In addition, this utility model also provides a power quality acquisition system, including the power quality acquisition terminal mentioned above, with the same effect. Attached Figure Description

[0033] To more clearly illustrate the embodiments of this utility model, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0034] Figure 1 A schematic diagram of a power quality acquisition terminal provided in an embodiment of this application;

[0035] Figure 2 A circuit diagram of a current conditioning circuit provided in an embodiment of this application;

[0036] Figure 3 A circuit diagram of a voltage conditioning circuit provided in an embodiment of this application;

[0037] Figure 4 A circuit diagram of a data acquisition circuit provided in an embodiment of this application;

[0038] Figure 5 A circuit diagram of a GPS timing module provided in an embodiment of this application.

[0039] The reference numerals in the attached figures are as follows:

[0040] 11-Signal conditioning module; 12-GPS timing module; 13-Multi-channel synchronous acquisition module; 14-Terminal control module; 15-Local storage module; 16-Remote communication module. Detailed Implementation

[0041] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0042] The core of this utility model is to provide a power quality acquisition terminal and a power quality acquisition system.

[0043] To enable those skilled in the art to better understand the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0044] This application provides a power quality acquisition terminal, such as... Figure 1 As shown, it includes:

[0045] A signal conditioning module 11 is used to receive and condition multiple power grid signals transmitted by a power grid signal acquisition device. The input terminal of the signal conditioning module 11 is connected to the power grid signal acquisition device.

[0046] A GPS timing module 12 for providing a reference timestamp, the output of which is connected to a multi-channel synchronous acquisition module 13;

[0047] A multi-channel synchronous acquisition module 13 is used for analog-to-digital conversion. The multiple input terminals of the multi-channel synchronous acquisition module 13 are respectively connected to the multiple output terminals of the signal conditioning module 11, and the output terminal of the multi-channel synchronous acquisition module 13 is connected to the terminal control module 14.

[0048] A terminal control module 14 is used to receive the reference timestamp and the data stream after analog-to-digital conversion. The terminal control module 14 is connected to the multi-channel synchronous acquisition module 13, the local storage module 15, and the remote communication module 16. The terminal control module 14 receives the data stream and the reference timestamp, and transmits them to an external device or stores them in the local storage module 15 through the remote communication module 16.

[0049] The power quality acquisition terminal provided in this application embodiment constructs a complete power grid data acquisition and processing system through the coordinated cooperation of the signal conditioning module 11, the Global Positioning System (GPS) timing module, the multi-channel synchronous acquisition module 13, the terminal control module 14, the local storage module 15, and the remote communication module 16.

[0050] In this embodiment, the input terminal of the signal conditioning module 11 is connected to the power grid signal acquisition device to receive and condition multiple power grid signals. It should be noted that these multiple power grid signals typically include three-phase voltage, three-phase current, and neutral line current, corresponding to the full parameter requirements of power grid monitoring. Specifically, the main functions of the signal conditioning module 11 include: stepping down and current-limiting high-voltage and high-current signals to convert the primary side signal of the power grid into a low-level analog signal (typically within ±10V) suitable for subsequent analog-to-digital conversion; removing high-frequency noise and interference from the signal through a filtering circuit to ensure the purity of the signal input to the acquisition module; achieving electrical isolation to prevent high-voltage power grid from damaging the low-voltage circuits inside the terminal; and ensuring that the multiple output terminals of the signal conditioning module 11 correspond one-to-one with the multiple input terminals of the multi-channel synchronous acquisition module 13. This design ensures independent processing of each signal and avoids cross-interference between channels.

[0051] In this embodiment, the output of the GPS timing module 12 is connected to the multi-channel synchronous acquisition module 13 to provide a reference timestamp. That is, this module not only provides a unified time reference for the terminal but also directly participates in the synchronization control of the acquisition process. Specifically, it can trigger the analog-to-digital conversion operation of the multi-channel synchronous acquisition module 13 by outputting a standard time signal, ensuring that the sampling times of multiple signals are strictly consistent. It can also provide high-precision Coordinated Universal Time (UTC) information, adding time stamps to the acquired data to achieve time base alignment of data from different terminals and different locations, solving the problem of the inability to collaboratively analyze multi-point data due to time asynchrony in traditional terminals. It should be noted that the GPS timing module 12 is not the only time source. In scenarios with weak GPS signals, such as indoor environments, other satellite timing systems such as BeiDou can also be used; this embodiment does not impose strict limitations.

[0052] In this embodiment, the multi-channel synchronous acquisition module 13 serves as the core component for signal digitization. Its multiple input terminals are connected to the multiple output terminals of the signal conditioning module 11, and its output terminals are connected to the terminal control module 14. It receives the conditioned analog signal and synchronously converts it into a digital signal using an internal multi-channel analog-to-digital converter. Triggered by the standard time signal provided by the GPS timing module 12, it achieves simultaneous sampling of multiple signals, ensuring time consistency of data from each channel. It performs preliminary processing on the digital signal (such as verification and encapsulation) to form a standardized data stream that is transmitted to the terminal control module 14. It should be noted that the number of channels is usually matched to the number of output channels of the signal conditioning module 11 (generally 8 channels, corresponding to 4 voltage channels + 4 current channels), but it can be expanded to 16 channels or more depending on actual needs. This embodiment does not impose a strict limitation on this.

[0053] The terminal control module 14, as the core control unit of the entire terminal, is connected to the multi-channel synchronous acquisition module 13, the local storage module 15, and the remote communication module 16. That is, this module undertakes the comprehensive functions of data processing, storage control, and communication scheduling. It receives the data stream transmitted by the multi-channel synchronous acquisition module 13 and the reference timestamp provided by the GPS timing module 12, completing the correlation and matching of data and time; it controls the data storage and transmission strategy: under normal circumstances, local storage and remote transmission can be performed simultaneously, and local storage is prioritized in case of network anomalies; it receives control commands (such as adjusting the sampling rate, starting / stopping acquisition, etc.) issued by external devices through the remote communication module, and adjusts the terminal's operating parameters accordingly. It should be noted that the terminal control module 14 is typically implemented using an industrial computer or embedded processor, and its performance must meet the requirements of high-bandwidth data processing, especially in continuous acquisition mode to avoid data congestion or loss.

[0054] In this embodiment, the local storage module 15 and the remote communication module serve as data storage media and transmission channels, jointly ensuring data integrity and accessibility. The main function of the local storage module 15 is to provide a large-capacity data cache, especially during remote communication interruptions, allowing for temporary storage of collected data to prevent data loss. Generally, its storage capacity is no less than 4TB to meet the requirement of at least 48 hours of continuous data acquisition. The remote communication module is responsible for enabling bidirectional data interaction between the terminal and external devices. On one hand, it transmits processed power grid data to an external server or analysis platform; on the other hand, it receives external control commands. In this embodiment, this module typically supports dual 5G and Ethernet links to ensure communication reliability in complex environments.

[0055] The power quality acquisition terminal provided by this utility model ensures synchronous sampling and time consistency of multiple signals through the direct connection between the GPS timing module and the multi-channel synchronous acquisition module 13. This solves the problem of inconsistent time bases for multi-point data in traditional terminals, providing a data foundation for regional power grid analysis. The terminal control module 14 flexibly schedules data storage and transmission, combining large-capacity local storage and remote communication capabilities. This ensures data real-time performance while avoiding data loss due to network problems, significantly improving data reliability compared to the offline storage mode of traditional terminals. The modular design of the entire terminal allows it to adapt to different application scenarios. Whether it is unattended monitoring of new energy power plants or multi-point collaborative acquisition of urban distribution networks, the module parameters can be adjusted appropriately to meet the requirements. It can effectively address the monitoring needs of power grid fluctuations caused by intermittent energy sources, completely record the entire process of power quality problems such as harmonics and flicker, and provide strong support for distributed power grid connection assessment and dynamic power grid control.

[0056] According to the above embodiments, specifically, the signal conditioning module 11 includes: four voltage conditioning circuits and four current conditioning circuits;

[0057] The input terminals of the four voltage conditioning circuits are respectively connected to the secondary side of the voltage transformer in the power grid signal acquisition equipment; the voltage conditioning circuits are used to perform voltage division, isolation and filtering on the received power grid voltage signal;

[0058] The input terminals of the four current conditioning circuits are respectively connected to the secondary side of the current transformer in the power grid signal acquisition equipment; the current conditioning circuits are used to perform current conversion, voltage limiting and filtering processing on the received power grid current signal.

[0059] The input terminals of the four voltage conditioning circuits are connected to the secondary side of the voltage transformer (PT) in the power grid signal acquisition equipment to achieve safe and accurate acquisition of the power grid voltage signal. The voltage conditioning circuits function in three ways: Voltage division: Since the voltage signal output from the secondary side of the voltage transformer (usually 100V) is still higher than the input range (±10V) of the subsequent analog-to-digital conversion module, it is necessary to perform voltage division through a precision resistor network to adjust the signal amplitude to a suitable range for acquisition. Isolation: Electrical isolation between the primary power grid system and the terminal acquisition system is achieved through isolation operational amplifiers or optocoupler isolation components. This not only protects the internal circuits of the terminal from high-voltage interference from the power grid but also avoids measurement errors caused by ground potential differences. Filtering: Using resistor-capacitor (RC) low-pass filters or active filter circuits, high-frequency noise and interference (such as harmonic interference generated by switching power supplies) in the voltage signal are filtered out to ensure the purity of the signal input to the acquisition module.

[0060] It should also be noted that the four voltage conditioning circuits correspond to the A, B, and C phase voltages and the neutral line voltage of the three-phase power grid, respectively. This configuration can fully collect key parameters such as voltage imbalance and zero-sequence voltage of the three-phase system, providing more comprehensive voltage information compared to the traditional three-channel voltage acquisition scheme.

[0061] Similar to voltage conditioning circuits, the input terminals of four current conditioning circuits are connected to the secondary side of the current transformers (CTs) in the power grid signal acquisition equipment, but their processing objects and methods differ. The main functions of the current conditioning circuits include: Current conversion: The output of the current transformer's secondary side is usually a small current signal (typically 5A or 1A), which needs to be converted into a suitable voltage signal (within ±10V range) through sampling resistors or current-to-voltage conversion circuits. Voltage limiting: Limiting the amplitude of the input signal to prevent large current signals generated during power grid faults (such as short circuits or lightning strikes) from damaging subsequent circuits. Filtering: Similar to voltage conditioning circuits, current conditioning circuits also require filtering.

[0062] In this embodiment, the four current conditioning circuits correspond to the A, B, and C phase currents and the neutral line current of the three-phase power grid, respectively.

[0063] The output terminals of the eight-channel conditioning circuit are connected one-to-one with the eight input terminals of the multi-channel synchronous acquisition module 13. In this embodiment, the four voltage conditioning circuits and the four current conditioning circuits do not work independently, but rather work collaboratively through a unified power supply and layout design. All conditioning circuits are powered by isolated power supplies to avoid power interference between different channels and ensure the independence of each signal. Secondly, in terms of PCB layout, voltage conditioning circuits and current conditioning circuits are usually arranged separately to reduce mutual interference; conditioning circuits of the same type are arranged symmetrically to ensure consistency of each channel.

[0064] According to the above embodiments, specifically, the power quality acquisition terminal, such as... Figure 2 As shown, the current conditioning circuit includes: a first resistor R1, a second resistor R2, a third resistor R3, a first capacitor C1, and a first amplifier OP1;

[0065] The first end of the current transformer is connected to the first end of the first resistor R1. The second end of the first resistor R1 is connected to the inverting input of the first amplifier OP1. The second end of the current transformer is connected to the non-inverting input of the first amplifier OP1. The inverting input of the first amplifier OP1 is connected to the first end of the second resistor R2 and the first end of the third resistor R3. The second end of the second resistor R2 is connected to the first end of the first capacitor C1. The second end of the first capacitor C1 and the second end of the third resistor R3 are connected to the output of the first amplifier OP1.

[0066] First, it should be clarified that the core input of this current conditioning circuit is a small current signal (usually 5A or 1A) output from the secondary side of the current transformer (CT), and the final output is a standard voltage signal (within ±10V) adapted to the multi-channel synchronous acquisition module 13.

[0067] In this embodiment, the first terminal of the current transformer is connected to the first terminal of the first resistor R1, the second terminal of the first resistor R1 is connected to the inverting input terminal of the first amplifier OP1, and the second terminal of the current transformer is connected to the non-inverting input terminal of the first amplifier OP1. This connection method makes the first resistor R1 a sampling resistor for the current signal, thus completing the basic conversion from current signal to voltage signal.

[0068] The connection relationship between the inverting input, non-inverting input, and output of the first amplifier OP1 directly establishes a composite function of inverting proportional amplification and RC feedback filtering. Its low input impedance effectively suppresses external interference during current signal transmission, avoiding signal attenuation or distortion caused by excessively high input impedance.

[0069] The second resistor R2 and the first capacitor C1 form an RC low-pass filter combination to suppress high-frequency noise. This filter is fed back to the inverting input of the amplifier to filter out interference signals in the current signal. Compared to traditional passive RC filters, this method offers more stable filtering performance.

[0070] Based on the functions and connections of the components mentioned above, the complete workflow of this current conditioning circuit can be divided into current sampling and preliminary conversion, active filtering and noise suppression, proportional amplification and amplitude adaptation, and targeted optimization based on the characteristics of the grid current signal.

[0071] According to the above embodiments, specifically, as follows: Figure 3 As shown, the voltage conditioning circuit includes: a fourth resistor R4, a fifth resistor R5, a second capacitor C2, a first diode D1, a second diode D2, and a second amplifier OP2;

[0072] The first terminal of the voltage transformer is connected to the negative terminal of the first diode D1, the positive terminal of the second diode D2, and the inverting input terminal of the second amplifier OP2. The second terminal of the voltage transformer is connected to the positive terminal of the first diode D1, the negative terminal of the second diode D2, and the non-inverting input terminal of the second amplifier OP2. The inverting input terminal of the second amplifier OP2 is connected to the first terminal of the fourth resistor R4 and the first terminal of the fifth resistor R5. The second terminal of the fourth resistor R4 is connected to the first terminal of the second capacitor C2. The second terminal of the second capacitor C2 and the second terminal of the fifth resistor R5 are connected to the output terminal of the second amplifier OP2.

[0073] The input to the voltage conditioning circuit is the AC voltage signal output from the secondary side of the voltage transformer (PT), and the output is the standard voltage signal (within ±10V range) adapted to the multi-channel synchronous acquisition module 13.

[0074] The first diode D1 and the second diode D2 are connected in reverse parallel to form a bidirectional voltage limiting protection circuit, which can protect against overvoltage surges and clamp the voltage within a safe range.

[0075] The second amplifier OP2 forms an inverting proportional amplifier with RC feedback filtering, effectively suppressing external interference during voltage signal transmission. The fourth resistor R4 and the second capacitor C2 form an RC low-pass filter to suppress high-frequency noise and filter out interference signals in the voltage signal.

[0076] The voltage conditioning circuit can be divided into three stages: overvoltage protection and initial limiting, signal amplification / attenuation and filtering, and output of a standardized signal, which is directly input to the multi-channel synchronous acquisition module 13 for analog-to-digital conversion.

[0077] In this embodiment, the amplification factor setting needs to consider the voltage transformer ratio, and the filtering parameters need to adapt to the frequency characteristics of the power grid. These parameters can be adjusted according to the actual application scenario, and this embodiment does not impose strict limitations. It adapts to the voltage monitoring needs in complex power grid environments, providing a reliable data foundation for the terminal control module 14 to analyze power quality indicators such as voltage harmonics, voltage deviation, and voltage fluctuations.

[0078] According to the above embodiments, specifically, the multi-channel synchronous acquisition module 13 includes: a multi-channel analog-to-digital converter module, a field-programmable gate array, and a high-speed serial computer expansion bus port;

[0079] The input terminal of the multi-channel analog-to-digital converter module is connected to the output terminal of the signal conditioning module 11, and is used to receive the conditioned power grid analog signal and synchronously convert it into a digital signal;

[0080] The field-programmable gate array is connected to the output of the multi-channel analog-to-digital converter module and is used to perform convolutional interleaving processing on the digital signal output by the multi-channel analog-to-digital converter module and encapsulate the processed digital signal into an internal standard data frame.

[0081] The high-speed serial computer expansion bus port is connected to the field-programmable gate array (FPGA) and the terminal control module 14 respectively, and is used to transmit the internal standard data frame encapsulated by the FPGA to the terminal control module 14 in real time.

[0082] The input of the multi-channel analog-to-digital converter module is connected to the output of the signal conditioning module 11. Its core function is to synchronously convert the conditioned analog signals (voltage, current) into digital signals. In this embodiment, the module is not a single conversion chip, but an integrated unit containing multiple parallel sampling channels.

[0083] The module's built-in synchronous trigger circuit receives the 1PPS pulse signal output by the GPS timing module 12, ensuring that all channels start sampling at the same time, eliminating the time deviation between channels from the source. The number of modules' channels matches the number of output channels of the signal conditioning module 11 (usually 8 channels, corresponding to 4 voltage channels + 4 current channels), which can process multiple analog signals simultaneously, avoiding the data timing chaos caused by traditional single-channel time-division sampling.

[0084] The Field Programmable Gate Array (FPGA) is connected to the output of the multi-channel analog-to-digital converter module. As the core unit for data processing, its hardware programmability enables it to implement high-speed parallel data processing logic.

[0085] Its main functions include: Convolutional Interleaving Processing: Interleaving and encoding multiple digital signals using a preset convolutional algorithm, breaking down and rearranging the continuous data stream before recombination. Data Verification and Error Correction: Embedding Cyclic Redundancy Check (CRC) codes or parity bits during data encapsulation to detect and correct errors in data transmission in real time, ensuring data integrity. Standard Data Frame Encapsulation: Encapsulating multiple digital signals into internal standard data frames according to a preset format (including header information such as channel identifier, sampling time, and data length), enabling rapid identification of data from different channels during subsequent transmission and processing.

[0086] The high-speed serial computer expansion bus (PCIe) port is connected to both the FPGA and the terminal control module 14, serving as a data bridge between the module and the terminal control module 14. It should be noted that the choice of PCIe port is not the only option; in certain scenarios, optical modules can also be used to achieve fiber optic transmission. This embodiment does not impose strict limitations on this.

[0087] According to the above embodiments, specifically, the multi-channel analog-to-digital conversion module includes: a multi-channel acquisition circuit and a multi-channel analog-to-digital converter;

[0088] The input terminals of the multiple acquisition circuits are connected to the output terminals of the signal conditioning module 11, the output terminals of the acquisition circuits are respectively connected to the input terminals of the multi-channel analog-to-digital converter, and the output terminals of the multi-channel analog-to-digital converter are respectively connected to the field-programmable gate array.

[0089] The input terminal of the multi-channel acquisition circuit is connected to the output terminal of the signal conditioning module 11, providing a stable analog signal for subsequent analog-to-digital conversion. The number of channels in the acquisition circuit corresponds one-to-one with the number of output channels of the signal conditioning module 11 (usually 8 channels). The parameters (such as gain and bandwidth) of each acquisition circuit are strictly matched to ensure that the transmission characteristics of each channel are consistent, laying the foundation for subsequent synchronous sampling.

[0090] Each input terminal of the multi-channel analog-to-digital converter is connected to the output terminal of the acquisition circuit, and the output terminal is connected to the field-programmable gate array (FPGA) to synchronously convert multiple analog signals into digital signals. Its main functions include: synchronous sampling control: the converter's built-in synchronous clock circuit receives a 1PPS pulse signal from the GPS timing module 12, triggering all channels to start sampling at the same time. It is important to emphasize that this synchronization is achieved through hardware triggering. The converted digital signals are synchronously output to the FPGA via a parallel data bus, avoiding data delays between channels caused by serial output. Simultaneously, the output data includes channel identification information, enabling the FPGA to accurately distinguish data from different channels.

[0091] According to the above embodiments, specifically, the multi-channel analog-to-digital conversion module includes: the acquisition circuit includes: a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, and a third amplifier OP3.

[0092] The first output terminal of the signal conditioning module 11 is connected to the inverting input terminal of the first channel of the third amplifier OP3 through the sixth resistor R6. The second output terminal of the signal conditioning module 11 is connected to the non-inverting input terminal of the first channel of the third amplifier OP3 through the seventh resistor R7. The inverting input terminal of the first channel of the third amplifier OP3 is connected to the output terminal of the first channel of the third amplifier OP3 through the eighth resistor R8. The output terminal of the first channel of the third amplifier OP3 is connected to the inverting input terminal of the second channel of the third amplifier OP3 through the ninth resistor R9. The non-inverting input terminal of the second channel of the third amplifier OP3 is grounded. The inverting input terminal of the second channel of the third amplifier OP3 is connected to the output terminal of the second channel of the third amplifier OP3 through the tenth resistor R10. The output terminal of the second channel of the third amplifier OP3 is connected to the analog-to-digital converter through the eleventh resistor R11.

[0093] The input to the acquisition circuit is the differential analog signal output from the signal conditioning module 11 (such as the ±5V differential voltage output from the voltage conditioning circuit and the ±5V differential current signal output from the current conditioning circuit), and the output is a single-ended voltage signal (usually 0~10V or ±10V) adapted to a multi-channel analog-to-digital converter. The circuit achieves hierarchical signal processing through the first and second channels of the third amplifier OP3 in a two-stage amplification unit.

[0094] The first stage of amplification, namely the first channel of the third amplifier OP3, performs primary conditioning of the differential signal, receives the differential signal, and effectively suppresses common-mode noise.

[0095] The second stage of amplification, namely the second channel of the third amplifier OP3, achieves single-ended conversion and amplitude matching. It converts the floating differential signal output from the first channel into a ground-referenced single-ended signal, adapting to the single-ended input requirements of the analog-to-digital converter.

[0096] As a key component for accurate adaptation of analog signals in the multi-channel analog-to-digital converter module, the acquisition circuit can maximize the retention of effective information output by the signal conditioning module 11 and provide adapted input signals for the multi-channel analog-to-digital converter, which is an important guarantee for ensuring the acquisition accuracy of the entire terminal.

[0097] According to the above embodiments, specifically, the GPS timing module 12 includes: a GPS chip U1, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18, a third capacitor C3, a fourth capacitor C4, a first transistor VT1, a second transistor VT2, and an inductor L1;

[0098] The reset port of the GPS chip U1 is connected to the power supply through the twelfth resistor R12 and grounded through the thirteenth resistor R13. The antenna power pin of the GPS chip U1 is connected to the first terminal of the inductor L1 and the first terminal of the third capacitor C3. The second terminal of the third capacitor C3 is grounded. The second terminal of the inductor L1 is connected to the first terminal of the fourteenth resistor R14, the first terminal of the fourth capacitor C4, and the first terminal of the second transistor VT2. The second terminals of the fourteenth resistor R14 and the fourth capacitor C4 are connected to the first terminal of the fifteenth resistor R15 and the power supply terminal. The second end of the fifteenth resistor R15 is connected to the first end of the first transistor VT1. The antenna detection port of the GPS chip U1 is connected to the first end of the sixteenth resistor R16. The second end of the sixteenth resistor R16 is connected to the second end of the second transistor VT2 and the first end of the seventeenth resistor R17. The second end of the seventeenth resistor R17 is grounded. The control terminal of the second transistor VT2 is connected to the control terminal of the first transistor VT1, the second end of the first transistor VT1, and the first end of the eighteenth resistor R18. The second end of the eighteenth resistor R18 is grounded.

[0099] The core of the GPS timing module 12 is the GPS chip U1, and the twelfth resistor R12 and the thirteenth resistor R13 work together to provide the power-on reset signal.

[0100] Inductor L1, third and fourth capacitors C4, and fourteenth and fifteenth resistors R15, together with subsequent components, form a stable antenna power supply path, providing DC power.

[0101] The sixteenth to eighteenth resistors R18 and the first to second transistors work together to achieve real-time monitoring and power supply control of the GPS antenna connection status.

[0102] The GPS chip U1 outputs two time signals through specific pins: one is a 1PPS pulse signal (rising edge time error ≤100ns), which is directly input into the multi-channel synchronous acquisition module 13 as a synchronization trigger source; the other is UTC time data, which is transmitted to the terminal control module 14 as a reference timestamp.

[0103] The 1PPS pulse signal and UTC time data output by the GPS chip U1 provide nanosecond-level synchronization triggering for the multi-channel synchronous acquisition module 13 and a standard timestamp for the terminal control module 14, ensuring the time base of all acquired data is consistent. Through comprehensive power filtering, impedance matching, and anti-interference design, the module can operate stably in harsh environments such as strong electromagnetic interference, wide temperature range, and vibration, meeting the application requirements of scenarios such as new energy power plants and substations, and solving the technical bottleneck of traditional terminals where data cannot be collaboratively analyzed due to time asynchrony.

[0104] Specifically, the second pulse signal terminal and TXD terminal of the GPS chip U1 are connected to the field programmable gate array (FPGA) to send the reference timestamp to the FPGA.

[0105] The second pulse signal terminal of GPS chip U1 is directly connected to the dedicated input pin of FPGA. The transmitted 1PPS signal is a periodic hardware pulse signal. The 1PPS signal is the time zero point of the entire acquisition terminal. Key operations such as synchronous sampling of multi-channel analog-to-digital conversion module and data frame encapsulation of FPGA are all triggered based on this rising edge.

[0106] The connection between the TXD end (data sending end) and the FPGA sets up the serial transmission of time information. The TXD end of the GPS chip U1 is connected to the receiving pin of the FPGA to transmit data packets containing UTC time information. The FPGA then sends the UTC time information along with the data stream to the terminal control module 14.

[0107] The FPGA applies the generated complete timestamp to two scenarios: first, as a synchronous trigger signal, it controls the multi-channel analog-to-digital converter to perform multiple samplings within each 1PPS cycle (e.g., sampling once every 20μs), and adds a microsecond-level time stamp to each sampled data; second, it transmits the timestamp to the terminal control module 14 in real time via the internal bus for time marking during data storage and remote transmission.

[0108] Finally, this application embodiment also provides a power quality acquisition system, including multiple power quality acquisition terminals as described above, and further including: a communication transmission unit, an external server, and a control and analysis unit;

[0109] The communication transmission unit is connected to the power quality acquisition terminal and the external server, respectively, and the external server is connected to the control and analysis unit.

[0110] Multiple power quality acquisition terminals (the number can be flexibly configured according to the monitoring range) are distributed at key monitoring points of the power grid. These terminals achieve full-domain time base alignment via a GPS timing module 12, ensuring that data collected from different points can be analyzed across time and space (e.g., determining the propagation path of harmonic sources and locating the initiation area of ​​voltage sags), thus realizing regional power grid monitoring. A communication transmission unit connects to both the power quality acquisition terminals and an external server. The external server, serving as the system's data core, connects to the communication transmission unit and the control and analysis unit. The external server must possess high concurrency processing capabilities, capable of simultaneously receiving real-time data from dozens of acquisition terminals. The control and analysis unit connects to the external server, reads and analyzes harmonic data from the server in real time, triggers alarms, and marks abnormal terminals.

[0111] The power quality acquisition terminal and power quality acquisition system provided by this utility model have been described in detail above. The various embodiments in the specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the method section. It should be noted that those skilled in the art can make several improvements and modifications to this utility model without departing from the principle of this utility model, and these improvements and modifications also fall within the protection scope of the claims of this utility model.

[0112] It should also be noted that, in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising a..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

Claims

1. A power quality acquisition terminal, characterized by, include: A signal conditioning module (11) is used to receive and condition multiple power grid signals transmitted by a power grid signal acquisition device. The input end of the signal conditioning module (11) is connected to the power grid signal acquisition device. A GPS timing module (12) for providing a reference timestamp, the output of which is connected to a multi-channel synchronous acquisition module (13); A multi-channel synchronous acquisition module (13) for analog-to-digital conversion is used. The multiple input terminals of the multi-channel synchronous acquisition module (13) are respectively connected to the multiple output terminals of the signal conditioning module (11), and the output terminal of the multi-channel synchronous acquisition module (13) is connected to the terminal control module (14). A terminal control module (14) for receiving the reference timestamp and the data stream after analog-to-digital conversion is connected to the multi-channel synchronous acquisition module (13), the local storage module (15), and the remote communication module (16). The terminal control module (14) receives the data stream and the reference timestamp and transmits them to an external device or stores them in the local storage module (15) through the remote communication module (16).

2. The power quality acquisition terminal according to claim 1, characterized in that, The signal conditioning module (11) includes: four voltage conditioning circuits and four current conditioning circuits; The input terminals of the four voltage conditioning circuits are respectively connected to the secondary side of the voltage transformer in the power grid signal acquisition equipment; the voltage conditioning circuits are used to perform voltage division, isolation and filtering on the received power grid voltage signal; The input terminals of the four current conditioning circuits are respectively connected to the secondary side of the current transformer in the power grid signal acquisition equipment; the current conditioning circuits are used to perform current conversion, voltage limiting and filtering processing on the received power grid current signal.

3. The power quality acquisition terminal according to claim 2, characterized in that, The current conditioning circuit includes: a first resistor, a second resistor, a third resistor, a first capacitor, and a first amplifier; The first end of the current transformer is connected to the first end of the first resistor, the second end of the first resistor is connected to the inverting input of the first amplifier, the second end of the current transformer is connected to the non-inverting input of the first amplifier, the inverting input of the first amplifier is connected to the first end of the second resistor and the first end of the third resistor, the second end of the second resistor is connected to the first end of the first capacitor, and the second end of the first capacitor and the second end of the third resistor are connected to the output of the first amplifier.

4. The power quality acquisition terminal of claim 2, wherein, The voltage conditioning circuit includes: a fourth resistor, a fifth resistor, a second capacitor, a first diode, a second diode, and a second amplifier; The first terminal of the voltage transformer is connected to the negative terminal of the first diode, the positive terminal of the second diode, and the inverting input terminal of the second amplifier. The second terminal of the voltage transformer is connected to the positive terminal of the first diode, the negative terminal of the second diode, and the non-inverting input terminal of the second amplifier. The inverting input terminal of the second amplifier is connected to the first terminal of the fourth resistor and the first terminal of the fifth resistor. The second terminal of the fourth resistor is connected to the first terminal of the second capacitor. The second terminal of the second capacitor and the second terminal of the fifth resistor are connected to the output terminal of the second amplifier.

5. The power quality acquisition terminal according to claim 4, characterized in that, The multi-channel synchronous acquisition module (13) includes: a multi-channel analog-to-digital converter module, a field-programmable gate array, and a high-speed serial computer expansion bus port; The input terminal of the multi-channel analog-to-digital converter module is connected to the output terminal of the signal conditioning module (11) to receive the conditioned analog power grid signal and synchronously convert it into a digital signal; The field-programmable gate array is connected to the output of the multi-channel analog-to-digital converter module and is used to perform convolutional interleaving processing on the digital signal output by the multi-channel analog-to-digital converter module and encapsulate the processed digital signal into an internal standard data frame. The high-speed serial computer expansion bus port is connected to the field programmable gate array and the terminal control module (14) respectively, and is used to transmit the internal standard data frame encapsulated by the field programmable gate array to the terminal control module (14) in real time.

6. The power quality acquisition terminal according to claim 5, characterized in that, The multi-channel analog-to-digital converter module includes: a multi-channel acquisition circuit and a multi-channel analog-to-digital converter; The input terminals of the multiple acquisition circuits are connected to the output terminals of the signal conditioning module (11), the output terminals of the acquisition circuits are respectively connected to the input terminals of the multi-channel analog-to-digital converter, and the output terminals of the multi-channel analog-to-digital converter are respectively connected to the field-programmable gate array.

7. The power quality acquisition terminal according to claim 6, characterized in that, The multi-channel analog-to-digital converter module includes: the acquisition circuit includes: a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, and a third amplifier; The first output terminal of the signal conditioning module (11) is connected to the inverting input terminal of the first channel of the third amplifier through the sixth resistor. The second output terminal of the signal conditioning module (11) is connected to the non-inverting input terminal of the first channel of the third amplifier through the seventh resistor. The inverting input terminal of the first channel of the third amplifier is connected to the output terminal of the first channel of the third amplifier through the eighth resistor. The output terminal of the first channel of the third amplifier is connected to the inverting input terminal of the second channel of the third amplifier through the ninth resistor. The non-inverting input terminal of the second channel of the third amplifier is grounded. The inverting input terminal of the second channel of the third amplifier is connected to the output terminal of the second channel of the third amplifier through the tenth resistor. The output terminal of the second channel of the third amplifier is connected to the analog-to-digital converter through the eleventh resistor.

8. The power quality acquisition terminal according to claim 7, characterized in that, The GPS timing module (12) includes: a GPS chip, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a third capacitor, a fourth capacitor, a first transistor, a second transistor, and an inductor; The reset port of the GPS chip is connected to the power supply through the twelfth resistor and grounded through the thirteenth resistor. The antenna power supply pin of the GPS chip is connected to the first end of the inductor and the first end of the third capacitor. The second end of the third capacitor is grounded. The second end of the inductor is connected to the first end of the fourteenth resistor, the first end of the fourth capacitor, and the first end of the second transistor. The second end of the fourteenth resistor and the second end of the fourth capacitor are connected to the first end of the fifteenth resistor and the power supply terminal. The second end of the fifteenth resistor is connected to the first end of the first transistor. The antenna detection port of the GPS chip is connected to the first end of the sixteenth resistor. The second end of the sixteenth resistor is connected to the second end of the second transistor and the first end of the seventeenth resistor. The second end of the seventeenth resistor is grounded. The control terminal of the second transistor is connected to the control terminal of the first transistor, the second end of the first transistor, and the first end of the eighteenth resistor. The second end of the eighteenth resistor is grounded.

9. The power quality acquisition terminal according to claim 8, characterized in that, The second pulse signal terminal and TXD terminal of the GPS chip are connected to the field programmable gate array (FPGA) to send the reference timestamp to the FPGA.

10. A power quality acquisition system characterized by, The power quality acquisition terminal includes any one of the power quality acquisition terminals described in claims 1-9, and further includes: a communication transmission unit, an external server, and a control and analysis unit; The communication transmission unit is connected to the power quality acquisition terminal and the external server, respectively, and the external server is connected to the control and analysis unit.

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