A power adjustable limiter capable of maintaining a limiting state
By adding a comparator and a PIN diode driver after the self-limiting circuit, combined with a signal hold circuit and a subsequent limiter, the problems of unadjustable limiting level and slow response speed are solved, achieving adjustable limiting level and improved response speed, while protecting the limiter from being burned out.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- SICHUAN JIULI MICROWAVE
- Filing Date
- 2025-08-22
- Publication Date
- 2026-07-31
AI Technical Summary
The current limiter's limiting level is not adjustable, which causes the receiving unit to burn out when high-power reflected signals are received. Furthermore, the slow response speed of the limiter may lead to signal leakage.
A comparator and a PIN diode driver are added after the detector tube of the self-limiting amplifier. The trigger state of the limiter is controlled by the signal holding circuit. A subsequent limiter is added after the switching limiter diode to process high-power signals. The reference voltage of the signal holding circuit and the comparator is controlled by the receiver's operating state.
It achieves adjustable limiting level, reduces the average power of the limiter and subsequent circuits, protects the limiter from burning out, and improves response speed.
Smart Images
Figure CN224583159U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of limiter technology, and more specifically to a power adjustable limiter that can maintain a limiting state. Background Technology
[0002] In modern communications, the transmitting and receiving units of communication equipment often share the same antenna. The two units are connected to a common terminal using a transceiver switch or circulator. Because the antenna is not an ideal component, the high-power signal generated by the transmitting unit cannot be completely radiated away; some high-power signal will be reflected back to the transmitter and enter the receiving unit. The antenna's standing wave ratio (SWR) is usually poor, resulting in high-power reflected signals. In severe cases, total reflection may even occur, causing excessive power input to the receiving unit and potentially burning out its components. Therefore, in practical applications, a limiter is typically installed at the front end of the receiving unit to prevent this from happening.
[0003] A typical passive amplitude limiter has the advantage of fast limiting response, but the power tolerance of the detector diode is fixed, and the limiting level of the limiter is fixed with the coupler design. Because the coupled signal is too small to drive the detector diode, the adjustable range of the limiting level is very small, and the accuracy is not high. Adding a comparator and PIN diode driver circuit after the detector in a passive amplitude limiter can form a passive amplitude limiter circuit. The limiting level of this circuit can be easily changed by altering the comparator's reference voltage, and the adjustment accuracy is relatively high. However, because this circuit requires multiple circuits for signal processing (detection, comparison, and driving), its limiting response speed is slow. When limiting pulse signals, signal leakage may occur. This leakage can lead to excessively high average power applied to the limiting diode in the subsequent stage limiter, causing the limiting diode to burn out, and ultimately, the limiter itself to burn out.
[0004] Therefore, in order to reduce the average power on the subsequent diodes, the limiter needs to be kept in the triggered limiting state for a period of time to reduce the average power on the limiting diodes in the subsequent limiter. Utility Model Content
[0005] To address the shortcomings of existing technologies, this utility model provides a power adjustable limiter that can maintain a limiting state, thereby solving the technical problem that existing limiters do not have adjustable limiting levels.
[0006] To achieve the above objectives, the present invention adopts the following technical solution:
[0007] This utility model provides a power adjustable limiter that can maintain a limiting state, comprising:
[0008] Coupler, comparator circuit, detector, signal holding circuit, driver circuit, switching limiting diode circuit, and subsequent limiting circuit; among which,
[0009] The input terminal of the coupler is connected to the radio frequency signal input terminal, the first output terminal of the coupler is connected to the first input terminal of the switching limiting diode circuit, and the second output terminal of the coupler is connected to the first input terminal of the signal holding circuit via a detector and a comparator circuit.
[0010] The second input terminal of the signal hold is connected to the signal input terminal of the receiver, and the output terminal of the signal hold is connected to the second input terminal of the switching limiting diode circuit via the driver circuit.
[0011] The output terminal of the switching limiting diode circuit is connected to the input terminal of the subsequent limiting circuit, and the output terminal of the subsequent limiting circuit is connected to the radio frequency signal output terminal.
[0012] Furthermore, the detector includes a Schottky diode, a first filter capacitor, and a first load resistor; wherein,
[0013] The anode of the Schottky diode is connected to the first output terminal of the coupler, and the cathode of the Schottky diode is connected to the input terminal of the comparator.
[0014] The first terminal of the first filter capacitor and the first terminal of the first load resistor are respectively connected to the cathode of the Schottky diode, and the second terminal of the first filter capacitor and the second terminal of the first load resistor are respectively grounded.
[0015] Furthermore, the comparator circuit includes a first voltage-dividing resistor, a second voltage-dividing resistor, a first voltage-regulating capacitor, and a comparator; wherein,
[0016] The first end of the first voltage divider resistor is connected to the reference signal input terminal, and the second end of the first voltage divider resistor is connected to the first input terminal of the comparator.
[0017] The first end of the second voltage divider resistor and the first end of the first voltage regulator capacitor are respectively connected to the second end of the first voltage divider resistor, and the second end of the second voltage divider resistor and the second end of the first voltage regulator capacitor are respectively grounded;
[0018] The second input terminal of the comparator is connected to the cathode of the Schottky diode, and the output terminal of the comparator is connected to the first input terminal of the signal hold circuit.
[0019] Furthermore, the driver circuit includes a PIN diode driver, a first signal stabilizing inductor, and a first signal stabilizing capacitor; wherein,
[0020] The anode of the PIN diode driver is connected to the output terminal of the signal holder, and the cathode of the PIN diode driver is connected to the first terminal of the first signal stabilizing inductor and the first terminal of the first signal stabilizing capacitor, respectively.
[0021] The second terminal of the first signal stabilizing inductor is connected to the second input terminal of the switching limiting diode circuit, and the second terminal of the first signal stabilizing capacitor is grounded.
[0022] Furthermore, the switching limiting diode circuit includes a first switching limiting diode, a second switching limiting diode, a first limiting capacitor, and a second limiting capacitor; wherein,
[0023] The first terminal of the first limiting capacitor is connected to the first output terminal of the coupler, and the second terminal of the first limiting capacitor is connected to the first terminal of the second limiting capacitor, forming a first signal path.
[0024] The anode of the first switching limiting diode is connected to node A of the first signal path, and the anode of the second switching limiting diode is connected to node B of the first signal path, forming a series structure; the cathodes of the first switching limiting diode and the second switching limiting diode are grounded respectively.
[0025] The second terminal of the first signal stabilizing inductor is connected to node B; the second terminal of the second limiting capacitor is connected to the input terminal of the subsequent limiting circuit.
[0026] Furthermore, the subsequent limiter includes a limiting signal input terminal, a first high reverse voltage limiting diode, a second high reverse voltage limiting diode, a first low trigger voltage limiting diode, and a second low trigger voltage limiting diode; wherein,
[0027] The anode of the first high reverse voltage limiting diode, the cathode of the second high reverse voltage limiting diode, the anode of the first low trigger voltage limiting diode, and the cathode of the second low trigger voltage limiting diode are connected in series to the second signal path between the limiting signal input terminal and the radio frequency signal output terminal.
[0028] The cathode of the first high reverse voltage limiting diode, the anode of the second high reverse voltage limiting diode, the cathode of the first low trigger voltage limiting diode, and the anode of the second low trigger voltage limiting diode are all grounded.
[0029] In summary, this utility model has the following beneficial effects:
[0030] This invention provides a power adjustable limiter capable of maintaining a limiting state. By adding a signal holding circuit between the comparator and the driver circuit, the limiter can maintain a triggered limiting state for a longer period, protecting the limiter itself and subsequent circuitry. The receiver's operating indication signal controls the operation of the signal holding circuit, ensuring the limiter promptly returns to an untriggered limiting state when the receiver is active. The transceiver controls the presence of the comparator's reference voltage, allowing the limiter to maintain the triggered limiting state for an extended period when needed. Furthermore, this invention adds a subsequent limiter after the switching limiting diode circuit to handle high-power signals leaking from the switching limiting diode circuit, as well as relatively low-power high-power signals. While maintaining the advantages of the original limiting diode, it provides adjustable limiting levels and reduces the damage caused by the slow response speed of the original limiting diode to the limiter itself and subsequent circuitry. Attached Figure Description
[0031] Figure 1 This is a schematic diagram showing high-power signal leakage originating from the limiter switch limiter stage;
[0032] Figure 2 This is a schematic diagram of the circuit module of the adjustable power limiter that can maintain the limiting state according to this utility model;
[0033] Figure 3 This is a schematic diagram of the limiting state of the power adjustable limiter of this utility model that can maintain the limiting state;
[0034] Figure 4 This is a circuit diagram of a limiter for L-band pulse radio frequency signals according to this utility model. Detailed Implementation
[0035] The present invention will be further described in detail below with reference to the accompanying drawings.
[0036] To make the objectives, solutions, and advantages of this utility model clearer, the following detailed description of this utility model is provided in conjunction with the embodiments and accompanying drawings. The illustrative embodiments and descriptions of this utility model are only used to explain this utility model and are not intended to limit this utility model.
[0037] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be apparent to those skilled in the art that these specific details are not necessary to implement the present invention. In other embodiments, well-known structures, circuits, materials, or methods are not specifically described in order to avoid obscuring the present invention.
[0038] The following is in conjunction with the appendix of this utility model. Figures 1-4 The embodiments of this utility model will be described in detail below.
[0039] Example 1:
[0040] Reference Figure 2 As shown, this embodiment provides a power adjustable limiter that can maintain a limiting state, including a coupler, a comparator circuit, a detector, a signal holding circuit, a driver circuit, a switching limiting diode circuit, and a subsequent limiter. The input terminal of the coupler is connected to the RF signal input terminal (i.e.,...). Figure 2 The first output of the coupler is connected to the first input of the switching limiting diode circuit (RFin terminal), and the second output of the coupler is connected to the first input of the signal holding circuit via a detector and a comparator circuit.
[0041] The second input terminal of the signal hold is connected to the signal input terminal of the receiver, and the output terminal of the signal hold is connected to the second input terminal of the switching limiting diode circuit via the driver circuit.
[0042] The output of the switching limiting diode circuit is connected to the input of the subsequent limiting circuit, and the output of the subsequent limiting circuit is connected to the RF signal output (i.e., Figure 2 (RFout end in the middle).
[0043] Specifically, adding a comparator and a PIN diode driver after the detector of a passive limiter can construct a passive limiter circuit. The limiting level of this circuit can be easily changed by altering the comparator's reference voltage, and the adjustment accuracy is relatively high. However, because this circuit requires multiple circuits for signal processing, including detection, comparison, and driving, its limiting response speed is relatively slow. When limiting pulse signals, issues such as… Figure 1 The signal leakage shown in the diagram can cause excessively high average power applied to the limiting diode in the subsequent limiting circuit, leading to the burning out of the limiting diode and consequently the burning out of the limiting circuit.
[0044] To reduce the average power on the subsequent diodes, the limiter needs to be kept in a triggered limiting state for a period of time to reduce the average power on the limiting diodes in the subsequent limiter. Therefore, this embodiment designs a power-adjustable limiter that can maintain the limiting state, aiming to reduce the average power of the RF signal leaking to the subsequent limiter while keeping the limiting level accurately adjustable. Specifically, based on the power-adjustable limiter, a signal holding circuit is added between the comparator and the PIN diode driver, allowing the limiter to remain in the triggered limiting state for a longer period to protect the limiter itself and the subsequent circuitry. The receiver's operating indication signal controls the operating state of the holding circuit, ensuring that the limiter can promptly return to the non-triggered limiting state when the receiver is operating. The transceiver controls the presence of the comparator's reference voltage, enabling the limiter to maintain the triggered limiting state for an extended period when needed.
[0045] Reference Figure 2As shown, the power adjustable limiter in this embodiment, which can maintain the limiting state, includes a coupler, a comparator circuit, a detector, a signal holding circuit (with controllable operating state), a driver circuit, a switching limiting diode circuit, and a subsequent limiter. Among them,
[0046] The coupler is used to extract the radio frequency signal on the main line of the limiter at a certain ratio, reduce the radio frequency signal to a suitable power and send it to the detector while minimizing the impact on the main line radio frequency signal.
[0047] The detector consists of a Schottky diode, a resistor, and a capacitor, and is used to detect the envelope and power of the mainline radio frequency signal.
[0048] The comparator circuit is used to compare the envelope and power information of the main line signal detected by the detector with the reference level to determine whether the limiter needs to enter the limiting state and to provide the limiting state judgment signal to the subsequent circuit.
[0049] The signal hold circuit has a controllable operating state, and its operation is controlled by the receiver's operating status signal. When it is not operating, there will be no signal output. When it is operating, it extends the limiting state of the comparator output to determine the signal duration and outputs it to the driver circuit and the switching limiting diode circuit to indicate the state of the switching limiting diode.
[0050] The driver circuit includes a PIN diode driver, which receives the indication signal output from the signal holder and provides the current and voltage to the switching limiting diode circuit to maintain conduction or cutoff.
[0051] Switching limiting diode circuits use high reverse voltage and low capacitance PIN diodes. Typically, multiple diodes are connected in parallel to the main signal line for limiting high-power signals.
[0052] The post-amplifier consists of a set of high reverse voltage limiting diodes and multiple medium and low reverse voltage limiting diodes connected in parallel. It is used to limit high-power RF signals and relatively low-power high-power signals leaking from the pre-amplifier and to determine the output level of the limiter.
[0053] In this embodiment, the high-power radio frequency signal is connected to the power adjustable limiter that can maintain the limiting state in this embodiment through the radio frequency signal input terminal labeled RFin. When passing through the coupler, the coupler collects the high-power radio frequency signal and converts it into a low-power radio frequency signal, which is then input to the detector. The detector detects the envelope and power of the main line signal and forms a video signal input comparator circuit. The comparator circuit compares the voltage of the video signal with a preset reference voltage that represents the limiting trigger power. This preset reference voltage can be adjusted according to the needs of the limiter, and the existence of the reference voltage is controlled by the transceiver, thereby realizing the change of the limiting level of the limiter. When the comparator circuit determines that the video signal voltage is greater than the preset reference voltage, it means that the power of the RF signal on the main line is greater than the limiting level. The comparator circuit then inputs a signal to the signal holder to trigger the limiting state. The enable terminal (i.e., the second input terminal) of the signal holder is connected to the receiver's operating status signal. When the receiver is in operating state, the output signal of the signal holder can be interrupted in time, causing the limiter to enter the non-triggered limiting state. When the system is in non-receiving state, the signal holder extends the duration of the trigger limiting state signal and inputs it to the PIN diode driver of the driver circuit. The PIN diode driver receives the trigger limiting state signal, generates the electrical signal required for the PIN diode to conduct, and inputs it to the switching limiting diode circuit to turn it on, thereby causing the limiter to enter the trigger limiting state and preventing high-power signals from entering the receiver.
[0054] Because the trigger time for the amplitude limiting state signal is extended, Figure 1 The situation in the middle has changed to Figure 3 This configuration effectively protects the limiter and subsequent circuits, reducing the average power load on the subsequent limiter. This embodiment allows adjustment of the limiter's limiting level and reduces potential damage to circuits and components caused by the limiter's slow response speed.
[0055] This embodiment uses a signal holding circuit with controllable operating state to extend the conduction time of the switching limiting diode. The first stage of the subsequent limiting circuit uses a high-voltage limiting diode, and the operating state of the signal holding circuit is controlled by the receiver's operating state, ensuring that the extended trigger function of the limiting circuit does not affect the receiver's reception. This embodiment maintains the advantages of traditional limiting circuits while providing adjustable limiting levels, reducing the damage to circuits and devices caused by the slow response speed of traditional limiting circuits.
[0056] Example 2: Refer to Figure 4 As shown, this embodiment provides a limiter circuit diagram that can handle L-band pulse radio frequency signals with a power of 500W, based on the circuit of embodiment 1 above.
[0057] In this embodiment, the signal input of the limiter is a coupler with a coupling degree of 45 dB, and R1 is the absorption resistor of the coupler; the radio frequency signal is transmitted along the direction from RFin to RFout, that is, the signal output end of the coupler is the end away from the resistor R1.
[0058] In this embodiment, refer to Figure 4 As shown, the detector includes a Schottky diode V1, a first filter capacitor C1, and a first load resistor R2. The anode of the Schottky diode V1 is connected to the first output terminal of the coupler, and the cathode of the Schottky diode V1 is connected to the input terminal of the comparator. The first terminal of the first filter capacitor C1 and the first terminal of the first load resistor R2 are respectively connected to the cathode of the Schottky diode V1, and the second terminals of the first filter capacitor C1 and the first load resistor R2 are respectively grounded. The diode V1 uses a Schottky diode for signal detection and has forward detection characteristics.
[0059] In this embodiment, refer to Figure 4 As shown, the comparator circuit includes a first voltage divider resistor R3, a second voltage divider resistor R4, a first voltage-regulating capacitor C2, and a comparator B1. The first terminal of the first voltage divider resistor R3 is connected to the reference signal input terminal, and the second terminal of the first voltage divider resistor R3 is connected to the first input terminal of the comparator B1. The first terminals of the second voltage divider resistor R4 and the first voltage-regulating capacitor C2 are respectively connected to the second terminals of the first voltage divider resistor R3, and the second terminals of the second voltage divider resistor R4 and the first voltage-regulating capacitor C2 are respectively grounded. The second input terminal of the comparator B1 is connected to the cathode of the Schottky diode V1, and the output terminal of the comparator B1 is connected to the first input terminal of the signal holding circuit.
[0060] Specifically, the comparator circuit acquires the video signal from the cathode of Schottky diode V1 as an input signal of comparator B1. The reference signal is controlled by the transceiver to be in a high-level state (voltage of +5V) and a low-level state (voltage of 0V) and is used to force the limiter to enter the trigger limiting state. The reference signal is connected to one end of the first voltage divider resistor R3. The first voltage divider resistor R3 and the second voltage divider resistor R4 divide the reference signal voltage. The comparator B1 acquires the signal at the connection point of the two resistors as the comparison reference voltage of the comparator. This voltage corresponds to the limiting level of the limiter.
[0061] In this embodiment, the limiter needs to use a switching limiting diode to limit the input signal power when it is greater than 90W. The first voltage divider resistor R3 and the second voltage divider resistor R4 set the comparison reference voltage of the input comparator B1 to the detection voltage corresponding to the RF signal power of 90W on the main line. The first voltage stabilizing capacitor C2 is used to stabilize the comparison reference voltage input to comparator B1. When the detection voltage is greater than the comparison reference voltage, the comparator outputs a high-level signal that enters the signal holding circuit.
[0062] In this embodiment, refer to Figure 4 As shown, the signal hold circuit has an in pin (corresponding to the first input terminal), an out pin (corresponding to the output terminal), an EN pin (corresponding to the second input terminal), and a Vcc pin. The Vcc pin is used to connect to an external power supply.
[0063] In this embodiment, refer to Figure 4 As shown, the driver circuit includes a PIN diode driver, a first signal stabilizing inductor C5, and a first signal stabilizing capacitor L1; wherein,
[0064] The anode of the PIN diode driver is connected to the output terminal of the signal holder, and the cathode of the PIN diode driver is connected to the first terminal of the first signal stabilizing inductor L1 and the first terminal of the first signal stabilizing capacitor C5, respectively.
[0065] The second terminal of the first signal stabilizing inductor L1 is connected to the second input terminal of the switching limiting diode circuit, and the second terminal of the first signal stabilizing capacitor C5 is grounded.
[0066] The specific signal holding circuit's enable interface (EN pin) receives the receiver's operating status signal, which controls whether the signal holding circuit operates, forcing the limiter into an untriggered limiting state. The signal holding circuit extends the comparator output signal duration from a length similar to the RF signal pulse width to a length covering several pulse cycles, and inputs this to the PIN diode driver in the driver circuit. When the PIN diode driver's input signal is high, the driver circuit outputs a positive voltage, providing conduction current to the switching limiting diode, causing it to conduct and the limiter to enter the triggered limiting state. When the PIN diode driver's input signal is low, the driver circuit outputs a negative voltage, keeping the switching limiting diode off, and the limiter's switching limiting diode enters the untriggered limiting state. The first signal stabilizing capacitor C5 and the first signal stabilizing inductor L1 in the driver circuit are used to stabilize the drive signal and isolate the RF signal on the main line from the driver.
[0067] In this embodiment, refer to Figure 4 As shown, the switching limiting diode circuit includes a first switching limiting diode V2, a second switching limiting diode V3, a first limiting capacitor C3, and a second limiting capacitor C4. The first terminal of the first limiting capacitor C3 is connected to the first output terminal of the coupler, and the second terminal of the first limiting capacitor C3 is connected to the first terminal of the second limiting capacitor C4, forming a first signal path. Specifically, the first signal path is part of the main circuit between the RFin and RFout terminals.
[0068] The anode of the first switching limiting diode V2 is connected to node A of the first signal path, and the anode of the second switching limiting diode V3 is connected to node B of the first signal path, forming a series structure. The cathodes of the first switching limiting diode V2 and the second switching limiting diode V3 are grounded respectively; the second terminal of the first signal stabilizing inductor L1 is connected to node B. Figure 4 (The circuit shown is connected between node A and node B); the second terminal of the second limiting capacitor C4 is connected to the input terminal of the subsequent limiting circuit. In this embodiment, the switching limiting diode circuit is used to process high-power radio frequency signals.
[0069] In this embodiment, refer to Figure 4 As shown, the post-amplifier includes a limiting signal input terminal, a first high reverse voltage limiting diode V4, a second high reverse voltage limiting diode V5, a first low trigger voltage limiting diode V6, and a second low trigger voltage limiting diode V7. The anode of the first high reverse voltage limiting diode V4, the cathode of the second high reverse voltage limiting diode V5, the anode of the first low trigger voltage limiting diode V6, and the cathode of the second low trigger voltage limiting diode V7 are connected in series to a second signal path between the limiting signal input terminal and the RF signal output terminal. This second signal path is specifically part of the main circuit between the RFin and RFout terminals. The cathodes of the first high reverse voltage limiting diode V4, the anodes of the second high reverse voltage limiting diode V5, the cathodes of the first low trigger voltage limiting diode V6, and the anodes of the second low trigger voltage limiting diode V7 are all grounded.
[0070] In this embodiment, the post-stage limiter is used to process high-power signals leaked from the switching limiter diodes and high-power signals with relatively low power. The low-trigger-voltage limiter diodes V6 and V7 determine the maximum output signal power of the limiter.
[0071] Based on the above circuit structure, this embodiment maintains the advantages of the inherent limiting limiter while providing adjustable limiting level and reducing the damage to circuits and devices caused by the slow response speed of the inherent limiting limiter.
[0072] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of this utility model. It should be understood that the above description is only a specific embodiment of this utility model and is not intended to limit the scope of protection of this utility model. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this utility model should be included within the scope of protection of this utility model.
Claims
1. A power adjustable limiter capable of maintaining a limiting state, characterized by, include: Coupler, comparator circuit, detector, signal holding circuit, driver circuit, switching limiting diode circuit, and subsequent limiting circuit; among which, The input terminal of the coupler is connected to the radio frequency signal input terminal, the first output terminal of the coupler is connected to the first input terminal of the switching limiting diode circuit, and the second output terminal of the coupler is connected to the first input terminal of the signal holding circuit via a detector and a comparator circuit. The second input terminal of the signal hold is connected to the signal input terminal of the receiver, and the output terminal of the signal hold is connected to the second input terminal of the switching limiting diode circuit via the driver circuit. The output terminal of the switching limiting diode circuit is connected to the input terminal of the subsequent limiting circuit, and the output terminal of the subsequent limiting circuit is connected to the radio frequency signal output terminal.
2. The power adjustable limiter capable of maintaining a limited state according to claim 1, wherein: The detector includes a Schottky diode, a first filter capacitor, and a first load resistor; wherein... The anode of the Schottky diode is connected to the first output terminal of the coupler, and the cathode of the Schottky diode is connected to the input terminal of the comparator. The first terminal of the first filter capacitor and the first terminal of the first load resistor are respectively connected to the cathode of the Schottky diode, and the second terminal of the first filter capacitor and the second terminal of the first load resistor are respectively grounded.
3. The power-tunable limiter of claim 1, wherein: The comparator circuit includes a first voltage-dividing resistor, a second voltage-dividing resistor, a first voltage-regulating capacitor, and a comparator; wherein... The first end of the first voltage divider resistor is connected to the reference signal input terminal, and the second end of the first voltage divider resistor is connected to the first input terminal of the comparator. The first end of the second voltage divider resistor and the first end of the first voltage regulator capacitor are respectively connected to the second end of the first voltage divider resistor, and the second end of the second voltage divider resistor and the second end of the first voltage regulator capacitor are respectively grounded; The second input terminal of the comparator is connected to the cathode of the Schottky diode, and the output terminal of the comparator is connected to the first input terminal of the signal hold circuit.
4. The power-tunable limiter of claim 1, wherein: The driver circuit includes a PIN diode driver, a first signal stabilizing inductor, and a first signal stabilizing capacitor; wherein... The anode of the PIN diode driver is connected to the output terminal of the signal holder, and the cathode of the PIN diode driver is connected to the first terminal of the first signal stabilizing inductor and the first terminal of the first signal stabilizing capacitor, respectively. The second terminal of the first signal stabilizing inductor is connected to the second input terminal of the switching limiting diode circuit, and the second terminal of the first signal stabilizing capacitor is grounded.
5. The power-tunable limiter of claim 1, wherein: The switching limiting diode circuit includes a first switching limiting diode, a second switching limiting diode, a first limiting capacitor, and a second limiting capacitor; wherein... The first terminal of the first limiting capacitor is connected to the first output terminal of the coupler, and the second terminal of the first limiting capacitor is connected to the first terminal of the second limiting capacitor, forming a first signal path. The anode of the first switching limiting diode is connected to node A of the first signal path, and the anode of the second switching limiting diode is connected to node B of the first signal path, forming a series structure; the cathodes of the first switching limiting diode and the second switching limiting diode are grounded respectively. The second terminal of the first signal stabilizing inductor is connected to node B; the second terminal of the second limiting capacitor is connected to the input terminal of the subsequent limiting circuit.
6. The power-tunable limiter of claim 1, wherein: The subsequent limiter includes a limiting signal input terminal, a first high reverse voltage limiting diode, a second high reverse voltage limiting diode, a first low trigger voltage limiting diode, and a second low trigger voltage limiting diode; wherein... The anode of the first high reverse voltage limiting diode, the cathode of the second high reverse voltage limiting diode, the anode of the first low trigger voltage limiting diode, and the cathode of the second low trigger voltage limiting diode are connected in series to the second signal path between the limiting signal input terminal and the radio frequency signal output terminal. The cathode of the first high reverse voltage limiting diode, the anode of the second high reverse voltage limiting diode, the cathode of the first low trigger voltage limiting diode, and the anode of the second low trigger voltage limiting diode are all grounded.