Surface-mounted digital isolator

Abstract

This invention provides a surface-mount digital isolator, comprising three encapsulated bodies A, B, and C stacked sequentially from bottom to top; each encapsulated body is made of the same or similar material; encapsulated body A encapsulates a first pad and a second pad; encapsulated body B encapsulates a first coupling circuit; encapsulated body C encapsulates a second coupling circuit corresponding vertically to the first coupling circuit, a wire bonding pad connected to the first coupling circuit, a wire bonding pad connecting to the first pad, a wire bonding pad connecting to the second pad, a first chip, and a second chip; the wire bonding pad connected to the first coupling circuit, the first chip, and the wire bonding pad connecting to the first pad are sequentially connected by bonding wires, and the second coupling circuit, the second chip, and the wire bonding pad connecting to the second pad are sequentially connected by bonding wires. This surface-mount digital isolator significantly improves isolation performance and has a simpler packaging process and lower cost.

Description

Technical Field

[0001] This utility model relates to the field of isolation transmission technology, specifically to a surface-mounted digital isolator. Background Technology

[0002] A digital isolator is an electronic device that uses isolation technologies such as radio frequency, electromagnetic, optical, or capacitive isolation to enable the transmission of digital signals in an electrically isolated state. Its core function is to block high voltage surges and ground loop interference while maintaining the integrity and transmission rate of digital signals.

[0003] Integrating isolation bands simply and effectively into digital isolation chips has always been a key technology for digital isolation devices. With the continuous development of packaging technology and its increasing flexibility, integrating isolation bands into the package has become a major research direction. Currently, there are three main solutions:

[0004] like Figure 1A The image shows the first type of integrated packaging isolation strip method. It involves mounting a substrate (Substrate) onto the leadframe. Figure 1A The green block in the image uses the middle plate of the substrate as an isolation strip, with metal layers on both sides ( Figure 1A The yellow blocks in the diagram are designed into corresponding coupling patterns according to the coupling method using layout technology (e.g., magnetic coupling is designed as a planar coil, capacitive coupling is designed as a capacitor board, and RF coupling is designed as an antenna layout, etc.); then they are connected to the die by wire bonding; finally, they are encapsulated with high dielectric strength EMC material to form an integrated isolation band SOP package solution.

[0005] The first type of encapsulation and isolation band method described above has the following significant drawbacks:

[0006] 1. The substrate overlapped with the leadframes on both sides of the isolation layer, resulting in a heterogeneous interface inside the chip package. Figure 1A The red line in the image introduces the risk of creepage inside the package, making it difficult to achieve high voltage withstand performance.

[0007] 2. The substrate mounting process is not a conventional process and requires investment in development, which will increase packaging costs;

[0008] 3. The complex packaging structure introduces higher reliability risks;

[0009] like Figure 1B As shown, this is the second type of packaging integration isolation strip method. It integrates the substrate substrate (… Figure 1BThe green block (in the image) is placed entirely on one side of the leadframe and then connected to the other side of the leadframe, which is isolated from it, via wire bonding. While this avoids the risk of internal creepage within the package, the limited substrate thickness, typically around 200µm, still makes it difficult to achieve high voltage withstand performance.

[0010] like Figure 1C As shown, this is the third type of integrated isolation strip packaging. It uses a leadframe to fabricate a simple coil shape, and then wire-bonding connects the coil to the die, forming a complete coil coupling structure to achieve magnetic coupling isolation. This method has the advantages of simple manufacturing and low cost, but its disadvantages are also obvious. Limited by the leadframe process, this method can only manufacture very simple coil structures; this results in very weak coupling signals, requiring highly reliable signal detection technology to achieve good coupling transmission; it is also easily affected by noise; furthermore, this technology is currently monopolized by foreign patents.

[0011] In conclusion, it is necessary to develop a novel in-package isolation band integration solution to simultaneously solve all the aforementioned technical problems and achieve a breakthrough in the development of domestically produced digital isolation devices. Utility Model Content

[0012] The technical problem to be solved by this utility model is to provide a brand-new surface-mount digital isolator that can not only significantly improve isolation performance, but also has a simpler packaging process and lower cost.

[0013] To solve the above-mentioned technical problems, the technical solution adopted by this utility model is as follows:

[0014] A surface-mount digital isolator includes a molding compound A, a molding compound B, and a molding compound C stacked sequentially from bottom to top; the molding compounds A, B, and C are made of the same or similar molding materials.

[0015] The molding compound A encapsulates a first Pad on a first isolation side and a second Pad on a second isolation side; the molding compound B encapsulates a first coupling circuit; the molding compound C encapsulates a second coupling circuit corresponding to the first coupling circuit in the vertical direction, a wire bonding Pad connected to the first coupling circuit, a wire bonding Pad connected to the first Pad, a wire bonding Pad connected to the second Pad, a first chip on the first isolation side, and a second chip on the second isolation side; the wire bonding Pad connected to the first coupling circuit, the first chip, and the wire bonding Pad connected to the first Pad are sequentially connected by bonding wires, and the second coupling circuit, the second chip, and the wire bonding Pad connected to the second Pad are sequentially connected by bonding wires.

[0016] Optionally, the wire bonding pad connected to the first pad and the wire bonding pad connected to the second pad are integral through-hole pad structures that connect the upper surface of the molding compound B to the corresponding pad on the molding compound A.

[0017] Optionally, the encapsulated body B also encapsulates two conductive posts corresponding to the first Pad and the second Pad, respectively. One end of the conductive post is connected to the corresponding Pad in the encapsulated body A, and the other end is connected to the corresponding wire bonding Pad located on the upper surface of the encapsulated body B.

[0018] Optionally, the first coupling circuit and the second coupling circuit are a double-layer coupling structure;

[0019] The encapsulation body B specifically includes encapsulation bodies B1, B2, and B3 stacked sequentially from bottom to top; the encapsulation bodies B1, B2, and B3 are made of the same or similar encapsulation material as the encapsulation body A; the first layer structure and the second layer structure of the first coupling circuit are respectively encapsulated in the encapsulation bodies B1 and B2; the first layer structure of the second coupling circuit corresponding to the first coupling circuit in the vertical direction is encapsulated in the encapsulation body B3.

[0020] The encapsulated body C contains the second layer structure of the second coupling circuit.

[0021] Optionally, it also includes through-holes in the first coupling circuit and through-holes in the second coupling circuit; the first layer structure and the second layer structure of the first coupling circuit are connected through through-holes; the first layer structure and the second layer structure of the second coupling circuit are connected through through-holes.

[0022] Optionally, the first coupling circuit and the second coupling circuit are N-layer structures, where N is an integer greater than or equal to 3;

[0023] The encapsulation body B specifically comprises 2N-1 layers of encapsulation bodies Ba stacked sequentially from bottom to top; the encapsulation materials of the 2N-1 layers of encapsulation bodies Ba and the encapsulation body A are the same or similar.

[0024] The 2N-1 layer encapsulation Ba encapsulates each of the first coupling circuit and each other layer structure in the second coupling circuit except for the top layer structure of the second coupling circuit.

[0025] The encapsulated component C encapsulates the topmost structure of the second coupling circuit.

[0026] Optionally, it also includes vias for the first coupling circuit and vias for the second coupling circuit; the upper and lower layers of the first coupling circuit are connected through vias; the upper and lower layers of the second coupling circuit are connected through vias.

[0027] Optionally, the wire bonding pad connected to the first pad and the wire bonding pad connected to the second pad are integral through-hole pad structures that connect the molding compound C to the corresponding pad on the molding compound A.

[0028] Optionally, two conductive posts corresponding to the first Pad and the second Pad are also encapsulated between the encapsulation body A and the encapsulation body C. One end of the conductive post is connected to the corresponding Pad in the encapsulation body A, and the other end is connected to the corresponding wire bonding Pad in the encapsulation body C.

[0029] Optionally, the first coupling circuit and the second coupling circuit are both capacitive coupling circuits, radio frequency coupling circuits, or coil magnetic coupling circuits including at least three turns of coil.

[0030] The beneficial effects of this utility model are as follows: The surface-mount digital isolator provided by this utility model is composed of multiple layers of plastic encapsulated bodies of the same or similar materials stacked together, and the isolating band is formed directly by the natural formation of the encapsulation material. It eliminates the need for a "traditional substrate" and "lead frame" structure, enabling processing precision that lead frame technology cannot achieve, allowing for more complex circuit pattern designs, thereby improving signal coupling strength and enhancing signal transmission stability. Furthermore, it fundamentally solves the heterogeneous interface problem, eliminates creepage risks, and reduces the overall thickness, easily achieving higher isolation withstand voltage performance. More importantly, this utility model is entirely based on traditional packaging technology, offering advantages such as a simpler structure and process, and lower manufacturing costs. Attached Figure Description

[0031] Figure 1A This is a schematic diagram of a digital isolator manufactured using the first encapsulation and integration isolation strip method in the prior art;

[0032] Figure 1B This is a schematic diagram of a digital isolator manufactured using the second packaging integration isolation strip method in the prior art;

[0033] Figure 1C This is a schematic diagram of a digital isolator manufactured using the third packaging and integration isolation strip method in the prior art;

[0034] Figure 2 This is a schematic diagram of the structure of a surface-mount digital isolator provided in Embodiment 1 of this utility model;

[0035] Figure 3 This is a schematic diagram of the radio frequency coupling circuit implemented based on Embodiment 1 of this utility model;

[0036] Figure 4 This is a schematic diagram of the coil coupling circuit implemented based on Embodiment 1 of this utility model;

[0037] Figure 5 This is a schematic diagram of a digital isolator with a dual-layer coupling structure provided in Embodiment 2 of this utility model;

[0038] Figure 6 This is a schematic diagram of the structure of the dual-layer radio frequency coupling circuit implemented based on Embodiment 2 of this utility model;

[0039] Figure 7 This is a schematic diagram of the structure of the double-layer coil coupling circuit implemented based on Embodiment 2 of this utility model;

[0040] Figure 8 This is a schematic diagram of a surface-type digital isolator with a coupling structure of three or more layers, provided in Embodiment 3 of this utility model;

[0041] Figure 9 This is a schematic diagram of the structure of the three-layer radio frequency coupling circuit implemented based on Embodiment 3 of this utility model;

[0042] Figure 10 This is a schematic diagram of the structure of the three-layer coil coupling circuit implemented based on Embodiment 3 of this utility model.

[0043] Figure 11 This is a schematic flowchart of a manufacturing method for a surface-mount digital isolator based on Embodiment 1.

[0044] Figure 12 This is a schematic diagram of the manufacturing process of a surface-mount digital isolator based on Embodiment 1.

[0045] Figure 13 This is a schematic flowchart of a manufacturing method for a surface-mount digital isolator with a dual-layer coupling structure based on Embodiment 2.

[0046] Figure 14 This is a flowchart illustrating a method for manufacturing a surface-coupled digital isolator with a three- or more-layer coupling structure, based on a specific implementation of Embodiment 3. Detailed Implementation

[0047] To explain in detail the technical content, objectives, and effects of this utility model, the following description is provided in conjunction with the embodiments and accompanying drawings.

[0048] Explanation of technical terms:

[0049] A surface-mount digital isolator refers to a digital isolator with an isolation coupling structure designed to be vertically aligned; the middle is an isolation strip, with two coupling circuits located above and below the isolation strip, respectively.

[0050] The carrier board, in this article, refers to the flat plate structure used to provide support for the processing of the substrate circuit during the packaging process. It will be separated from the substrate after the substrate processing is completed.

[0051] RDL, or Redistribution Layer, refers to the metal wiring formed on the surface of a packaging substrate (specifically, the molding compound in this invention) using electroplating processes to redesign signal transmission paths and power distribution. Through RDL, signal pins can be distributed to different locations on the substrate, providing connectivity to target components, thereby achieving efficient integration and reducing device size. Specifically, the appendix in this invention... Figures 2 to 14 All yellow blocks are implemented using the RDL. The coupling circuit part of this utility model uses RDL technology to complete the circuit pattern processing, and is not limited to wiring processing.

[0052] In this invention, "layout" refers to the arrangement and connection of components on a packaging substrate. Specifically, different patterns are formed by microstrip lines according to different design requirements. For example, a planar metal plate can be used to implement a capacitive coupling scheme, a planar coil can be used to implement a magnetic coupling scheme, and an RF antenna can be used to implement a wireless isolation scheme.

[0053] Pad, or solder pad, is a metallized structural component used for electrical connections.

[0054] Chip bonding refers to the manufacturing process of precisely mounting a chip onto a packaging substrate using mechanical fixing or chemical bonding methods to achieve electrical connection, physical support, and heat dissipation functions.

[0055] Wire bonding uses metal wires to achieve electrical interconnection between the wafer, frame, and substrate.

[0056] Molding materials refer to high dielectric strength EMC materials; the interface formed by molding the same or similar molding materials (with similar composition and particle size) can be completely fused.

[0057] Example 1

[0058] This embodiment provides a surface-mount digital isolator with a single-layer coupled structure.

[0059] like Figure 2 As shown, the surface-mount digital isolator with a single-layer coupling structure in this embodiment includes encapsulated bodies A, B, and C stacked sequentially from bottom to top; the encapsulating materials of encapsulated bodies A, B, and C are the same or similar.

[0060] The molding compound A contains a first pad corresponding to the first isolation side and a second pad corresponding to the second isolation side. Specifically, the first pad and the second pad are positioned close to the lower surface of the molding compound A, serving as the bottom pads of the finished molding compound.

[0061] The molding compound B contains a first coupling circuit. Specifically, the first coupling circuit is located on the upper surface of the molding compound A and is encapsulated within the molding compound B.

[0062] The encapsulation body C encapsulates a second coupling circuit corresponding vertically to the first coupling circuit, a wire bonding pad connected to the first coupling circuit, a wire bonding pad connected to the first pad (hereinafter referred to as the first wire bonding pad), a wire bonding pad connected to the second pad (hereinafter referred to as the second wire bonding pad), a first chip on the first isolation side, and a second chip on the second isolation side. The wire bonding pad, the first chip, and the first wire bonding pad connected to the first coupling circuit are sequentially connected by bonding wires, and the second coupling circuit, the second chip, and the second wire bonding pad are also sequentially connected by bonding wires. Specifically, the second coupling circuit, the wire bonding pad connected to the first coupling circuit, the first wire bonding pad, the second wire bonding pad, the first chip, and the second chip are all disposed on the upper surface of the encapsulation body B and encapsulated within the encapsulation body C.

[0063] In some specific embodiments, the first and second wire bonding pads are integrated through-hole pad structures that connect the upper surface of the molding compound B to the corresponding pads in the molding compound A. One end of the pad is connected to the corresponding pad in the molding compound A, while the other end is exposed on the upper surface of the molding compound B, so that the conductive lines of the first and second pads can be led out to the upper surface of the molding compound B, respectively, facilitating subsequent wire bonding connections. This design method has the advantage of simpler processing and manufacturing.

[0064] In some other embodiments, two conductive posts corresponding to the first Pad and the second Pad are also encapsulated in the molding compound B. One end of each conductive post is connected to the corresponding Pad encapsulated in the molding compound A, and the other end is connected to the corresponding wire bonding Pad located on the upper surface of the molding compound B. Here, the connection between the conductive posts, serving as the bottom pad Pad and the wire bonding Pad, facilitates subsequent wire bonding connections.

[0065] In some specific embodiments, both the first coupling circuit and the second coupling circuit are capacitive coupling circuits or radio frequency coupling circuits (e.g., Figure 3 (as shown) or a coil magnetic coupling circuit including at least three turns of coil (such as...) Figure 4 (As shown).

[0066] Where both the first coupling circuit and the second coupling circuit are coil magnetic coupling circuits, such as Figure 4 As shown, a single coil coupling circuit can include at least three turns of coil. Compared to traditional coil magnetic coupling digital isolators, which are limited by lead frame technology and can only be manufactured with a very simple two-turn coil structure, the surface-mount digital isolator based on coil magnetic coupling in this embodiment can include at least three turns of coil. Therefore, the surface-mount digital isolator based on coil magnetic coupling provided in this embodiment can significantly improve both the isolation coil coupling capability and mutual inductance strength.

[0067] The single-layer coupled surface-type digital isolator provided in this embodiment, such as... Figure 2 As shown, the substrate function is directly implemented in the molding compound A; surface-mount isolation related circuits are arranged in the molding compounds B and C. The whole is composed of three molding compounds of the same or similar material stacked together, and an isolation zone can be naturally formed between the first coupling circuit and the second coupling circuit through the molding compound B.

[0068] It is understood that the single-layer coupling structure of the surface-mount digital isolator provided in this embodiment eliminates the need for both the "traditional substrate" and the "lead frame" structure. This not only allows for more complex coupling circuit pattern designs on the molded surface, thereby improving signal coupling strength and enhancing signal transmission stability; but also enables complete fusion of the interfaces between the molded components, fundamentally solving the heterogeneous interface problem and eliminating creepage risks; simultaneously, it maintains the integrity of the isolation band; furthermore, it reduces the overall package thickness. Therefore, the surface-mount digital isolator provided in this embodiment can easily achieve excellent isolation withstand voltage and package reliability. In addition, since it can be implemented entirely based on traditional packaging processes, it also has advantages such as a simpler structure and manufacturing process, and lower manufacturing costs.

[0069] Example 2

[0070] This embodiment is a further extension of the above embodiment one, providing a surface-type digital isolator with a two-layer coupling structure.

[0071] like Figure 5 As shown, the surface-mount digital isolator with a dual-layer coupling structure in this embodiment includes encapsulated bodies A, B1, B2, B3, and C stacked sequentially from bottom to top; the encapsulating materials of encapsulated bodies A, B1, B2, B3, and C are the same or similar.

[0072] The molding compound A includes a first pad corresponding to the first isolation side and a second pad corresponding to the second isolation side. Specifically, the first pad and the second pad are positioned near the lower surface of the molding compound A, serving as the bottom pads of the finished molding compound.

[0073] The encapsulation bodies B1 and B2 respectively encapsulate a first layer structure and a second layer structure of the first coupling circuit. Specifically, the first layer structure of the first coupling circuit is disposed on the upper surface of the encapsulation body A and encapsulated in the encapsulation body B1; the second layer structure of the first coupling circuit is disposed on the upper surface of the encapsulation body B1 and encapsulated in the encapsulation body B2.

[0074] The encapsulation body B3 encapsulates a first layer structure of a second coupling circuit that corresponds to the first coupling circuit in the vertical direction. Specifically, the first layer structure of the second coupling circuit is disposed on the upper surface of the encapsulation body B2 and encapsulated within the encapsulation body B3.

[0075] The encapsulation body C encapsulates the second layer structure of the second coupling circuit, a wire bonding pad connected to the second layer structure of the first coupling circuit, a wire bonding pad connected to the first pad (hereinafter referred to as the first wire bonding pad), a wire bonding pad connected to the second pad (hereinafter referred to as the second wire bonding pad), a first chip on the first isolation side, and a second chip on the second isolation side. The wire bonding pad connected to the first coupling circuit, the first chip, and the first wire bonding pad are sequentially connected by bonding wires, and the second coupling circuit, the second chip, and the first wire bonding pad are also sequentially connected by bonding wires. Specifically, the second layer structure of the second coupling circuit, the wire bonding pad connected to the first coupling circuit, the first wire bonding pad, the second wire bonding pad, the first chip, and the second chip are all disposed on the upper surface of the encapsulation body B3 and encapsulated within the encapsulation body C.

[0076] In some specific implementations, the circuit patterns of each layer in the first coupling circuit and the second coupling circuit can be different or the same, depending on the design requirements of the coupling circuit.

[0077] In some specific embodiments, if, based on the design requirements of the coupling circuit, the first layer structure in the first coupling circuit and the second coupling circuit needs to be connected to the second layer structure, then the molding compound B1 also has a through-hole for connecting the first layer structure and the second layer structure in the first coupling circuit; the molding compound B3 also has a through-hole for connecting the first layer structure and the second layer structure in the second coupling circuit. That is, the first layer structure and the second layer structure of the first coupling circuit are connected through a through-hole; the first layer structure and the second layer structure of the second coupling circuit are connected through a through-hole.

[0078] In some specific embodiments, the first and second wire bonding pads are integrated through-hole pad structures that connect the upper surface of the molding compound B3 to the corresponding pads in the molding compound A. One end of the pad is connected to the corresponding pad in the molding compound A, while the other end is exposed on the upper surface of the molding compound B3, so that the conductive lines of the first and second pads can be led out to the upper surface of the molding compound B3, respectively, facilitating subsequent wire bonding connections. This design method has the advantage of simpler processing and manufacturing.

[0079] In some other embodiments, conductive posts that connect the first Pad and the second Pad are also encapsulated between the encapsulation bodies A and C, that is, in the encapsulation bodies B1, B2 and B3.

[0080] As a specific example, the conductive post corresponding to the first pad between molded bodies A and C is a one-piece through-hole pad structure; the conductive post corresponding to the second pad between molded bodies A and C is also a one-piece through-hole pad structure. One end of the conductive post is connected to the corresponding pad in molded body A, and the other end is connected to the corresponding wire bonding pad located in molded body C.

[0081] As another specific example, conductive posts penetrating the corresponding first and second isolation sides of encapsulated bodies B1, B2, and B3 are respectively encapsulated. Specifically, one end of the conductive post in encapsulated body B1 is connected to the corresponding pad, and the other end is exposed on the upper surface of encapsulated body B2; one end of the conductive post in encapsulated body B2 is connected to the corresponding conductive post in encapsulated body B1, and the other end is connected to the corresponding wire bonding pad on the upper surface of encapsulated body B3.

[0082] Here, conductive lines of the first and second pads, which serve as bottom solder pads, are led out to the upper surface of the molding compound B3 via conductive posts to facilitate subsequent bonding wire connections.

[0083] In some specific embodiments, the first coupling circuit and the second coupling circuit can both be capacitive coupling circuits designed for a two-layer structure; or both be radio frequency coupling circuits designed for a two-layer structure (such as...). Figure 6 (as shown); or simultaneously, a coil magnetic coupling circuit designed for a double-layer structure including at least three turns of coil (such as...). Figure 7 (As shown).

[0084] In particular, the surface-mount digital isolator provided in this embodiment not only has the following features: Figure 7The double-layer coil coupling structure is shown; moreover, a single-layer coil coupling structure can include at least three turns of coil. Compared with traditional coil magnetic coupling isolators, this embodiment has more turns of coil and more layers of coupling structure. Therefore, not only can the coupling capability and mutual inductance of the isolation coil be significantly improved, but also, due to the magnetic coupling between the main coil and the secondary coil, it has higher induction efficiency, lower crosstalk noise, and better heat dissipation performance.

[0085] The surface-mount digital isolator with a dual-layer coupling structure provided in this embodiment, such as... Figure 5 As shown, the substrate function is directly realized by the molding compound; the two coupling circuits have a double-layer structure, and a total of four layers are stacked on the upper surface of different layers of the molding compound, and encapsulated in molding compounds B1 to C; the whole is composed of five molding compounds of the same or similar material, which can naturally form an isolation zone between the first coupling circuit and the second coupling circuit of the double-layer structure.

[0086] It is understood that the surface-mount digital isolator with a dual-layer coupling structure provided in this embodiment eliminates the need for both the "traditional substrate" and the "lead frame" structure. It not only possesses all the beneficial effects of the surface-mount digital isolator with a single-layer coupling structure provided in Embodiment 1 (which will not be elaborated here; please refer to Embodiment 1 for details), but also, based on its dual-layer coupling structure, offers advantages such as enhanced electrical isolation strength and safety, optimized anti-interference performance (reducing parasitic capacitance between isolation layers and lowering common-mode noise through layered layout), support for bidirectional signal transmission and functional integration, and a balance between performance and size (layered design facilitates volume reduction and enables higher insulation levels).

[0087] Example 3

[0088] This embodiment is a further extension of the above embodiment one or embodiment two, providing a surface-type digital isolator with a three-layer or higher coupling structure.

[0089] like Figure 8 As shown, the surface-mount digital isolator with an N (greater than or equal to 3) layer coupling structure in this embodiment includes a molding compound A, a 2N-1 layer molding compound Ba, and a molding compound C stacked sequentially from bottom to top; the molding materials of the molding compounds A, Ba, and C stacked sequentially from bottom to top are the same or similar.

[0090] The molding compound A contains a first pad corresponding to the first isolation side and a second pad corresponding to the second isolation side. Specifically, the first pad and the second pad are positioned close to the lower surface of the molding compound A, serving as the bottom pads of the finished molding compound.

[0091] The 2N-1 layer encapsulation Ba encapsulates each of the first and second coupling circuits except for the topmost structure of the second coupling circuit, and also encapsulates a Pad that connects to the first Pad and the second Pad respectively. Specifically, each layer is disposed on the upper surface of the next layer of encapsulation below its corresponding encapsulation. For example, the first layer of the first coupling circuit is disposed on the upper surface of encapsulation A and encapsulated in the first layer encapsulation Ba; the second layer of the first coupling circuit is disposed on the upper surface of the first layer encapsulation Ba and encapsulated in the second layer encapsulation Ba; and so on.

[0092] The encapsulation body C encapsulates the top layer structure of the second coupling circuit, a wire bond Pad connected to the top layer structure of the first coupling circuit, a wire bond Pad connected to the first Pad (hereinafter referred to as the first wire bond Pad), a wire bond Pad connected to the second Pad (hereinafter referred to as the second wire bond Pad), a first chip on the first isolation side, and a second chip on the second isolation side. The wire bond Pad connected to the top layer structure of the first coupling circuit, the first chip, and the first wire bond Pad are sequentially connected by bonding wires. Similarly, the top layer structure of the second coupling circuit, the second chip, and the second wire bond Pad are sequentially connected by bonding wires. Specifically, the top layer structure of the second coupling circuit, the wire bond Pad connected to the first coupling circuit, the first wire bond Pad, the second wire bond Pad, the first chip, and the second chip are all disposed on the upper surface of the 2N-1th layer encapsulation body Ba (i.e., the top layer encapsulation body Ba) and encapsulated within the encapsulation body C.

[0093] In some specific embodiments, the first wire bonding pad and the pads encapsulated in each layer connected thereto form an integrated through-hole pad structure; correspondingly, the second wire bonding pad and the pads encapsulated in each layer connected thereto also form an integrated through-hole pad structure. One end of the integrated through-hole pad structure is connected to the corresponding pad in the molding compound A, and the other end is exposed on the upper surface of the 2N-1 layer molding compound Ba (i.e., the top layer molding compound Ba), so that the conductive lines of the first pad and the second pad are respectively led out to the upper surface of the top layer molding compound Ba, facilitating subsequent wire bonding connections. This design method has the advantage of simpler processing and manufacturing.

[0094] In some other embodiments, between the encapsulation bodies A and C, that is, in each of the 2N-1 layers of encapsulation bodies Ba, a conductive post that connects to the first Pad and the second Pad is also encapsulated.

[0095] As a specific example, the conductive post corresponding to the first pad between molded bodies A and C is a one-piece through-hole pad structure; the conductive post corresponding to the second pad between molded bodies A and C is also a one-piece through-hole pad structure. One end of the conductive post is connected to the corresponding pad in molded body A, and the other end is connected to the corresponding wire bonding pad located in molded body C.

[0096] As another specific example, in each of the 2N-1 layers of encapsulation Ba, a conductive post penetrating the corresponding encapsulation body is encapsulated on the first isolation side and the second isolation side. Specifically, one end of the conductive post in the first layer of encapsulation Ba is connected to the corresponding pad, and the other end is exposed on the upper surface of the second layer of encapsulation Ba; one end of the conductive post in the second layer of encapsulation Ba is connected to the corresponding conductive post in the first layer of encapsulation Ba, and the other end is exposed on the upper surface of the third layer of encapsulation Ba, and so on. The conductive post exposed on the upper surface of the 2N-1 layer of encapsulation Ba is connected to the corresponding bonding pad.

[0097] Here, conductive lines of the first and second pads, which serve as bottom solder pads, are led out to the upper surface of the molding compound B3 via conductive posts to facilitate subsequent bonding wire connections.

[0098] In some specific implementations, the circuit patterns of each layer in the first coupling circuit and the second coupling circuit can be different or the same, depending on the design requirements of the coupling circuit.

[0099] In some specific implementations, if the N-structures in the first and second coupling circuits need to be partially or fully connected based on the design requirements of the coupling circuit, then through holes are provided between the upper and lower structures that need to be connected to facilitate communication.

[0100] As a specific example, if all N layers in the first and second coupling circuits need to be connected, then the 2N-1 layer encapsulation Ba also encapsulates vias corresponding to each layer of the first and second coupling circuits except for the top layer, to connect the upper and lower layers of the corresponding coupling circuits. That is, the first layer to the Nth layer of the first coupling circuit are connected through vias; the first layer and the Nth layer of the second coupling circuit are connected through vias. It can be understood that in this specific embodiment, the N-layer structure of the coupling circuit is only used as a stacking illustration and does not limit the connection situation.

[0101] In one specific implementation, the first molding compound Ba encapsulates a first layer structure of the first coupling circuit and Pads corresponding to the first Pad and the second Pad, respectively; the second molding compound Ba encapsulates a second layer structure of the first coupling circuit and Pads corresponding to the first Pad and the second Pad, respectively; the third molding compound Ba encapsulates a third layer structure of the first coupling circuit and Pads corresponding to the first Pad and the second Pad, respectively; and so on, the Nth molding compound Ba encapsulates an Nth layer structure of the first coupling circuit and Pads corresponding to the first Pad and the second Pad, respectively. The N+1th layer of the molding compound Ba encapsulates the first layer structure of the second coupling circuit and the Pads corresponding to the first Pad and the second Pad respectively; the N+2th layer of the molding compound Ba encapsulates the second layer structure of the second coupling circuit and the Pads corresponding to the first Pad and the second Pad respectively; the N+3th layer of the molding compound Ba encapsulates the third layer structure of the second coupling circuit and the Pads corresponding to the first Pad and the second Pad respectively; ... and so on, the 2N-1th layer of the molding compound Ba encapsulates the N-1th layer structure of the second coupling circuit and the Pads corresponding to the first Pad and the second Pad respectively; the upper surface of the 2N-1th layer of the molding compound Ba (i.e., the top layer of the molding compound Ba) has on one side: a wire bonding Pad connected to the top layer structure (i.e., the Nth layer structure) of the first coupling circuit, a first chip, and a first wire bonding Pad connected to the first Pad, and the "wire bonding Pad connected to the top layer structure (i.e., the Nth layer structure) of the first coupling circuit", the first chip, and the first wire bonding Pad are connected sequentially by bonding wires. Specifically, the first bonding pad is connected to the first pad via the Nth layer molding compound Ba to the corresponding pad encapsulated in the first layer molding compound Ba. The upper surface of the 2N-1th layer molding compound Ba (i.e., the topmost layer molding compound Ba) has on the other side: the topmost structure of the second coupling circuit (i.e., the Nth layer structure), the second chip, and the second bonding pad connected to the second pad. The topmost structure of the second coupling circuit, the second chip, and the second bonding pad are sequentially connected by bonding wires. Specifically, the second bonding pad is connected to the second pad via the N+1th layer molding compound Ba to the corresponding pad encapsulated in the 2N-1th layer molding compound Ba. All components arranged on the upper surface of the 2N-1th layer molding compound Ba (i.e., the topmost layer molding compound Ba) are encapsulated within the molding compound C.

[0102] In some specific embodiments, the first coupling circuit and the second coupling circuit can both be capacitive coupling circuits designed for N (greater than or equal to 3) layer structures; or radio frequency coupling circuits designed for N (greater than or equal to 3) layer structures (such as...). Figure 9 (as shown); or simultaneously, a coil magnetic coupling circuit designed for an N (greater than or equal to 3) layer structure including at least three turns of coil (such as...). Figure 10 (As shown).

[0103] Specifically, the digital isolator provided in this embodiment can not only achieve an N (greater than or equal to 3) layer coil magnetic coupling structure design, but also a single layer coil coupling structure can include at least three turns of coil. Compared with traditional coil magnetic coupling isolators, this embodiment has more turns of coil and more layers of coupling structure. Therefore, not only can the coupling capability and mutual inductance of the isolation coil be significantly improved, but the multi-layer coil structure can also significantly enhance isolation performance and reliability, while optimizing the integrity of signal isolation transmission. In addition, it also has the advantages of lower crosstalk noise and better heat dissipation performance.

[0104] Specifically, the digital isolator provided in this embodiment, such as Figure 9 As shown, it features an N (greater than or equal to 3)-layer RF coupling structure, enabling the integration of multi-layer RF antennas within the package. This not only eliminates the unconventional operation of mounting substrate antennas inside the package, greatly simplifying the manufacturing process of digital isolators, but also improves package reliability.

[0105] The surface-mount digital isolator with an N (greater than or equal to 3) layer coupling structure provided in this embodiment, such as... Figure 8 As shown, the substrate function is directly realized by the molding compound; the N-1 layer structure of the coupling circuit is respectively arranged on the upper surface of the molding compound at different levels; all isolation-related circuits arranged on the upper surface of the molding compound are encapsulated by the molding compound stacked on it; the whole is composed of 2N+1 molding compounds of the same or similar material, which can naturally form an isolation band between the first coupling circuit and the second coupling circuit of the N-1 layer structure.

[0106] It is understood that the surface-firing digital isolator with an N (greater than or equal to 3) layer coupling structure provided in this embodiment eliminates the need for a "traditional substrate" and "lead frame" structure. It not only possesses all the beneficial effects of the surface-firing digital isolator with a single-layer coupling structure provided in Embodiment 1 (which will not be elaborated here; please refer to Embodiment 1 for details), but also, based on its three or more layers of coupling structure, it can significantly improve isolation performance (greatly increasing isolation withstand voltage and strong isolation transmission reliability), optimize anti-interference performance (multi-layer filtering to suppress composite noise and block crosstalk paths), improve signal transmission quality (hierarchical signal conditioning and adaptive modulation and demodulation), and expand functional integration.

[0107] Example 4

[0108] Please see Figure 2-4 , Figure 11 and Figure 12 This embodiment provides a manufacturing method for obtaining the surface-type digital isolator with a single-layer coupling structure as described in Embodiment 1.

[0109] Please see Figure 2 , Figure 11 and Figure 12 This embodiment includes at least the following: Figure 11 The following steps S1 to S6 are shown.

[0110] S1 includes fabricating a first Pad corresponding to the first isolation side and a second Pad corresponding to the second isolation side on the carrier board using RDL;

[0111] S2 includes performing a first molding process on the first Pad and the second Pad in S1 to obtain a molded body A.

[0112] Here, only the first and second pads fabricated on the carrier board are encapsulated; the carrier board itself is not included. The first and second pads will serve as the bottom solder pads of the packaged product.

[0113] The molding compound A serves as the bottom layer of the packaged product and acts as a substrate. The first Pad and the second Pad encapsulated within it will serve as the bottom pads of the packaged product. They are signal connection pads led out from inside the packaged product by the first isolation side and the second isolation side, respectively, and are used to make signal connections with other external components.

[0114] Preferably, the first Pad and the second Pad are through-hole pad structures that penetrate the molding compound A.

[0115] It is understandable that, unlike existing technologies that require mounting traditional substrates on the leadframe island to achieve substrate functionality, this embodiment directly uses the molding compound A as the substrate of the package, resulting in a simpler structure and a significantly reduced overall thickness of the finished package.

[0116] In some specific implementations, combined with Figure 12 To understand this, S1 specifically includes:

[0117] S11: The original first Pad corresponding to the first isolation side and the original second Pad corresponding to the second isolation side are respectively fabricated on the carrier board by RDL electroplating process;

[0118] S12: Conductive pillars, preferably copper pillars, are formed on the original first Pad and the original second Pad respectively by electroplating process to extend the conductive lines of the Pad and form the first Pad and the second Pad.

[0119] S2 specifically includes:

[0120] S21: Use the molding process to mold all the components on the carrier, namely the first Pad and the second Pad, to obtain the original molded body A;

[0121] S22: Polish the upper surface of the original molded body A to expose the tops of the first Pad and the second Pad so that the circuit can be connected and the molded body A can be obtained.

[0122] S3 includes fabricating a first coupling circuit on the upper surface of the encapsulated body A using an RDL, and encapsulating the first coupling circuit using an encapsulating material that is the same as or similar to that of the encapsulated body A to obtain an encapsulated body B.

[0123] That is, the first coupling circuit of the first isolation side is directly made on the upper surface of the plastic encapsulation body A by the traditional electroplating process.

[0124] In some specific implementations, combined with Figure 3 To understand this further, S3 also includes:

[0125] Wire bonding pads are fabricated on the upper surface of the molded body A at positions corresponding to the first and second pads using RDL. These wire bonding pads are used to bring the connection lines from the first and second pads to the upper surface of the molded body A, facilitating subsequent communication with upper-layer components.

[0126] S4 includes fabricating a second coupling circuit corresponding to the first coupling circuit in the vertical direction on the upper surface of the encapsulation body B through RDL, and a wire bonding Pad connected to the first coupling circuit.

[0127] That is, the second coupling circuit on the second isolation side is directly fabricated on the upper surface of the molding compound B using a traditional electroplating process.

[0128] Here, the first coupling circuit located on the upper surface of the molding compound A corresponds vertically to the second coupling circuit located on the upper surface of the molding compound B. This correspondence means that, based on the positional relationship between the first and second coupling circuits, they can be interconnected through a specific method (e.g., capacitive coupling, radio frequency coupling, or coil magnetic coupling).

[0129] Specifically, the first coupling circuit is located below, and the second coupling circuit is located above, with an overlap in the stacking direction of the package. Preferably, the overlap is as large as possible to ensure the corresponding relationship between the two and obtain good communication quality. Preferably, the first and second coupling circuits are positioned near the center of the package, which is more conducive to the layout design of various circuit structures within the package.

[0130] Specifically, the first coupling circuit on the first isolation side and the second coupling circuit on the second isolation side are directly isolated by a molding compound (specifically molding compound A), naturally forming an isolation band. This not only significantly optimizes the isolation band design but also fundamentally solves the heterogeneous interface problem, eliminates creepage risks, and easily achieves higher isolation withstand voltage performance.

[0131] Here, the bonding pad connected to the first coupling circuit is used to lead the signal of the first coupling circuit from inside the molded body B to the upper surface of the molded body B, so as to facilitate subsequent circuit connection.

[0132] In some specific implementations, combined with Figure 12 It can be understood that the wire bonding pad connected to the first coupling circuit can be achieved by drilling and electroplating.

[0133] S5 includes performing the following on the upper surface of the encapsulated body B:

[0134] 1. Create a bonding pad connected to the first pad (i.e., the first bonding pad) and a bonding pad connected to the second pad (i.e., the second bonding pad);

[0135] 2. Chip bonding on the first isolation side and the second isolation side;

[0136] 3. Establish the wiring connections of the first isolation side with respect to its first chip, wire bonding pad and first coupling circuit through wire bonding, and establish the wiring connections of the second isolation side with respect to its second chip, wire bonding pad and second coupling circuit.

[0137] Regarding point "1" above, in some specific implementations, combined with Figure 12 To understand this, the specific implementation process includes:

[0138] The first and second wire bonding pads are fabricated on the upper surface of the molding compound B at positions corresponding to the first and second pads using the RDL. The first and second wire bonding pads are connected to the corresponding first and second pads to enable wire bonding connectivity of the circuit in the subsequent wire bonding step.

[0139] Regarding point "2" above, in some specific implementations, combined with Figure 12 To understand this, the specific implementation process includes:

[0140] The first chip on the first isolation side and the second chip on the second isolation side are precisely mounted onto the upper surface of the molding compound B.

[0141] Regarding point "3" above, in some specific implementations, combined with Figure 12To understand this, the specific implementation process includes:

[0142] The sequential connection relationship between the "wire bonding pad connected to the first coupling circuit", the first chip and the first wire bonding pad in the first isolation side is established by wire bonding, as well as the sequential connection relationship between the second coupling circuit, the second chip and the second wire bonding pad in the second isolation side.

[0143] In this embodiment, preferably, the first chip, the first Pad, the first wire bonding Pad, and the wire bonding Pad connected to the first coupling circuit on the first isolation side are located on the same side; the second chip, the second Pad, the second wire bonding Pad, and the wire bonding point of the second coupling circuit on the second isolation side are located on the other side.

[0144] As a specific example, such as Figure 2 As shown, all components of the first isolation side, except for the first coupling circuit, are uniformly arranged on the left side of the finished package; all components of the second isolation side, except for the second coupling circuit, are uniformly arranged on the right side of the entire package. The reverse is also possible.

[0145] S6 includes using a molding material that is the same as or similar to that of the molding body A to mold the upper surface of the molding body B, thereby obtaining the molding body C.

[0146] Here, the encapsulation body C is used to encapsulate all the components arranged on the upper surface of the encapsulation body B and firmly fix them to the upper surface of the encapsulation body B.

[0147] Here, the molding materials used to form molded bodies A, B, and C are the same or similar; that is, the molding materials of molded bodies A, B, and C are the same or similar. This not only makes the connection between the three layers of molding bodies tighter and more secure, but more importantly, the interface between the three molding processes can be completely fused, fundamentally avoiding the formation of heterogeneous interfaces. The digital isolator encapsulated in this way will have significantly improved isolation withstand voltage and packaging reliability.

[0148] The manufacturing method of the surface-mount digital isolator provided in this embodiment involves first molding to obtain a molded body A, which serves as a substrate support; then, using an RDL (Reverse Deposition Layer), the first coupling circuit is directly laid on the upper surface of the molded body A, and a second molding is performed to obtain a molded body B; next, using an RDL, the second coupling circuit and all components of other isolation circuits are laid on the upper surface of the molded body B, and a third molding is performed to obtain a molded body C. Specifically, the first and second coupling circuits corresponding in the vertical direction of the hierarchical structure are separated by the molded body B after the third molding, naturally forming an isolation band between them; furthermore, the thickness of the isolation band can be flexibly adjusted by designing the thickness of the molded body according to different isolation strength requirements, so as to achieve on-demand design of isolation withstand voltage performance. For example, the dielectric strength of general molding compounds is around 50V / um, while the three-layer molding compound structure provided in this embodiment can achieve a withstand voltage of 25KV with a 500um isolation strip thickness (500um*50V / um=25000V); and a withstand voltage of 50KV with a 1mm isolation strip thickness (1mm*50V / um=50KV).

[0149] As described above, this embodiment provides a novel technology for integrating isolation strips within a package, breaking away from the traditional "substrate + lead frame" packaging approach. By using the same or similar molding materials for multiple molding processes, and employing RDL technology to achieve complex isolation circuit patterns on the surface of the molded body, a product is obtained... Figure 2 The surface-mount digital isolator shown is composed of multiple encapsulated bodies of the same or similar material stacked together, and the isolation bands are formed directly by the encapsulation material. This eliminates the need for the processing and design of both the "traditional substrate" and the "lead frame".

[0150] On the one hand, unlike traditional isolation packaging solutions which are limited by lead frame processing technology and thus difficult to achieve complex circuit pattern design, this embodiment directly utilizes the molding compound to realize the substrate function, and then uses traditional RDL process to perform layout processing on its surface. This allows for processing precision that lead frame process cannot achieve, enabling more complex coupling circuit pattern design, thereby improving signal coupling strength and enhancing signal transmission stability.

[0151] On the other hand, unlike the traditional "substrate + lead frame" isolation packaging solution, the package in this embodiment is composed of multiple molded bodies of the same or similar materials stacked together, and the interfaces between the molded bodies can be completely fused. This not only fundamentally solves the heterogeneous interface problem and eliminates the risk of creepage, but also maintains the integrity of the isolation band and reduces the overall package thickness. Therefore, the digital isolator fabricated through this embodiment can easily achieve excellent isolation withstand voltage and package reliability.

[0152] On the other hand, unlike traditional isolation packaging solutions that require advanced, complex, and costly packaging processes (such as processing a separate polyimide insulating layer inside the package as an isolation strip, or requiring embedded packaging processes) to achieve good isolation performance, this embodiment is entirely based on traditional packaging processes, and has comprehensive advantages such as simpler structure and process, lower manufacturing cost, and better isolation performance.

[0153] It should also be noted that in steps S3 and S4 of this embodiment, the coupling circuits corresponding to the upper surfaces of the molding compound A and the molding compound B are respectively fabricated by RDL, which can meet the design requirements of various coupling methods.

[0154] In some specific embodiments of this example, the first coupling circuit and the second coupling circuit are both capacitive coupling circuits; or both are radio frequency coupling circuits (e.g., Figure 3 (as shown); or simultaneously a coil magnetic coupling circuit including at least three turns of coil (such as...). Figure 4 (As shown).

[0155] When both the first coupling circuit and the second coupling circuit are coil magnetic coupling circuits, such as Figure 4 As shown, a single coil magnetic coupling circuit can include at least three turns of coil; compared to traditional coil magnetic coupling isolation packaging schemes, which are limited by lead frame technology and can only manufacture a very simple two-turn coil structure at most (such as...). Figure 1C As shown in the figure, this leads to defects such as weak coupling signal. The surface-mount digital isolator based on coil magnetic coupling obtained in this embodiment can have a much larger number of coil turns than the isolator obtained by the traditional coil magnetic coupling isolation packaging scheme. Therefore, according to the theoretical relationship between mutual inductance coefficient and number of turns, the surface-mount digital isolator based on coil magnetic coupling obtained in this embodiment can significantly improve the isolation coil coupling capability and mutual inductance strength.

[0156] Example 5

[0157] Please see Figures 5 to 7 , Figure 13 This embodiment provides a method for manufacturing a surface-firing digital isolator with a dual-layer coupling structure as described in Embodiment 2. The essential difference between this method and Embodiment 4 is that the coupling structure in the resulting surface-firing digital isolator is a dual-layer structure.

[0158] Please combine Figure 5 and Figure 13To understand this, the manufacturing method provided in this embodiment, compared to the manufacturing method provided in Embodiment 4, expands the encapsulating body B to include encapsulating bodies B1, B2, and B3 stacked sequentially from bottom to top; the encapsulating bodies B1, B2, and B3 are respectively encapsulated by encapsulating materials that are the same as or similar to encapsulating body A; at the same time, steps S5 and S6 are both operated on the upper surface of the encapsulating body B3.

[0159] Among them, encapsulation body B1 is used to encapsulate the first layer structure of the first coupling circuit; encapsulation body B2 is used to encapsulate the second layer structure of the first coupling circuit; and encapsulation body B3 is used to encapsulate the first layer structure of the second coupling circuit.

[0160] It is understood that the manufacturing method for a surface-mount digital isolator with a dual-layer coupling structure provided in this embodiment is an extension of Embodiment 1. Specifically, steps S3 and S4 are extended to fabricate encapsulated bodies B1 to B3 to accommodate the first and second coupling circuits of the dual-layer structure. Furthermore, based on the same technical concept, it is known that the operations described in subsequent steps S5 and S6 should actually be performed on the newly added encapsulated body B3. Thus, the final product is as follows... Figure 5 The digital isolator shown is composed of five encapsulated bodies of the same or similar materials stacked together, and also utilizes the encapsulation material to naturally form isolation zones. It not only possesses all the technical effects described in Embodiment 1 (which will not be repeated here), but also effectively meets the design requirements of a dual-layer coupling structure, bringing advantages such as enhanced electrical isolation strength and safety, optimized anti-interference performance (reducing parasitic capacitance between isolation layers and lowering common-mode noise through layered layout), support for bidirectional signal transmission and functional integration, and a balance between performance and size (layered design facilitates volume reduction and enables higher insulation levels).

[0161] The following embodiment will detail the manufacturing method of a surface-mount digital isolator with a two-layer coupling structure through a specific implementation. Please refer to the following: Figure 5 To understand.

[0162] like Figure 13 As shown, the manufacturing method includes at least the following steps:

[0163] S1: Fabricate the first Pad corresponding to the first isolation side and the second Pad corresponding to the second isolation side on the carrier board using RDL;

[0164] S2: Mold the first Pad and the second Pad to obtain the molded body A;

[0165] SS3-1: On the upper surface of the molded body A, the first layer structure of the first coupling circuit is fabricated by RDL, and the first layer structure of the first coupling circuit is molded using the same or similar molding material as the molded body A to obtain the molded body B1;

[0166] SS3-2: On the upper surface of the encapsulation body B1, a second layer structure of the first coupling circuit is fabricated using RDL, and the second layer structure of the first coupling circuit is encapsulated using the same or similar encapsulation material as the encapsulation body A to obtain encapsulation body B2;

[0167] SS3-3: On the upper surface of the encapsulation body B2, a first layer structure of a second coupling circuit corresponding to the first coupling circuit in the vertical direction is made by means of RDL, and the first layer structure of the second coupling circuit is encapsulated using the same or similar encapsulation material as the encapsulation body A to obtain the encapsulation body B3;

[0168] S4: On the upper surface of the encapsulation body B3, the second layer structure of the second coupling circuit and the wire bonding Pad connected to the second layer structure of the first coupling circuit are respectively fabricated by RDL.

[0169] In this embodiment, the two-layer structure of the first coupling circuit and the two-layer structure of the second coupling circuit are vertically corresponding in the hierarchical structure. Simply put, the two-layer structure of the first coupling circuit and the two-layer structure of the second coupling circuit, totaling four layers, have overlapping areas in the stacking direction of the encapsulation to ensure good vertical transmission of the coupled signal, achieving surface-based isolated transmission.

[0170] Optionally, if the first layer structure in the first coupling circuit and the second coupling circuit needs to be connected to the second layer structure based on the design requirements of the coupling circuit, then during the fabrication of the first layer structure, i.e., in SS3-1 above, a via of the first layer structure in the first coupling circuit will also be fabricated simultaneously; and in SS3-3 above, a via of the first layer structure in the second coupling circuit will also be fabricated simultaneously. Simultaneously, during the fabrication of the second layer structure, i.e., in SS3-2 above, the first layer structure of the first coupling circuit and its second layer structure are connected through vias; and in S4 above, the first layer structure of the second coupling circuit and its second layer structure are connected through vias. That is, the first layer structure and the second layer structure of the first coupling circuit are connected through vias; the first layer structure and the second layer structure of the second coupling circuit are connected through vias. It can be understood that in this specific embodiment, the double-layer structure of the coupling circuit is only used as a stacking illustration and does not limit the connection situation.

[0171] Optionally, the circuit patterns of each layer in the first coupling circuit and the second coupling circuit can be different or the same, depending on the design requirements of the coupling circuit.

[0172] SS5-1: On the upper surface of the encapsulated body B3, a first bonding pad connected to the first pad and a second bonding pad connected to the second pad are respectively fabricated;

[0173] Optionally, the first wire bonding Pad and the second wire bonding Pad, which are connected through the molding compound B3 to the first Pad and the second Pad in the molding compound A, are respectively manufactured by drilling and electroplating processes.

[0174] Optionally, during the operation on the upper surface of each layer of the encapsulation except for encapsulation C, conductive posts are simultaneously fabricated to connect to the first Pad and the second Pad, respectively. One end of each conductive post is connected to the corresponding Pad, and the other end is exposed on the upper surface of the encapsulation. This allows the conductive lines of the first Pad and the second Pad to be led from the bottom of encapsulation A to the upper surface of encapsulation B3, facilitating subsequent connection to the isolation circuit.

[0175] SS5-2: On the upper surface of the molding compound B3, chip bonding is performed on the first chip corresponding to the first isolation side and the second chip corresponding to the second isolation side; that is, the first chip on the first isolation side and the second chip on the second isolation side are precisely mounted onto the upper surface of the molding compound B3.

[0176] SS5-3: Establish the sequential connection relationship between "the wire bonded pad connected to the second layer structure of the first coupling circuit", the first chip and the first wire bonded pad, and the sequential connection relationship between the second layer structure of the second coupling circuit, the second chip and the second wire bonded pad through wire bonding.

[0177] S6: Use a molding material that is the same as or similar to that of the molding body A to mold the upper surface of the molding body B3 to obtain the molding body C.

[0178] As a specific example, such as Figure 5 As shown, all components of the first isolation side, except for the first coupling circuit, are uniformly arranged on the left side of the finished package; all components of the second isolation side, except for the second coupling circuit, are uniformly arranged on the right side of the entire package. The reverse is also possible.

[0179] like Figure 5As shown, the digital isolator manufactured by the above method has a five-layer molding compound structure, including molding compound A, molding compound B1 to B3 and molding compound C stacked sequentially from bottom to top; between the first coupling circuit and the second coupling circuit, which are molded therein and have a double-layer coupling structure, an isolation band will be naturally formed through molding compound B2; the thickness of the isolation band can also be controlled by designing the thickness of the molding compound to adapt to different isolation strength requirements.

[0180] In this embodiment, the first coupling circuit and the second coupling circuit can both be capacitive coupling circuits designed for a two-layer structure; or both be radio frequency coupling circuits designed for a two-layer structure (such as...). Figure 6 (as shown); or simultaneously, a coil magnetic coupling circuit designed for a double-layer structure including at least three turns of coil (such as...). Figure 7 (As shown).

[0181] In particular, the digital isolator fabricated in this embodiment can not only achieve the following: Figure 7 The illustrated design features a double-layer coil magnetic coupling structure; moreover, a single-layer coil coupling structure can include at least three turns of coil. Clearly, this embodiment can produce more turns of coil and more layers of coupling structure compared to traditional coil coupling isolation packaging schemes (such as...). Figure 1C (As shown). Therefore, not only can the magnetic coupling capability and mutual inductance of the isolation coil be significantly improved, but also, due to the magnetic coupling between the main coil and the secondary coil, it has higher induction efficiency, lower crosstalk noise, and better heat dissipation performance.

[0182] Example 6

[0183] Please refer to Figures 8 to 10 , Figure 14 This embodiment provides a method for manufacturing a surface-type digital isolator with a coupling structure of three or more layers as described in Embodiment 3. The essential difference between this method and Embodiment 4 is that the coupling structure in the surface-type digital isolator obtained here is a structure of three or more layers.

[0184] Please combine Figure 8 and Figure 14 To understand this, the manufacturing method provided in this embodiment can produce, for example, [the following is a description of the method]. Figure 8 As shown, a surface-mount digital isolator with an N-layer coupling structure, where N is an integer greater than or equal to 3; compared to the manufacturing method provided in Embodiment 1, the encapsulant B is extended to include 2N-1 layers of encapsulants Ba stacked sequentially from bottom to top; the 2N-1 layers of encapsulants Ba are encapsulated by encapsulating materials that are the same as or similar to those of encapsulant A; at the same time, S5 and S6 are both operated on the upper surface of the topmost encapsulant Ba (i.e., the 2N-1th layer of encapsulant Ba).

[0185] Among them, the 2N-1 layer of encapsulation Ba is used to encapsulate each of the other layers in the first coupling circuit and the second coupling circuit, except for the top layer of the second coupling circuit.

[0186] It is understood that the manufacturing method for an N-layer coupled surface-mount digital isolator provided in this embodiment is an extension of Embodiment 1. Specifically, steps S3 and S4 are extended to fabricate a 2N-1 layer molding compound Ba to house the first and second coupling circuits of the N-layer structure. Furthermore, based on the same technical concept, it is known that the operations described in subsequent steps S5 and S6 should actually be performed on the topmost molding compound Ba (i.e., the 2N-1th layer molding compound Ba). Thus, the final product is as follows... Figure 11 The digital isolator shown is composed of multiple encapsulated bodies of the same or similar material (from bottom to top, encapsulated body A, encapsulated body Ba with 2N-1 layers, and encapsulated body C), and can directly utilize the encapsulation material to naturally form isolation bands. It not only possesses all the technical effects described in Embodiment 1 (which will not be repeated here), but also effectively meets the design requirements of multi-layer coupling structures, bringing advantages such as significantly improved isolation performance (greatly increased isolation withstand voltage and strong isolation transmission reliability), optimized anti-interference performance (multi-layer filtering to suppress composite noise and block crosstalk paths), improved signal transmission quality (hierarchical signal conditioning and adaptive modulation and demodulation), and expanded functional integration.

[0187] The following embodiment will detail the manufacturing method of a surface-mount digital isolator with a coupling structure of three or more layers through a specific implementation. Please refer to the following: Figure 8 To understand.

[0188] like Figure 14 As shown, it includes at least the following steps:

[0189] S1: Fabricate the first Pad corresponding to the first isolation side and the second Pad corresponding to the second isolation side on the carrier board using RDL;

[0190] S2: Mold the first Pad and the second Pad to obtain the molded body A;

[0191] SSS3-1: On the upper surface of the molded body A, the first layer structure of the first coupling circuit is made by RDL, and the first layer structure of the first coupling circuit is molded using the same or similar molding material as the molded body A to obtain the first layer molded body Ba;

[0192] SSS3-2: Following the method described in SSS3-1, N-1 layers of molded enclosures Ba are fabricated above the first layer of molded enclosure Ba, stacked sequentially from bottom to top. Each of the N-1 layers of molded enclosure Ba encapsulates the second to Nth layers of the first coupling circuit. That is, the second layer of molded enclosure Ba encapsulates the first layer of the first coupling circuit, the third layer of molded enclosure Ba encapsulates the third layer of the first coupling circuit, and so on, with the Nth layer of molded enclosure Ba encapsulating the Nth layer of the first coupling circuit.

[0193] SSS4-1: On the upper surface of the Nth layer molded body Ba, a first layer structure of a second coupling circuit corresponding to the first coupling circuit in the vertical direction is made by RDL, and the first layer structure of the second coupling circuit is molded using the same or similar molding material as the molded body A to obtain the N+1th layer molded body Ba.

[0194] SSS4-2: Following the method described in SSS4-1, N-2 layers of molded enclosures Ba are fabricated on top of the (N+1)th layer of the molded enclosure Ba, stacked sequentially from bottom to top. Each of the N-2 layers of the molded enclosure Ba encapsulates the second to (N-1)th layers of the second coupling circuit. Specifically, the (N+1)th layer of the molded enclosure Ba encapsulates the first layer of the second coupling circuit, the (N+2)th layer of the molded enclosure Ba encapsulates the third layer of the second coupling circuit, and so on, until the (2N-1)th layer of the molded enclosure Ba encapsulates the (N-1)th layer of the second coupling circuit.

[0195] SSS4-3: On the upper surface of the 2N-1 layer molding compound Ba (i.e., the top layer molding compound Ba), the top layer structure of the second coupling circuit (i.e. the Nth layer structure) and the wire bonding Pad connected to the Nth layer structure of the first coupling circuit are respectively fabricated through RDL.

[0196] In this embodiment, the N-layer structure of the first coupling circuit and the N-layer structure of the second coupling circuit are vertically corresponding in the hierarchical structure. Simply put, the N-layer structure of the first coupling circuit and the N-layer structure of the second coupling circuit, totaling 2N layers, have overlapping areas in the stacking direction of the encapsulation to ensure good vertical transmission of the coupled signal, achieving surface-based isolated transmission.

[0197] Optionally, if, based on the design requirements of the coupling circuit, all or part of the N-layer structures in the first and second coupling circuits need to be connected, then the upper and lower layers that need to be connected are connected through vias.

[0198] As a specific example, if all N layers in the first and second coupling circuits need to be connected, then during the fabrication of each layer (SSS3-1 and SSS3-2 above), vias will also be fabricated for each layer of the first coupling circuit except for the top layer. Furthermore, when fabricating the next layer, the vias of the previous layer will be connected to the vias of the next layer. Similarly, in SSS4-1 and SSS4-2 above, vias will also be fabricated for each layer of the second coupling circuit except for the top layer. And when fabricating the next layer, the vias of the previous layer will be connected to the vias of the next layer. That is, the first to Nth layers of the first coupling circuit are connected vias; the first and Nth layers of the second coupling circuit are connected vias. It is understood that in this specific embodiment, the N-layer structure of the coupling circuit is only used as a stacking illustration and does not limit the connection situation.

[0199] Optionally, the circuit patterns of each layer in the first coupling circuit and the second coupling circuit can be different or the same, depending on the design requirements of the coupling circuit.

[0200] SSS5-1: On the upper surface of the 2N-1 layer of encapsulant Ba, respectively, a wire bonding Pad connected to the first Pad and a wire bonding Pad connected to the second Pad are fabricated;

[0201] Optionally, the first wire bonding Pad and the second wire bonding Pad, which are connected through the molding compound B3 to the first Pad and the second Pad in the molding compound A, are respectively manufactured by drilling and electroplating processes.

[0202] Optionally, during the operation on the upper surface of each encapsulation layer other than encapsulation layer C, conductive posts are simultaneously fabricated to connect to the first Pad and the second Pad, respectively. One end of each conductive post is connected to the corresponding Pad, and the other end is exposed on the upper surface of the encapsulation layer. This allows the conductive lines of the first Pad and the second Pad to be led from the bottom of encapsulation layer A to the upper surface of the 2N-1th encapsulation layer Ba, facilitating subsequent connection to the isolation circuit.

[0203] SSS5-2: On the upper surface of the 2N-1 layer molding compound Ba, chip bonding is performed on the first chip corresponding to the first isolation side and the second chip corresponding to the second isolation side; that is, the first chip on the first isolation side and the second chip on the second isolation side are precisely mounted on the upper surface of the 2N-1 layer molding compound Ba.

[0204] SSS5-3: On the upper surface of the 2N-1 layer of the molding compound Ba, the following sequential connections are established by wire bonding: the wire bonding Pad connected to the Nth layer structure of the first coupling circuit, the first chip, and the wire bonding Pad connected to the first Pad; and the top layer structure of the second coupling circuit, the second chip, and the wire bonding Pad connected to the second Pad.

[0205] S6: Use the same or similar molding material as the molding body A to mold the upper surface of the 2N-1 layer molding body Ba to obtain the molding body C.

[0206] As a specific example, such as Figure 8 As shown, all components of the first isolation side, except for the first coupling circuit, are uniformly arranged on the left side of the finished package; all components of the second isolation side, except for the second coupling circuit, are uniformly arranged on the right side of the entire package. The reverse is also possible.

[0207] like Figure 8 As shown, the digital isolator manufactured by the above method is a 2N+1 layer plastic encapsulation structure, including a plastic encapsulation body A, a 2N-1 layer plastic encapsulation body Ba, and a plastic encapsulation body C stacked sequentially from bottom to top; between the first coupling circuit and the second coupling circuit, which are encapsulated therein and have an N-layer coupling structure, an isolation band will be naturally formed through the Nth layer plastic encapsulation body Ba; the thickness of the isolation band can also be controlled by designing the thickness of the plastic encapsulation body to adapt to different isolation strength requirements.

[0208] In this embodiment, the first coupling circuit and the second coupling circuit can both be capacitive coupling circuits designed for an N (greater than or equal to 3) layer structure; or both be radio frequency coupling circuits designed for an N (greater than or equal to 3) layer structure (such as...). Figure 9 (as shown); or simultaneously, a coil magnetic coupling circuit designed for an N (greater than or equal to 3) layer structure including at least three turns of coil (such as...). Figure 10 (As shown).

[0209] In particular, the surface-mount digital isolator fabricated in this embodiment can not only achieve an N (greater than or equal to 3) layer coil magnetic coupling structure design, but also a single-layer coil coupling structure can include at least three turns of coil. Clearly, compared to traditional coil magnetic coupling isolation packaging schemes, this embodiment can fabricate more turns of coil and more layers of coupling structure (such as...). Figure 1C (As shown). Therefore, not only can the coupling capability and mutual inductance of the isolation coil be significantly improved, but the multi-layer coil design can also significantly enhance isolation performance and reliability, while optimizing the integrity of signal isolation transmission. In addition, it also has the advantages of lower crosstalk noise and better heat dissipation performance.

[0210] In particular, the manufacturing method provided in this embodiment is applicable to the design of N (greater than or equal to 3) layer radio frequency coupling structures, which can realize the integration of multi-layer radio frequency antennas within the package, thereby avoiding the unconventional operation of mounting substrate antennas inside the package, thus greatly simplifying the process flow and improving the package reliability.

[0211] The above description is merely an embodiment of this utility model and does not limit the patent scope of this utility model. Any equivalent modifications made based on the content of this utility model specification and drawings, or direct or indirect applications in related technical fields, are similarly included within the patent protection scope of this utility model.

Claims

1. A faceplate digital isolator, comprising: It includes molding compounds A, B, and C, which are stacked sequentially from bottom to top; the molding materials of molding compounds A, B, and C are the same or similar. The molding compound A encapsulates a first Pad on a first isolation side and a second Pad on a second isolation side; the molding compound B encapsulates a first coupling circuit; the molding compound C encapsulates a second coupling circuit corresponding to the first coupling circuit in the vertical direction, a wire bonding Pad connected to the first coupling circuit, a wire bonding Pad connected to the first Pad, a wire bonding Pad connected to the second Pad, a first chip on the first isolation side, and a second chip on the second isolation side; the wire bonding Pad connected to the first coupling circuit, the first chip, and the wire bonding Pad connected to the first Pad are sequentially connected by bonding wires, and the second coupling circuit, the second chip, and the wire bonding Pad connected to the second Pad are sequentially connected by bonding wires.

2. The faceplate digital isolator of claim 1, wherein, The wire bonding pads connected to the first pad and the wire bonding pads connected to the second pad are integral through-hole pad structures that connect the upper surface of the molding compound B to the corresponding pads on the molding compound A.

3. The faceplate digital isolator of claim 1, wherein, The encapsulation body B also encapsulates two conductive posts corresponding to the first Pad and the second Pad, respectively. One end of the conductive post is connected to the corresponding Pad in the encapsulation body A, and the other end is connected to the corresponding wire bonding Pad located on the upper surface of the encapsulation body B.

4. The surface-mount digital isolator as described in claim 1, characterized in that, The first coupling circuit and the second coupling circuit are a two-layer coupling structure; The encapsulation body B specifically includes encapsulation bodies B1, B2, and B3 stacked sequentially from bottom to top; the encapsulation bodies B1, B2, and B3 are made of the same or similar encapsulation material as the encapsulation body A; the first layer structure and the second layer structure of the first coupling circuit are respectively encapsulated in the encapsulation bodies B1 and B2; the first layer structure of the second coupling circuit corresponding to the first coupling circuit in the vertical direction is encapsulated in the encapsulation body B3. The encapsulated body C contains the second layer structure of the second coupling circuit.

5. The surface-mount digital isolator as described in claim 4, characterized in that, It also includes through-holes in the first coupling circuit and through-holes in the second coupling circuit; the first layer structure and the second layer structure of the first coupling circuit are connected through through-holes; the first layer structure and the second layer structure of the second coupling circuit are connected through through-holes.

6. The surface-mount digital isolator as described in claim 1, characterized in that, The first coupling circuit and the second coupling circuit are N-layer structures, where N is an integer greater than or equal to 3; The encapsulation body B specifically comprises 2N-1 layers of encapsulation bodies Ba stacked sequentially from bottom to top; the encapsulation materials of the 2N-1 layers of encapsulation bodies Ba and the encapsulation body A are the same or similar. The 2N-1 layer encapsulation Ba encapsulates each of the first coupling circuit and each other layer structure in the second coupling circuit except for the top layer structure of the second coupling circuit. The encapsulated component C encapsulates the topmost structure of the second coupling circuit.

7. The surface-mount digital isolator as described in claim 6, characterized in that, It also includes through-holes in the first coupling circuit and through-holes in the second coupling circuit; the upper and lower layers of the first coupling circuit are connected through through-holes; the upper and lower layers of the second coupling circuit are connected through through-holes.

8. The surface-mount digital isolator as described in claim 4 or 6, characterized in that, The wire bonding pads connected to the first pad and the wire bonding pads connected to the second pad are integral through-hole pad structures that connect the molding compound C to the corresponding pads on the molding compound A.

9. The surface-mount digital isolator as described in claim 4 or 6, characterized in that, Between the encapsulation body A and the encapsulation body C, two conductive posts corresponding to the first Pad and the second Pad are also encapsulated. One end of the conductive post is connected to the corresponding Pad in the encapsulation body A, and the other end is connected to the corresponding wire bonding Pad in the encapsulation body C.

10. The surface-mount digital isolator as described in claim 1, characterized in that, The first coupling circuit and the second coupling circuit are both capacitive coupling circuits, radio frequency coupling circuits, or coil magnetic coupling circuits including at least three turns of coil.

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