HPD signal control circuit for video conferencing terminal equipment

Abstract

This invention provides an HPD signal control circuit for a video conferencing terminal device. One end of the feedback resistor R1 and the source (S) of MOSFET Q2 are connected to pin 18 of the HDMI interface; the other end of the feedback resistor R1 is connected to the SoC (System-on-Chips) to feed back the signal output from pin 18 of the HDMI interface to the SoC; the gate (G) of MOSFET Q2 is connected to one end of resistor R2, and the other end of resistor R2 is connected to the feedback resistor R1 and the collector of transistor Q1; the drain (D) of MOSFET Q2 is connected to pull-up resistor R5, which is connected to pin 19 of the HDMI interface; the base of transistor Q1 is connected to a transistor driver circuit module, and the emitter of transistor Q1 is grounded; the transistor driver circuit module is connected to the SoC. This HPD signal control circuit solves the compatibility problem caused by the EDID not being refreshed due to the bridge chip of the video conferencing terminal device starting up earlier than the SoC chip, and also solves the problem of the video conferencing terminal device being identified as a non-plug-and-play device when it is not powered on.

Description

Technical Field

[0001] This utility model relates to the field of video conferencing terminal equipment technology, and in particular to an HPD signal control circuit for video conferencing terminal equipment. Background Technology

[0002] High Definition Multimedia Interface (HDMI) is a fully digital audio and video interface that enables lossless transmission of uncompressed audio and video data, as well as compressed digital audio data, from an HDMI-compliant source to an HDMI-compliant display. It is more mainstream than the traditional VGA interface, offers higher image quality, supports full HD video transmission of 1080p and above, and does not require digital-to-analog conversion. It is now widely used in audiovisual equipment such as computers, LCD TVs, set-top boxes, and conference terminals.

[0003] HPD (Hot Plug Detection) is a detection signal generated from the HDMI display and sent to the HDMI source, located on pin 19 of the HDMI interface. It serves as the credential for the HDMI source to determine whether to initiate EDID reading and TMDS transmission. The HPD signal is typically implemented on the HDMI display by pulling it up to HDMI +5V (which is transmitted from the HDMI source via pin 18 of the HDMI interface) through a 1KΩ to 2KΩ resistor. When the source connects to the receiver, the receiver responds with an HPD signal to the transmitter, which then activates the DDC channel, reads the receiver's EDID information, and performs HDCP interaction. EDID includes the display's vendor information, maximum image size, and resolution. Generally, a 1KΩ to 2KΩ resistor connects the HPD signal to pin 18 of the HDMI interface.

[0004] Video conferencing terminal equipment is a multimedia communication terminal device specifically designed for video conferencing. Its input / output devices include cameras, microphones, speakers, and displays. Because it requires abundant interface resources, the HDMI-IN interface often uses a bridge chip for protocol conversion, converting the HDMI signal into MIPI or other signals before inputting it to the SoC chip. In other words, the HDMI-IN interface often uses an HDMI-to-MIPI bridge chip to expand the interface.

[0005] However, this approach often presents two problems. First, the HDMI-IN bridging chip often starts up earlier than the SoC chip. This means that before the SoC has updated the EDID within the bridging chip, the HDMI-IN bridging chip has already completed EDID negotiation with the HDMI source device, leading to compatibility issues. Second, when the conference terminal is not powered on, if the source device is connected, the HPD is pulled up, causing the source device to mistakenly believe that the conference terminal is powered on and initiate EDID negotiation. The source device may then identify the conference terminal as a non-plug-and-play (Non-PNP) device and output the most basic resolution supported by most displays, such as 640x480p@60Hz. Utility Model Content

[0006] The technical problem this invention aims to solve is to provide an HPD signal control circuit for a video conferencing terminal device, which enhances the compatibility of the device and allows it to connect to more display and source devices. It eliminates the need for manual re-adaptation of resolution and other information, making the video conferencing terminal easier to operate.

[0007] This utility model is implemented as follows:

[0008] This utility model provides an HPD signal control circuit for a video conferencing terminal device, including a transistor Q1, a MOSFET Q2, a pull-up resistor R5, a feedback resistor R1, a resistor R2, and a transistor drive circuit module;

[0009] One end of the feedback resistor R1 and the source terminal of the MOSFET Q2 are connected to pin 18 of the HDMI interface.

[0010] The other end of the feedback resistor R1 is connected to the SoC and is used to feed back the signal output from pin 18 of the HDMI interface to the SoC.

[0011] The gate of the MOS transistor Q2 is connected to one end of the resistor R2, and the other end of the resistor R2 is connected to the feedback resistor R1 and the collector of the transistor Q1.

[0012] The drain of the MOSFET Q2 is connected to the pull-up resistor R5, and the pull-up resistor R5 is connected to pin 19 of the HDMI interface.

[0013] The base of transistor Q1 is connected to the transistor driving circuit module, and the emitter of transistor Q1 is grounded;

[0014] The transistor driver circuit module is connected to the SoC.

[0015] Furthermore, the transistor drive circuit module includes a pull-down resistor R3 and a resistor R4;

[0016] One end of resistor R4 is connected to the SoC, and the other end is connected to the base of resistor R3 and transistor Q1. The side of resistor R3 away from resistor R4 is grounded.

[0017] Furthermore, it also includes a capacitor C1, one end of which is connected between the feedback resistor R1 and the source (S) terminal of the MOSFET Q2, and the other end is connected between the resistor R2 and the gate (G) terminal of the MOSFET Q2.

[0018] Furthermore, it also includes capacitor C2, one end of which is connected between pull-up resistor R5 and pin 19 of the HDMI interface, and the other end is grounded.

[0019] The advantages of this invention are as follows: The HPD signal control circuit of this invention solves the compatibility problem caused by the EDID not being refreshed due to the bridge chip of the video conferencing terminal device starting up earlier than the SoC chip. It also solves the problem of the video conferencing terminal being identified as a non-plug-and-play (Non-PNP) device when it is not powered on. The circuit structure of this invention allows the video conferencing terminal to have stronger adaptability and is compatible with more HDMI input devices such as cameras. At the same time, maintenance and operation are simpler, as manual re-adaptation of resolution and other information is not required. Attached Figure Description

[0020] The present invention will be further described below with reference to the accompanying drawings and embodiments.

[0021] Figure 1 This is a schematic diagram of the HPD signal control circuit structure of a video conferencing terminal device according to the present invention. Detailed Implementation

[0022] Please see Figure 1 This utility model provides an HPD signal control circuit for a video conferencing terminal device, including a transistor Q1, a MOSFET Q2, a pull-up resistor R5, a feedback resistor R1, a resistor R2, and a transistor driver circuit module; transistor Q1 is an NPN transistor used to drive MOSFET Q2. MOSFET Q2 is a P-channel MOSFET, used to control whether HDMI+5V pulls up the HPD signal;

[0023] One end of the feedback resistor R1 and the source terminal of the MOSFET Q2 are connected to pin 18 of the HDMI interface.

[0024] The other end of the feedback resistor R1 is connected to the SoC and is used to feed back the signal output from pin 18 of the HDMI interface to the SoC. As shown in the figure, the HPO signal is the feedback signal when the source device is plugged into the HDMI interface and is connected to the GPIO input pin of the SoC.

[0025] The gate of the MOS transistor Q2 is connected to one end of the resistor R2, and the other end of the resistor R2 is connected to the feedback resistor R1 and the collector of the transistor Q1.

[0026] The drain of the MOSFET Q2 is connected to the pull-up resistor R5, which is connected to pin 19 of the HDMI interface. The pull-up resistor R5 is the pull-up resistor for the HPD, and its value is between 1KΩ and 2KΩ.

[0027] The base of transistor Q1 is connected to the transistor driving circuit module, and the emitter of transistor Q1 is grounded;

[0028] The transistor driver circuit module is connected to the SoC.

[0029] Specifically, the transistor drive circuit module includes a pull-down resistor R3 and a resistor R4;

[0030] One end of resistor R4 is connected to the SoC, and the other end is connected to resistor R3 and the base of transistor Q1. The side of resistor R3 furthest from resistor R4 is grounded. As shown in the figure, HDMIIN_HPD_CTRL is the control pin of the SoC to control the HPD state, and it is connected to the SoC's GPIO output pin.

[0031] Resistor R3 is used as a pull-down resistor for transistor Q1 to prevent system malfunctions caused by the high impedance state of the HDMIIN_HPD_CTRL control pin during SoC startup.

[0032] Specifically, it also includes a capacitor C1, one end of which is connected between the feedback resistor R1 and the source (S) terminal of the MOSFET Q2, and the other end is connected between the resistor R2 and the gate (G) terminal of the MOSFET Q2. The capacitor C1 serves to slow down the turn-on speed of the MOSFET Q2.

[0033] Specifically, it also includes capacitor C2, one end of which is connected between pull-up resistor R5 and pin 19 of the HDMI interface, and the other end is grounded. Capacitor C2 mainly serves a filtering function.

[0034] The specific logic of this utility model is as follows:

[0035] When the source device is not connected to the HDMI interface, the HDMI_HPD_CTRL signal is pulled low by default, the transistor Q1 is not turned on, and the MOSFET Q2 is also not turned on. The HDMIN_HPD signal fed back to pin 19 of the HDMI interface is at a low level.

[0036] When the source device is connected to the HDMI interface, the HDMI+5V (output from pin 18 of the HDMI interface) feeds back the HPO signal to the SoC through the feedback resistor R1. After the SoC starts and initializes, it pulls the HDMI_HPD_CTRL signal high, turns on the transistor Q1, and then turns on the MOSFET Q2, and the HDMIN_HPD signal is pulled high.

[0037] When the EDID of the display or the adapter conference terminal needs to be changed, the HDMI_HPD_CTRL signal can be reset.

[0038] When the source device is unplugged, pin 18 of the HDMI interface has no output (i.e., no HDMI +5V output), and the HDMIN_HPD signal goes low, enabling immediate response. The absence of output on pin 18 of the HDMI interface also feeds back the unplugging information to the SoC through the feedback resistor R1. The SoC pulls the HDMI_HPD_CTRL signal low, waiting for the next insertion.

[0039] The advantages of this invention are as follows: The HPD signal control circuit of this invention solves the compatibility problem caused by the EDID not being refreshed due to the bridge chip of the video conferencing terminal device starting up earlier than the SoC chip. It also solves the problem of the video conferencing terminal being identified as a non-plug-and-play (Non-PNP) device when it is not powered on. The circuit structure of this invention allows the video conferencing terminal to have stronger adaptability and is compatible with more HDMI input devices such as cameras. At the same time, maintenance and operation are simpler, as manual re-adaptation of resolution and other information is not required.

[0040] While specific embodiments of the present invention have been described above, those skilled in the art should understand that the specific embodiments described are merely illustrative and not intended to limit the scope of the present invention. Equivalent modifications and variations made by those skilled in the art in accordance with the spirit of the present invention should be covered within the scope of protection of the claims of the present invention.

Claims

1. An HPD signal control circuit for a video conferencing terminal device, characterized in that: It includes transistor Q1, MOSFET Q2, pull-up resistor R5, feedback resistor R1, resistor R2, and transistor driver circuit module; One end of the feedback resistor R1 and the source terminal of the MOSFET Q2 are connected to pin 18 of the HDMI interface; The other end of the feedback resistor R1 is connected to the SoC and is used to feed back the signal output from pin 18 of the HDMI interface to the SoC. The gate of the MOS transistor Q2 is connected to one end of the resistor R2, and the other end of the resistor R2 is connected to the feedback resistor R1 and the collector of the transistor Q1. The drain of the MOSFET Q2 is connected to the pull-up resistor R5, and the pull-up resistor R5 is connected to pin 19 of the HDMI interface. The base of transistor Q1 is connected to the transistor driving circuit module, and the emitter of transistor Q1 is grounded; The transistor driver circuit module is connected to the SoC.

2. The HPD signal control circuit for a video conferencing terminal device as described in claim 1, characterized in that: The transistor drive circuit module includes a pull-down resistor R3 and a resistor R4; One end of resistor R4 is connected to the SoC, and the other end is connected to the base of resistor R3 and transistor Q1. The side of resistor R3 away from resistor R4 is grounded.

3. The HPD signal control circuit for a video conferencing terminal device as described in claim 1, characterized in that: It also includes a capacitor C1, one end of which is connected between the feedback resistor R1 and the source (S) terminal of the MOSFET Q2, and the other end is connected between the resistor R2 and the gate (G) terminal of the MOSFET Q2.

4. The HPD signal control circuit for a video conferencing terminal device as described in claim 1, characterized in that: It also includes capacitor C2, one end of which is connected between pull-up resistor R5 and pin 19 of HDMI interface, and the other end is grounded.

Images