A serial-to-parallel driver chip and monitoring device compatible with the I2C protocol

Abstract

This invention provides a serial-to-parallel driver chip and monitoring device compatible with the I2C protocol. The chip includes a digital control module, an eight-channel driver circuit, a two-channel general-purpose driver circuit, and an H-bridge driver circuit connected to the digital control module. The digital control module also establishes a data connection with an external control chip via an I2C interface. The eight-channel driver circuit outputs a first drive signal based on the control signal from the external control chip; the two-channel general-purpose driver circuit outputs a second drive signal based on the control signal from the external control chip; and the H-bridge driver circuit outputs a third drive signal based on the control signal from the external control chip. The first drive signal is used to control a stepper motor, the second drive signal is used to control a preset execution unit, and the third drive signal is used to control a DC motor. This invention can save port resources and improve the chip's expandability.

Description

Technical Field

[0001] This utility model relates to the field of integrated circuit design technology, and in particular to a serial-to-parallel driver chip and monitoring device compatible with the I2C protocol. Background Technology

[0002] Existing monitoring equipment can achieve automatic, fast, and reliable switching between "daytime mode" and "nighttime mode" with the help of IRCUT filters.

[0003] However, in the driver chip design stage, a discrete driver architecture is currently widely used. This requires the microcontroller unit (MCU) to manage multiple sets of control signals synchronously through parallel interfaces, resulting in a significant consumption of its I / O port resources. In a typical configuration, when a device integrates two stepper motors, motor control alone consumes eight I / O ports. If the IRCUT control line is added, basic control functions will occupy ten I / O ports of the MCU. This severely limits the scalability of core functions such as image acquisition, power monitoring, and status feedback. Utility Model Content

[0004] To address the shortcomings of existing technologies, this utility model provides a serial-to-parallel driver chip and monitoring device compatible with the I2C protocol. It solves the problem of unreasonable port resource usage in the design of driver chips for monitoring devices, which limits the functional expansion of monitoring devices.

[0005] According to an embodiment of the present invention, a first aspect provides a serial-to-parallel driver chip compatible with the I2C protocol, comprising: a digital control module, an eight-channel driver circuit, a two-channel general-purpose driver circuit, and an H-bridge driver circuit connected to the digital control module, wherein the digital control module also establishes a data connection with an external control chip through an I2C interface;

[0006] The eight-channel drive circuit outputs a first drive signal based on the control signal from an external control chip.

[0007] The two-channel universal drive circuit outputs a second drive signal based on the control signal from an external control chip.

[0008] The H-bridge drive circuit outputs a third drive signal based on the control signal from the external control chip.

[0009] The first drive signal is used to control the stepper motor, the second drive signal is used to control the preset execution unit, and the third drive signal is used to control the DC motor.

[0010] Optionally, each channel of the eight-channel drive circuit includes a first MOSFET and a first diode;

[0011] The digital control module is connected to the gate of the first MOSFET, the drain of the first MOSFET is connected to the input terminal of the first diode, the source of the first MOSFET is connected to the chip ground, the output terminal of the first diode is connected to the DC power supply voltage, and the input terminal of the first diode and the drain of the first MOSFET serve as the first output interface for outputting the first drive signal.

[0012] Based on the eight channels of the eight-channel drive circuit, the number of the first output interfaces is eight.

[0013] Optionally, each channel of the two-channel universal drive circuit includes a second MOSFET.

[0014] The gate of the second MOSFET is connected to the digital control module, the source of the second MOSFET is connected to the chip ground, and the drain of the second MOSFET serves as the second output interface for outputting the second drive signal.

[0015] Based on the two channels of the aforementioned two-channel general-purpose drive circuit, the number of the second output interfaces is two.

[0016] Optionally, the H-bridge drive circuit includes a third MOSFET, a fourth MOSFET, a fifth MOSFET, and a sixth MOSFET;

[0017] The sources of the third MOSFET and the fourth MOSFET are connected to a preset power supply voltage, and the gates of the third MOSFET and the fourth MOSFET are connected to the digital control module.

[0018] The sources of the fifth and sixth MOSFETs are connected to a preset ground, and the gates of the fifth and sixth MOSFETs are connected to the digital control module. The drains of the third and fourth MOSFETs and the drains of the fifth and sixth MOSFETs are connected and serve as two third output interfaces for outputting the third drive signal.

[0019] Optionally, a buffer is further included between the digital control module and the eight-channel drive circuit, the two-channel general-purpose drive circuit, and the H-bridge drive circuit.

[0020] Optionally, the H-bridge drive circuit further includes a pre-driver and a pre-drive voltage generation module;

[0021] The pre-driver and the pre-drive voltage generation module are connected, and the pre-drive voltage generation module and the pre-drive voltage generation module are also connected to the digital control module respectively. The pre-driver is connected to the gate of the third MOSFET and the gate of the fifth MOSFET.

[0022] Optionally, the third and fourth MOSFETs are high-side P-type power MOSFETs, and the fifth and sixth MOSFETs are two low-side N-type power MOSFETs.

[0023] Optionally, the I2C interface includes an SCL transmission end and an SDA transmission end;

[0024] The SCL transmission terminal includes a first level conversion circuit and a first diode. One end of the first level conversion circuit is connected to the digital control module, and the other end of the first level conversion circuit is also connected to the output terminal of the first diode. The input terminal of the first diode is connected to the chip ground, and the other end of the first level conversion circuit and the output terminal of the first diode are the output.

[0025] The SDA transmission terminal includes a second level conversion circuit, a second diode, and a seventh MOSFET. One end of the second level conversion circuit is connected to the digital control module, and the other end of the second level conversion circuit is connected to the output terminal of the second diode and the drain of the seventh MOSFET. The input terminal of the second diode and the source terminal of the seventh MOSFET are connected to the chip ground. The gate of the seventh MOSFET is connected to the digital control module, and the drain of the seventh MOSFET and the output terminal of the second diode are the output.

[0026] The second aspect provides a monitoring device, including a camera, an IRCUT filter switching device, and a serial-to-parallel driver chip compatible with the I2C protocol as described in any of the above technical solutions, wherein the serial-to-parallel driver chip compatible with the I2C protocol drives the stepper motor of the camera and the DC motor of the IRCUT filter switching device.

[0027] Optionally, the camera device includes at least a lens, an image sensor, and an image processing chip.

[0028] Compared to existing technologies, this invention offers the following advantages: It integrates a stepper motor drive circuit (eight-channel drive circuit) for camera devices and a DC motor drive circuit (H-bridge drive circuit) for IRCUT into a single chip. This chip communicates with an external control chip, such as an MCU, via an I2C interface. This allows control of multiple external motors to be achieved using only two I / O ports based on the I2C interface, reducing the port resource requirements of the external control chip. Furthermore, a two-channel general-purpose drive circuit is designed for a preset execution unit. This preset execution unit can be a controller for devices used for image acquisition, power monitoring, and status feedback, thereby improving the chip's expandability while reducing the port resource requirements of the external control chip. Attached Figure Description

[0029] Figure 1 This is a schematic diagram of the composition structure of a serial-to-parallel driver chip compatible with the I2C protocol according to an embodiment of this utility model.

[0030] Figure 2 This is a schematic diagram of the circuit structure of a serial-to-parallel driver chip compatible with the I2C protocol according to an embodiment of this utility model.

[0031] Figure 3 This is a schematic diagram of the circuit structure of the H-bridge drive circuit according to an embodiment of the present invention;

[0032] Figure 4 This is a schematic diagram illustrating the application of a serial-to-parallel driver chip compatible with the I2C protocol according to an embodiment of this utility model. Detailed Implementation

[0033] The technical solution of this utility model will be further described below with reference to the accompanying drawings and embodiments.

[0034] like Figure 1As shown, this embodiment of the present invention proposes a serial-to-parallel driver chip compatible with the I2C protocol, including a digital control module 10, an eight-channel driver circuit 20, a two-channel general-purpose driver circuit 30, and an H-bridge driver circuit 40. The digital control module 10 is connected to the low-side driver circuit, the two-channel general-purpose driver circuit 30, and the H-bridge driver circuit 40, respectively, and establishes a data connection with an external control chip 50 via an I2C (Inter-Integrated Circuit) interface. The detailed working process of this embodiment is as follows: the eight-channel driver circuit 20 outputs a first drive signal based on the control signal from the external control chip 50; the two-channel general-purpose driver circuit 30 outputs a second drive signal based on the control signal from the external control chip 50; and the H-bridge driver circuit 40 outputs a third drive signal based on the control signal from the external control chip 50. The first drive signal is used to control a stepper motor, the second drive signal is used to control a preset execution unit, and the third drive signal is used to control a DC motor.

[0035] It should be noted that serial-to-parallel driver chips compatible with the I2C protocol can also include other commonly used functional modules or circuits to support normal chip operation, such as... Figure 1 The power supply module 60 and power-on reset module 70 are shown. In this embodiment of the present invention, the power supply module 60 is exemplarily an LDO (Low Dropout Regulator) linear power supply, providing a DC power supply voltage VM1.

[0036] The serial-to-parallel driver chip compatible with the I2C protocol provided in this embodiment integrates a stepper motor driver circuit (eight-channel driver circuit) for camera devices and a DC motor driver circuit (H-bridge driver circuit) for IRCUTs into a single chip. It communicates with an external control chip, such as an MCU, via an I2C interface. This allows control of multiple external motors to be completed using only two I / O ports based on the I2C interface, reducing the port resource requirements of the external control chip. Simultaneously, a two-channel general-purpose driver circuit is designed for a preset execution unit. This preset execution unit can be a controller for devices used for image acquisition, power monitoring, and status feedback, thereby improving the chip's expandability while reducing the port resource requirements of the external control chip.

[0037] like Figure 2 As shown in the figure, this utility model embodiment illustrates the detailed circuit structure of the eight-channel driving circuit 20, the two-channel general-purpose driving circuit 30, and the H-bridge driving circuit 40 in a serial-to-parallel driving chip compatible with the I2C protocol.

[0038] Please see Figure 2Each channel of the eight-channel drive circuit 20 includes a first MOSFET M1 and a first diode D1. The digital control module 10 is connected to the gate of the first MOSFET M1, the drain of the first MOSFET M1 is connected to the input of the first diode D1, the source of the first MOSFET M1 is connected to the chip ground GND1, and the output of the first diode D1 is connected to VM1. The input of the first diode D1 and the drain of the first MOSFET M1 serve as the first output interface for outputting the first drive signal. It should be noted that, based on the eight channels of the eight-channel drive circuit 20, the number of first output interfaces is eight. Figure 2 The eight first output interfaces are designated OUT1 to OUT8. The second diode D2 serves as an anti-static measure and also provides a discharge path for inductive current generated when the port is connected to an inductive load. In a preferred implementation, the first MOSFET M1 is an N-type power MOSFET.

[0039] Please see Figure 2 Each channel of the two-channel general-purpose drive circuit 30 includes a second MOSFET M2; the gate of the second MOSFET M2 is connected to the digital control module 10, the source of the second MOSFET M2 is connected to the chip ground GND1, and the drain of the second MOSFET M2 serves as a second output interface for outputting the second drive signal; based on the two channels of the two-channel general-purpose drive circuit 30, the number of second output interfaces is two. Figure 2 The two second output interfaces are denoted as IOBAK0 to IOBAK1. In a preferred implementation, the second MOSFET M2 is an N-type power MOSFET.

[0040] Please see Figure 2 The H-bridge drive circuit 40 includes a third MOSFET M3, a fourth MOSFET M4, a fifth MOSFET M5, and a sixth MOSFET M6. The sources of the third MOSFET M3 and the fourth MOSFET M4 are connected to a preset power supply voltage VM2, and their gates are connected to the digital control module 10. The sources of the fifth MOSFET M5 and the sixth MOSFET M6 are connected to a preset ground GND2, and their gates are connected to the digital control module 10. The drains of the third MOSFET M3 and the fourth MOSFET M4, and the drains of the fifth MOSFET M5 and the sixth MOSFET M6 are connected and serve as two third output interfaces for outputting the third drive signal. Figure 2In this implementation, one third output interface is denoted as OUTA, and another third output interface is denoted as OUTB. In a better implementation, the third MOSFET M3 and the fourth MOSFET M4 are high-side P-type power MOSFETs, and the fifth MOSFET M5 and the sixth MOSFET M6 are two low-side N-type power MOSFETs.

[0041] It should be noted that a buffer is also included between the digital control module 10 and the eight-channel drive circuit 20, the two-channel general-purpose drive circuit 30, and the H-bridge drive circuit 40.

[0042] like Figure 3 As shown, this embodiment of the invention also provides another structure for the H-bridge drive circuit 40, in which... Figure 2 Based on the circuit structure shown, a pre-driver 41 and a pre-drive voltage generation module 42 are also included. The pre-driver 41 and the pre-drive voltage generation module 42 are connected, and both are also connected to the digital control module 10. The pre-driver 41 is connected to the gate of the third MOSFET M3 and the gate of the fifth MOSFET M5. The pre-drive voltage generation module 42 receives control signals from the digital control module 10 and uses them as an enable signal. Its output voltages serve as the ground for the high-side drive and the power supply for the low-side drive of the pre-driver 41, namely, preset ground GND2 and preset power supply voltage VM2. The pre-driver 41 receives control signals from the digital control module 10 and generates gate drive signals for the four power MOSFETs through an internal delay circuit. It is worth noting that the gate drive signals of the high and low side power transistors generated in the same phase have a dead time to avoid large current damage to the circuit when the high and low side power transistors are turned on at the same time; the source of the third MOSFET M3 is connected to the preset power supply voltage VM2, and its drain is connected to the drain of the fifth MOSFET M5 as one phase output OUTA, and the source of the fifth MOSFET M5 is connected to the preset ground GND2; similarly, another phase output can be obtained.

[0043] like Figure 2As shown in the illustration, this embodiment of the present invention also describes the I2C interface of the digital control module 10. The I2C interface includes an SCL transmission terminal SCL_IN and an SDA transmission terminal SDA_IN / SDA_OUT. The SCL transmission terminal SCL_IN includes a first level conversion circuit P1 and a first diode D1. One end of the first level conversion circuit P1 is connected to the digital control module 10, and the other end of the first level conversion circuit P1 is also connected to the output terminal of the first diode D1. The input terminal of the first diode D1 is connected to the chip ground GND1, and the other end of the first level conversion circuit P1 and the output terminal of the first diode D1 are connected to the SCL_IN / SDA_OUT. L_IN; The SDA transmission terminal includes a second level conversion circuit P2, a second diode D2, and a seventh MOSFET M7. One end of the second level conversion circuit P2 is connected to the digital control module 10, and the other end of the second level conversion circuit P2 is connected to the output terminal of the second diode D2 and the drain of the seventh MOSFET M7. The input terminal of the second diode D2 and the source terminal of the seventh MOSFET M7 are connected to the chip ground GND1. The gate of the seventh MOSFET M7 is SDA_OUT and connected to the digital control module 10. The drain of the seventh MOSFET M7 and the output terminal of the second diode D2 are SDA_IN.

[0044] like Figure 4 As shown, the serial-to-parallel driver chip compatible with the I2C protocol is packaged into module 100. In practical applications, when the SCL transmission terminal SCL_IN and SDA transmission terminal of the serial-to-parallel driver chip 100 compatible with the I2C protocol establish a data connection with the external control chip 50, two 1KΩ to 10KΩ resistors are also pulled up. A 10uF capacitor is also connected between the VM1 pin of the serial-to-parallel driver chip 100, which is connected to the LDO linear power supply (5.5V to 16V), and the chip ground GND1, thereby improving the voltage spike generated by the inductive load at the VM1 port during the freewheeling stage and improving the reliability of the circuit.

[0045] Another embodiment of this utility model provides a monitoring device, including a camera device, an IRCUT filter switching device, and a serial-to-parallel driver chip compatible with the I2C protocol as described above. The serial-to-parallel driver chip compatible with the I2C protocol drives the stepper motor of the camera device and the DC motor of the IRCUT filter switching device. The camera device provides basic image capture functions and may include a lens, image sensor, image processing chip, etc., without limitation. In practical applications, under sufficient light conditions, such as during the day, the IRCUT filter moves into the light path, effectively blocking infrared light and allowing the imaging sensor to primarily receive visible light, thus presenting a true color image. Under insufficient light conditions, such as at night, the IRCUT filter moves out of the light path, allowing both visible and infrared light to enter the imaging sensor. In this case, the camera device typically switches to black and white mode and, in conjunction with an infrared supplementary light, can capture clear black and white images even in almost complete darkness.

[0046] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this utility model and are not intended to limit it. Although this utility model has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of this utility model without departing from the spirit and scope of the technical solutions of this utility model, and all such modifications or substitutions should be covered within the scope of the claims of this utility model.

Claims

1. A serial-to-parallel driver chip compatible with an I2C protocol, characterized in that, include: The digital control module includes an eight-channel drive circuit, a two-channel general-purpose drive circuit, and an H-bridge drive circuit connected to it. The digital control module also establishes a data connection with an external control chip via an I2C interface. The eight-channel drive circuit outputs a first drive signal based on the control signal from an external control chip. The two-channel universal drive circuit outputs a second drive signal based on the control signal from an external control chip. The H-bridge drive circuit outputs a third drive signal based on the control signal from the external control chip. The first drive signal is used to control the stepper motor, the second drive signal is used to control the preset execution unit, and the third drive signal is used to control the DC motor.

2. The I2C protocol compatible serial-to-parallel driver chip of claim 1, wherein, Each channel of the eight-channel drive circuit includes a first MOSFET and a first diode; The digital control module is connected to the gate of the first MOSFET, the drain of the first MOSFET is connected to the input terminal of the first diode, the source of the first MOSFET is connected to the chip ground, the output terminal of the first diode is connected to the DC power supply voltage, and the input terminal of the first diode and the drain of the first MOSFET serve as the first output interface for outputting the first drive signal. Based on the eight channels of the eight-channel drive circuit, the number of the first output interfaces is eight.

3. The I2C protocol compatible serial-to-parallel driver chip of claim 1, wherein, Each channel of the two-channel general-purpose drive circuit includes a second MOSFET. The gate of the second MOSFET is connected to the digital control module, the source of the second MOSFET is connected to the chip ground, and the drain of the second MOSFET serves as the second output interface for outputting the second drive signal. Based on the two channels of the aforementioned two-channel general-purpose drive circuit, the number of the second output interfaces is two.

4. The I2C protocol compatible serial-to-parallel driver chip of claim 1, wherein, The H-bridge drive circuit includes a third MOSFET, a fourth MOSFET, a fifth MOSFET, and a sixth MOSFET; The sources of the third MOSFET and the fourth MOSFET are connected to a preset power supply voltage, and the gates of the third MOSFET and the fourth MOSFET are connected to the digital control module. The sources of the fifth and sixth MOSFETs are connected to a preset ground, and the gates of the fifth and sixth MOSFETs are connected to the digital control module. The drains of the third and fourth MOSFETs and the drains of the fifth and sixth MOSFETs are connected and serve as two third output interfaces for outputting the third drive signal.

5. A serial-to-parallel driver chip compatible with the I2C protocol according to any one of claims 2 to 4, characterized in that, A buffer is also included between the digital control module and the eight-channel drive circuit, the two-channel general-purpose drive circuit, and the H-bridge drive circuit.

6. The I2C protocol compatible serial-to-parallel driver chip of claim 4, wherein, The H-bridge drive circuit also includes a pre-driver and a pre-drive voltage generation module; The pre-driver and the pre-drive voltage generation module are connected, and the pre-drive voltage generation module and the pre-drive voltage generation module are also connected to the digital control module respectively. The pre-driver is connected to the gate of the third MOSFET and the gate of the fifth MOSFET.

7. The I2C protocol compatible serial-to-parallel driver chip according to claim 4 or 6, wherein, The third and fourth MOSFETs are high-side P-type power MOSFETs, and the fifth and sixth MOSFETs are two low-side N-type power MOSFETs.

8. The I2C protocol compatible serial-to-parallel driver chip of claim 1, wherein, The I2C interface includes an SCL transmission end and an SDA transmission end; The SCL transmission terminal includes a first level conversion circuit and a first diode. One end of the first level conversion circuit is connected to the digital control module, and the other end of the first level conversion circuit is also connected to the output terminal of the first diode. The input terminal of the first diode is connected to the chip ground, and the other end of the first level conversion circuit and the output terminal of the first diode are the output. The SDA transmission terminal includes a second level conversion circuit, a second diode, and a seventh MOSFET. One end of the second level conversion circuit is connected to the digital control module, and the other end of the second level conversion circuit is connected to the output terminal of the second diode and the drain of the seventh MOSFET. The input terminal of the second diode and the source terminal of the seventh MOSFET are connected to the chip ground. The gate of the seventh MOSFET is connected to the digital control module, and the drain of the seventh MOSFET and the output terminal of the second diode are the output.

9. A monitoring device, characterized by It includes a camera device, an IRCUT filter switching device, and a serial-to-parallel driver chip compatible with the I2C protocol as described in any one of claims 1 to 8, wherein the serial-to-parallel driver chip compatible with the I2C protocol drives the stepper motor of the camera device and the DC motor of the IRCUT filter switching device.

10. The monitoring device of claim 9, wherein, The camera device includes at least a lens, an image sensor, and an image processing chip.

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